table 77 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963
  1. /*
  2. * (c) copyright 1989 by the Vrije Universiteit, Amsterdam, The Netherlands.
  3. * See the copyright notice in the ACK home directory, in the file "Copyright".
  4. */
  5. rscid = "$Id$"
  6. /*
  7. * Back end tables for Intel 80386
  8. *
  9. * Author : Ceriel J.H. Jacobs
  10. *
  11. * Partly adapted from Intel 8086 table
  12. *
  13. * wordsize = 4 bytes, pointersize = 4 bytes.
  14. *
  15. * Register ebp is used as LB, esp is used for SP.
  16. * Some global variables are used:
  17. * - .reghp : the heap pointer
  18. * - .ignmask : trap ignore mask
  19. * - .trppc : address of user defined trap handler
  20. *
  21. */
  22. #define WS 4
  23. #define PS 4
  24. SL = 8
  25. SSL = "8"
  26. EM_WSIZE = WS
  27. EM_PSIZE = PS
  28. EM_BSIZE = 8
  29. SIZEFACTOR = 5/1
  30. #define REGVARS
  31. #define EXACT exact /* to improve code but slow down code generator,
  32. define it to nothing
  33. */
  34. /*****************************************************************/
  35. PROPERTIES
  36. /*****************************************************************/
  37. REG1 /* general 1 byte register */
  38. REG2 /* general 2 byte register */
  39. ACC1 /* 1 byte accumulator */
  40. ACC2 /* 2 byte accumulator */
  41. REG /* allocatable register */
  42. GENREG /* register with sub-registers */
  43. ACC /* accumulator */
  44. SHIFT_CREG /* shift count register */
  45. BXREG /* ebx register */
  46. AREG /* address register */
  47. ADDREG /* allocatable address register */
  48. CXREG /* ecx register */
  49. DXREG /* edx register */
  50. IREG /* index register */
  51. RREG /* register variable, or register without subregs */
  52. /*****************************************************************/
  53. REGISTERS
  54. /*****************************************************************/
  55. al : REG1 , ACC1 .
  56. ah,bl, bh, ch,dl,dh : REG1 .
  57. cl : REG1 , SHIFT_CREG .
  58. ax = al + ah : REG2 , ACC2 .
  59. bx = bl + bh : REG2 .
  60. cx = cl + ch : REG2 .
  61. dx = dl + dh : REG2 .
  62. eax = al + ah : REG, GENREG, IREG, ACC, ADDREG, AREG.
  63. ebx = bl + bh : REG, GENREG, IREG, BXREG, ADDREG, AREG.
  64. ecx = cl + ch : REG, GENREG, IREG, CXREG, SHIFT_CREG, ADDREG , AREG .
  65. edx = dl + dh : REG, GENREG, IREG, DXREG, ADDREG, AREG .
  66. #ifndef REGVARS
  67. esi : REG, RREG, IREG, AREG, ADDREG .
  68. edi : REG, RREG, IREG, AREG, ADDREG .
  69. #else
  70. esi : AREG , IREG , RREG regvar(reg_any) .
  71. edi : AREG , IREG , RREG regvar(reg_any) .
  72. #endif
  73. ebp : AREG , IREG .
  74. esp : AREG .
  75. /*****************************************************************/
  76. TOKENS
  77. /*****************************************************************/
  78. ANYCON = { INT val; } 4 cost(4,0) val .
  79. CONSTR = { ADDR off; } 4 cost(4,0) off .
  80. ADDR_EXTERN = { ADDR off; } 4 cost(4,0) off .
  81. EXTERN1 = { ADDR off; } 4 cost(4,5) "(" off ")" .
  82. EXTERN2 = { ADDR off; } 4 cost(4,5) "(" off ")" .
  83. EXTERN = { ADDR off; } 4 cost(4,5) "(" off ")" .
  84. ADDR_LOCAL = { INT ind; } 4 cost(1,0) ind "(ebp)" .
  85. LOCAL = { INT ind; INT size; } 4 cost(1,5) ind "(ebp)" .
  86. LOCAL1 = { INT ind; INT size; } 4 cost(1,5) ind "(ebp)" .
  87. LOCAL2 = { INT ind; INT size; } 4 cost(1,5) ind "(ebp)" .
  88. Rreg_off = { AREG reg; ADDR off;} 4 cost(4,0) off "(" reg ")" .
  89. Xreg_off = { AREG reg; ADDR off;} 4 cost(4,0) off "(" reg ")" .
  90. indexed_r_off = { AREG reg; IREG reg2; INT scale; ADDR off;}
  91. 4 cost(5,0) off "(" reg ")" "(" reg2 "*" scale ")" .
  92. indexed_off = { IREG reg; INT scale; ADDR off;}
  93. 4 cost(5,0) off "(" reg "*" scale ")" .
  94. indir_r = { AREG reg;} 4 cost(0,5) "(" reg ")" .
  95. indir_r1 = { AREG reg;} 4 cost(0,5) "(" reg ")" .
  96. indir_r2 = { AREG reg;} 4 cost(0,5) "(" reg ")" .
  97. indir_r_off = { AREG reg; ADDR off;} 4 cost(4,5) off "(" reg ")" .
  98. indir_r_off1 = { AREG reg; ADDR off;} 4 cost(4,5) off "(" reg ")" .
  99. indir_r_off2 = { AREG reg; ADDR off;} 4 cost(4,5) off "(" reg ")" .
  100. indir_indexed_r_off =
  101. { AREG reg; IREG reg2; INT scale; ADDR off;}
  102. 4 cost(5,5) off "(" reg ")" "(" reg2 "*" scale ")" .
  103. indir_indexed_r_off1 =
  104. { AREG reg; IREG reg2; INT scale; ADDR off;}
  105. 4 cost(5,5) off "(" reg ")" "(" reg2 "*" scale ")" .
  106. indir_indexed_r_off2 =
  107. { AREG reg; IREG reg2; INT scale; ADDR off;}
  108. 4 cost(5,5) off "(" reg ")" "(" reg2 "*" scale ")" .
  109. indir_indexed_off =
  110. { IREG reg; INT scale; ADDR off;}
  111. 4 cost(5,5) off "(" reg "*" scale ")" .
  112. indir_indexed_off1 =
  113. { IREG reg; INT scale; ADDR off;}
  114. 4 cost(5,5) off "(" reg "*" scale ")" .
  115. indir_indexed_off2 =
  116. { IREG reg; INT scale; ADDR off;}
  117. 4 cost(5,5) off "(" reg "*" scale ")" .
  118. label = { ADDR off;} 4 off .
  119. /*****************************************************************/
  120. SETS
  121. /*****************************************************************/
  122. /* Mode refering to a word in memory */
  123. memory2 = EXTERN2 + indir_r2 + indir_r_off2 + LOCAL2 +
  124. indir_indexed_r_off2 + indir_indexed_off2 .
  125. memory1 = EXTERN1 + indir_r1 + indir_r_off1 + LOCAL1 +
  126. indir_indexed_r_off1 + indir_indexed_off1 .
  127. memory = EXTERN + indir_r + indir_r_off + LOCAL +
  128. indir_indexed_r_off + indir_indexed_off .
  129. noacc = EXTERN + LOCAL + BXREG + CXREG + RREG .
  130. const = ANYCON + ADDR_EXTERN + CONSTR .
  131. register = REG + ADDREG + RREG + IREG .
  132. addreg = ADDREG + RREG .
  133. anyreg = register + AREG .
  134. rm = anyreg + memory .
  135. rmorconst = const + rm .
  136. regorconst = const + anyreg .
  137. dest = register + memory .
  138. rm1 = REG1 + memory1 .
  139. rmorconst1 = const + rm1 .
  140. rm2 = REG2 + memory2 .
  141. rmorconst2 = const + rm2 .
  142. regorconst124 = REG1 + REG2 + GENREG + const .
  143. regorconst24 = REG2 + GENREG + const .
  144. dest1 = REG1 + memory1 .
  145. dest2 = REG2 + memory2 .
  146. /* Modes used to indicate tokens to be removed from the fakestack */
  147. reg_indir = indir_r1 + indir_r2 + indir_r_off1 + indir_r_off2 + indir_r +
  148. indir_r_off .
  149. indexed = indir_indexed_r_off1 + indir_indexed_r_off2 +
  150. indir_indexed_r_off + indir_indexed_off1 +
  151. indir_indexed_off2 + indir_indexed_off .
  152. indir = reg_indir + indexed .
  153. externals = EXTERN2 + EXTERN1 + EXTERN .
  154. locals = LOCAL2 + LOCAL1 + LOCAL .
  155. mem_nonlocals = externals + reg_indir .
  156. all_mems = mem_nonlocals + locals .
  157. /* Miscellaneous */
  158. reg_off = Xreg_off + Rreg_off .
  159. halfindir = reg_off + ADDR_LOCAL + indexed_r_off + indexed_off .
  160. some_off = halfindir + ADDR_EXTERN + AREG .
  161. a_word = rmorconst + halfindir .
  162. /*****************************************************************/
  163. INSTRUCTIONS
  164. /*****************************************************************/
  165. cost(2,2)
  166. adc rm:rw:cc, regorconst:ro.
  167. adc anyreg:rw:cc, rmorconst:ro.
  168. #ifdef REGVARS
  169. add LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
  170. #endif
  171. add anyreg:rw:cc, rmorconst:ro.
  172. add rm:rw:cc, regorconst:ro.
  173. #ifdef REGVARS
  174. axx "syntax error" LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
  175. #endif
  176. axx "syntax error" anyreg:rw:cc, rmorconst:ro.
  177. axx "syntax error" rm:rw:cc, regorconst:ro.
  178. #ifdef REGVARS
  179. and LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
  180. #endif
  181. and rm:rw:cc, regorconst:ro.
  182. and anyreg:rw:cc, rmorconst:ro.
  183. cdq kills edx cost(1,3).
  184. cmp rm:ro, regorconst:ro kills :cc.
  185. cmp anyreg:ro, rmorconst:ro kills :cc.
  186. cmpb rm1:rw, const:ro kills :cc.
  187. cmpw "o16 cmp" rm2:rw, const:ro kills :cc cost(3,2).
  188. dec anyreg:rw:cc cost(1,2).
  189. dec rm:rw:cc.
  190. div rm:ro kills:cc eax edx cost(2,43).
  191. idiv rm:ro kills:cc eax edx cost(2,43).
  192. imul rm:rw, anyreg:ro kills:cc cost(3,41).
  193. imul anyreg:rw, rm:ro kills:cc cost(3,41).
  194. imul anyreg:wo, rm:ro, const:ro kills :cc cost(2,38).
  195. inc anyreg:rw:cc cost(1,2).
  196. inc rm:rw:cc.
  197. ja label cost(1,4).
  198. jae label cost(1,4).
  199. jb label cost(1,4).
  200. jbe label cost(1,4).
  201. jcxz label cost(1,4).
  202. je label cost(1,4).
  203. jg label cost(1,4).
  204. jge label cost(1,4).
  205. jl label cost(1,4).
  206. jle label cost(1,4).
  207. jne label cost(1,4).
  208. jmp label cost(1,4).
  209. proccall "call" label+rm cost(1,8).
  210. jxx "syntax error" label cost(1,4).
  211. setxx "syntax error" REG1:rw cost(2,4).
  212. setle REG1:rw cost(2,4).
  213. setg REG1:rw cost(2,4).
  214. lea anyreg:rw, halfindir:ro.
  215. lea LOCAL:rw, halfindir:ro. /* only for register variables, UNSAFE!!! */
  216. leave cost(1,4).
  217. loop label kills ecx.
  218. #ifdef REGVARS
  219. mov LOCAL:wo, rmorconst:ro. /* only for register variables, UNSAFE!!! */
  220. #endif
  221. mov a_word:wo, regorconst:ro.
  222. mov anyreg:wo, rmorconst:ro.
  223. movb rm1:wo, regorconst124:ro.
  224. movb REG1:wo, rm1:ro.
  225. movw "o16 mov" rm2:wo, regorconst124:ro cost(3,2).
  226. movw "o16 mov" REG2:wo, rmorconst2:ro cost(3,2).
  227. movsxb anyreg:wo, REG+rm1:ro.
  228. movsx anyreg:wo, REG+rm2:ro.
  229. movzxb anyreg:wo, REG+rm1:ro.
  230. movzx anyreg:wo, REG+rm2:ro.
  231. mul rmorconst:ro kills :cc eax edx cost(2,41).
  232. neg rmorconst:rw:cc.
  233. not rmorconst:rw.
  234. #ifdef REGVARS
  235. or LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
  236. #endif
  237. or rm:rw:cc, regorconst:ro.
  238. or anyreg:rw:cc, rmorconst:ro.
  239. pop anyreg:wo cost(1,4).
  240. pop rm:wo.
  241. push anyreg:ro cost(1,2).
  242. push const:ro cost(1,2).
  243. push rm:ro cost(2,5).
  244. rcl rm:rw, ANYCON+SHIFT_CREG:ro kills :cc cost(2,10).
  245. rcr rm:rw, ANYCON+SHIFT_CREG:ro kills :cc cost(2,10).
  246. ret cost(1,10).
  247. rol rm:rw, ANYCON+SHIFT_CREG:ro kills :cc.
  248. ror rm:rw, ANYCON+SHIFT_CREG:ro kills :cc.
  249. sal rm:rw, ANYCON+SHIFT_CREG:ro kills :cc.
  250. sar rm:rw, ANYCON+SHIFT_CREG:ro kills :cc.
  251. sbb rm:rw:cc, regorconst:ro.
  252. sbb anyreg:rw:cc, rmorconst:ro.
  253. shl rm:rw, ANYCON+SHIFT_CREG:ro kills :cc.
  254. shr rm:rw, ANYCON+SHIFT_CREG:ro kills :cc.
  255. #ifdef REGVARS
  256. sub LOCAL:rw:cc, rmorconst:ro. /* only for register variables; UNSAFE !!! */
  257. #endif
  258. sub rm:rw:cc, regorconst:ro.
  259. sub anyreg:rw:cc, rmorconst+halfindir:ro.
  260. check "test" rm:ro, regorconst:ro kills :cc.
  261. check "test" anyreg:ro, rmorconst:ro kills :cc.
  262. testb "testb" rm1:ro, regorconst124:ro kills :cc.
  263. testb "testb" REG1:ro, rmorconst1:ro kills :cc.
  264. testw "o16 test" rm2:ro, regorconst24:ro kills :cc.
  265. testw "o16 test" REG2:ro, rmorconst2:ro kills :cc.
  266. testl "test" rm:ro, regorconst:ro kills :cc.
  267. testl "test" REG:ro, rmorconst:ro kills :cc.
  268. uxx "syntax error" rm:rw:cc.
  269. xchg rm:rw, anyreg:rw.
  270. xchg anyreg:rw, rm:rw.
  271. xor rm:rw:cc, regorconst:ro.
  272. xor anyreg:rw:cc, rmorconst:ro.
  273. xorb rm1:rw:cc, regorconst124:ro.
  274. xorb anyreg:rw:cc, rmorconst1:ro.
  275. xorw "o16 xor" rm2:rw:cc, regorconst124:ro.
  276. xorw "o16 xor" anyreg:rw:cc, rmorconst2:ro.
  277. killreg "! kill" anyreg:wo cost(0,0).
  278. killcc "! kill cc" kills:cc cost(0,0).
  279. /*****************************************************************/
  280. MOVES
  281. /*****************************************************************/
  282. #ifdef REGVARS
  283. from rmorconst to LOCAL /* unsafe !!! */
  284. gen mov %2,%1
  285. #endif
  286. from rm to register
  287. gen mov %2,%1
  288. from anyreg to dest
  289. gen mov %2,%1
  290. from halfindir to register+AREG
  291. gen lea %2,%1
  292. from halfindir to LOCAL /* unsafe !!! */
  293. gen lea %2,%1
  294. from rm1 to REG1
  295. gen movb %2,%1
  296. from rm2 to REG2
  297. gen movw %2,%1
  298. from GENREG to rm1
  299. gen movb %2,%1.1
  300. from GENREG to rm2
  301. gen movw %2,%1
  302. from REG2 to rm1
  303. gen movb %2,%1.1
  304. from ANYCON %val==0 to register
  305. gen xor %2,%2
  306. from ANYCON %val==0 to REG1
  307. gen xorb %2,%2
  308. from ANYCON %val==0 to REG2
  309. gen xorw %2,%2
  310. from const to dest
  311. gen mov %2,%1
  312. from const+REG1 to rm1
  313. gen movb %2,%1
  314. from const+REG2 to rm2
  315. gen movw %2,%1
  316. /*****************************************************************/
  317. TESTS
  318. /*****************************************************************/
  319. to test anyreg
  320. gen testl %1,%1
  321. to test memory
  322. gen cmp %1, {ANYCON,0}
  323. to test REG1
  324. gen testb %1,%1
  325. to test memory1
  326. gen cmpb %1, {ANYCON,0}
  327. to test REG2
  328. gen testw %1,%1
  329. to test memory2
  330. gen cmpw %1, {ANYCON,0}
  331. /*****************************************************************/
  332. STACKINGRULES
  333. /*****************************************************************/
  334. from rm to STACK
  335. gen push %1
  336. from const to STACK
  337. gen push %1
  338. from rm1 to STACK
  339. uses REG
  340. gen movzxb %a,%1
  341. push %a
  342. from rm1 to STACK
  343. gen push eax
  344. movzxb eax,%1
  345. xchg {indir_r,esp},eax
  346. from rm2 to STACK
  347. uses REG
  348. gen movzx %a,%1
  349. push %a
  350. from rm2 to STACK
  351. gen push eax
  352. movzx eax,%1
  353. xchg {indir_r,esp},eax
  354. from Xreg_off to STACK
  355. gen add %1.reg,{CONSTR,%1.off}
  356. push %1.reg
  357. from ADDR_LOCAL %ind==0 to STACK
  358. gen push ebp
  359. from halfindir to STACK
  360. uses REG
  361. gen move %1,%a
  362. push %a
  363. from halfindir to STACK
  364. gen push eax
  365. lea eax,%1
  366. xchg {indir_r,esp},eax
  367. /*****************************************************************/
  368. COERCIONS
  369. /*****************************************************************/
  370. /***************************
  371. * From source to register *
  372. ***************************/
  373. from rmorconst
  374. uses reusing %1,REG=%1 yields %a
  375. from rmorconst
  376. uses reusing %1,IREG=%1 yields %a
  377. from Xreg_off
  378. gen add %1.reg,{CONSTR,%1.off} yields %1.reg
  379. from halfindir
  380. uses reusing %1,ADDREG
  381. gen move %1,%a yields %a
  382. from halfindir
  383. uses reusing %1,REG
  384. gen move %1,%a yields %a
  385. from halfindir
  386. uses reusing %1,IREG
  387. gen move %1,%a yields %a
  388. /************************
  389. * From source to token *
  390. ************************/
  391. from ANYCON yields {ADDR_EXTERN,%1.val}
  392. /****************
  393. * From source1 *
  394. ****************/
  395. from rm1
  396. uses reusing %1,REG1=%1 yields %a
  397. from rm1
  398. uses GENREG
  399. gen
  400. movzxb %a,%1 yields %a
  401. /****************
  402. * From source2 *
  403. ****************/
  404. from rm2
  405. uses reusing %1,REG2=%1 yields %a
  406. from rm2
  407. uses GENREG
  408. gen
  409. movzx %a,%1 yields %a
  410. /************************
  411. * From STACK coercions *
  412. ************************/
  413. from STACK
  414. uses REG
  415. gen pop %a yields %a
  416. /*****************************************************************/
  417. PATTERNS
  418. /*****************************************************************/
  419. /******************************************************************
  420. * Group 1 : Load Instructions *
  421. ******************************************************************/
  422. pat loc yields {ANYCON,$1}
  423. pat ldc leaving loc 18 trp
  424. pat lol yields {LOCAL,$1,4}
  425. pat stl lol $1==$2
  426. #ifdef REGVARS
  427. && inreg($1) <= 0
  428. #endif
  429. leaving dup 4 stl $1
  430. pat sdl ldl $1==$2 leaving dup 8 sdl $1
  431. #ifdef REGVARS
  432. pat lol dup stl $2==4 && inreg($1) <= 0 && inreg($3) > 0
  433. kills regvar($3)
  434. gen move {LOCAL,$1,4}, {LOCAL,$3,4}
  435. yields {LOCAL,$3,4}
  436. #endif
  437. pat loe yields {EXTERN,$1}
  438. pat ste loe $1==$2 leaving dup 4 ste $1
  439. pat sde lde $1==$2 leaving dup 8 sde $1
  440. #ifdef REGVARS
  441. pat loe dup stl $2==4 && inreg($3) > 0
  442. kills regvar($3)
  443. gen move {EXTERN,$1}, {LOCAL,$3,4}
  444. yields {LOCAL,$3,4}
  445. #endif
  446. #ifdef REGVARS
  447. pat lil inreg($1) > 0 yields {indir_r, regvar($1)}
  448. #endif
  449. pat lil
  450. uses ADDREG={indir_r_off,ebp,$1} yields {indir_r,%a}
  451. pat lil dup stl $2==4 leaving lil $1 stl $3 lol $3
  452. pat sil lil $1==$2 leaving dup 4 sil $1
  453. pat lof
  454. with exact indexed_r_off yields {indir_indexed_r_off,%1.reg,%1.reg2,
  455. %1.scale,%1.off+$1}
  456. with exact indexed_off yields {indir_indexed_off,%1.reg,
  457. %1.scale,%1.off+$1}
  458. with exact reg_off yields {indir_r_off,%1.reg,%1.off+$1}
  459. with exact ADDR_EXTERN yields {EXTERN,%1.off+$1}
  460. with exact ADDR_LOCAL yields {LOCAL,%1.ind + $1,4}
  461. with addreg yields {indir_r_off,%1,$1}
  462. pat lal yields {ADDR_LOCAL,$1}
  463. pat lae yields {ADDR_EXTERN,$1}
  464. pat lpb leaving adp SL
  465. pat lxl $1==0 yields {ADDR_LOCAL,0}
  466. pat lxl $1==1 yields {LOCAL,SL,4}
  467. pat lxl $1==2
  468. uses ADDREG={indir_r_off,ebp,SSL} yields {indir_r_off,%a,SSL}
  469. pat lxl $1>2
  470. uses ADDREG={indir_r_off,ebp,SSL},
  471. CXREG={ANYCON,$1-1}
  472. gen 1:
  473. mov %a,{indir_r_off,%a,SSL}
  474. loop {label,1b} yields %a
  475. pat lxa $1==0 yields {ADDR_LOCAL,SL}
  476. pat lxa $1==1
  477. uses ADDREG={indir_r_off,ebp,SSL} yields {Xreg_off,%a,SSL}
  478. pat lxa $1==2
  479. uses ADDREG={indir_r_off,ebp,SSL}
  480. gen move {indir_r_off,%a,SSL},%a yields {Xreg_off,%a,SSL}
  481. pat lxa $1>2
  482. uses ADDREG={indir_r_off,ebp,SSL},
  483. CXREG={ANYCON,$1-1}
  484. gen 1:
  485. mov %a,{indir_r_off,%a,SSL}
  486. loop {label,1b} yields {Xreg_off,%a,SSL}
  487. pat dch leaving loi 4
  488. pat loi $1==2
  489. with addreg yields {indir_r2,%1}
  490. with exact indexed_r_off yields {indir_indexed_r_off2, %1.reg, %1.reg2,
  491. %1.scale, %1.off}
  492. with exact indexed_off yields {indir_indexed_off2, %1.reg,
  493. %1.scale, %1.off}
  494. with exact reg_off yields {indir_r_off2,%1.reg,%1.off}
  495. with exact ADDR_EXTERN yields {EXTERN2,%1.off}
  496. with exact ADDR_LOCAL yields {LOCAL2,%1.ind,2}
  497. pat loi $1==1
  498. with addreg yields {indir_r1,%1}
  499. with exact indexed_r_off yields {indir_indexed_r_off1, %1.reg, %1.reg2,
  500. %1.scale, %1.off}
  501. with exact indexed_off yields {indir_indexed_off1, %1.reg,
  502. %1.scale, %1.off}
  503. with exact reg_off yields {indir_r_off1,%1.reg,%1.off}
  504. with exact ADDR_EXTERN yields {EXTERN1,%1.off}
  505. with exact ADDR_LOCAL yields {LOCAL1,%1.ind,1}
  506. pat loi $1==4
  507. with addreg yields {indir_r,%1}
  508. with exact indexed_r_off yields {indir_indexed_r_off, %1.reg, %1.reg2,
  509. %1.scale, %1.off}
  510. with exact indexed_off yields {indir_indexed_off, %1.reg,
  511. %1.scale, %1.off}
  512. with exact reg_off yields {indir_r_off,%1.reg,%1.off}
  513. with exact ADDR_EXTERN yields {EXTERN,%1.off}
  514. with exact ADDR_LOCAL yields {LOCAL,%1.ind,4}
  515. pat loi $1==8
  516. with addreg yields {indir_r_off,%1,4}
  517. {indir_r,%1}
  518. with exact indexed_r_off yields {indir_indexed_r_off, %1.reg, %1.reg2,
  519. %1.scale, %1.off+4}
  520. {indir_indexed_r_off, %1.reg, %1.reg2,
  521. %1.scale, %1.off}
  522. with exact indexed_off yields {indir_indexed_off, %1.reg,
  523. %1.scale, %1.off+4}
  524. {indir_indexed_off, %1.reg,
  525. %1.scale, %1.off}
  526. with exact reg_off yields {indir_r_off,%1.reg,%1.off+4}
  527. {indir_r_off,%1.reg,%1.off}
  528. with exact ADDR_LOCAL yields {LOCAL,%1.ind+4,4}
  529. {LOCAL,%1.ind,4}
  530. with exact ADDR_EXTERN yields {EXTERN,%1.off + 4}
  531. {EXTERN,%1.off}
  532. pat loi
  533. with BXREG
  534. kills ALL
  535. gen mov ecx,{ANYCON,$1}
  536. proccall {label,".loi"}
  537. pat los $1==4
  538. with CXREG BXREG
  539. kills ALL
  540. gen proccall {label,".los"}
  541. pat ldl yields {LOCAL,$1+4,4}
  542. {LOCAL,$1,4}
  543. pat lde yields {EXTERN,$1+4}
  544. {EXTERN,$1}
  545. pat ldf
  546. with exact reg_off yields {indir_r_off,%1.reg,
  547. %1.off + 4 + $1}
  548. {indir_r_off,%1.reg,
  549. %1.off + $1}
  550. with exact indexed_r_off yields {indir_indexed_r_off, %1.reg, %1.reg2,
  551. %1.scale, %1.off+$1+4}
  552. {indir_indexed_r_off, %1.reg, %1.reg2,
  553. %1.scale, %1.off+$1}
  554. with exact indexed_off yields {indir_indexed_off, %1.reg,
  555. %1.scale, %1.off+$1+4}
  556. {indir_indexed_off, %1.reg,
  557. %1.scale, %1.off+$1}
  558. with addreg yields {indir_r_off,%1,$1+4}
  559. {indir_r_off,%1,$1}
  560. with exact ADDR_EXTERN yields {EXTERN,%1.off+4+$1}
  561. {EXTERN,%1.off+$1}
  562. with exact ADDR_LOCAL yields {LOCAL,%1.ind + $1 + 4,4}
  563. {LOCAL,%1.ind + $1,4}
  564. pat lpi yields {ADDR_EXTERN,$1}
  565. /* this code sequence is generated by the C-compiler to tackle
  566. char parameters, on the 80386 it reduces to nil */
  567. pat lol lal sti $1==$2 && $3<=4
  568. /*******************************************************************
  569. * Group 2 : Store Instructions *
  570. *******************************************************************/
  571. #ifdef REGVARS
  572. pat stl inreg($1)==reg_any
  573. with rmorconst
  574. kills regvar($1)
  575. gen move %1, {LOCAL,$1,4}
  576. with exact halfindir
  577. kills regvar($1)
  578. gen move %1, {LOCAL,$1,4}
  579. with exact STACK
  580. kills regvar($1)
  581. gen pop {LOCAL, $1, 4}
  582. #endif
  583. pat stl
  584. with regorconst
  585. kills indir,locals %ind+%size > $1 && %ind < $1+4
  586. gen move %1,{LOCAL,$1,4}
  587. with exact STACK
  588. kills ALL
  589. gen pop {indir_r_off,ebp,$1}
  590. pat ste
  591. with regorconst
  592. kills mem_nonlocals
  593. gen move %1,{EXTERN,$1}
  594. with exact STACK
  595. kills ALL
  596. gen pop {EXTERN,$1}
  597. #ifdef REGVARS
  598. pat sil inreg($1)==reg_any
  599. with regorconst
  600. kills all_mems
  601. gen move %1,{indir_r,regvar($1)}
  602. with exact STACK
  603. kills ALL
  604. gen pop {indir_r,regvar($1)}
  605. #endif
  606. pat sil
  607. with regorconst
  608. kills all_mems
  609. uses ADDREG={indir_r_off,ebp,$1}
  610. gen move %1,{indir_r,%a}
  611. killreg %a
  612. with exact STACK
  613. kills ALL
  614. uses ADDREG={indir_r_off,ebp,$1}
  615. gen pop {indir_r,%a}
  616. killreg %a
  617. pat stf
  618. with addreg regorconst
  619. kills all_mems
  620. gen move %2,{indir_r_off,%1,$1}
  621. with exact addreg STACK
  622. kills ALL
  623. gen pop {indir_r_off, %1,$1}
  624. with reg_off regorconst
  625. kills all_mems
  626. gen move %2,{indir_r_off,%1.reg,%1.off+$1}
  627. with exact reg_off STACK
  628. gen pop {indir_r_off,%1.reg,$1+%1.off}
  629. with indexed_r_off regorconst
  630. kills all_mems
  631. gen move %2,{indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+$1}
  632. with exact indexed_r_off STACK
  633. kills all_mems
  634. gen pop {indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+$1}
  635. with indexed_off regorconst
  636. kills all_mems
  637. gen move %2,{indir_indexed_off,%1.reg,%1.scale,%1.off+$1}
  638. with exact indexed_off STACK
  639. kills all_mems
  640. gen pop {indir_indexed_off,%1.reg,%1.scale,%1.off+$1}
  641. with ADDR_LOCAL regorconst
  642. kills indir,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4
  643. gen move %2,{LOCAL,%1.ind+$1,4}
  644. with exact ADDR_LOCAL STACK
  645. kills indir,locals %ind+%size > %1.ind+$1 && %ind < %1.ind+$1+4
  646. gen pop {LOCAL,%1.ind+$1,4}
  647. with ADDR_EXTERN regorconst
  648. kills mem_nonlocals
  649. gen move %2,{EXTERN,%1.off+$1}
  650. with exact ADDR_EXTERN STACK
  651. kills mem_nonlocals
  652. gen pop {EXTERN,%1.off+$1}
  653. pat sti $1==4
  654. with addreg regorconst
  655. kills all_mems
  656. gen move %2,{indir_r,%1}
  657. with exact addreg STACK
  658. kills all_mems
  659. gen pop {indir_r,%1}
  660. with reg_off regorconst
  661. kills all_mems
  662. gen move %2,{indir_r_off,%1.reg,%1.off}
  663. with exact reg_off STACK
  664. kills all_mems
  665. gen pop {indir_r_off,%1.reg,%1.off}
  666. with indexed_r_off regorconst
  667. kills all_mems
  668. gen move %2,{indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off}
  669. with exact indexed_r_off STACK
  670. kills all_mems
  671. gen pop {indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off}
  672. with indexed_off regorconst
  673. kills all_mems
  674. gen move %2,{indir_indexed_off,%1.reg,%1.scale,%1.off}
  675. with exact indexed_off STACK
  676. kills all_mems
  677. gen pop {indir_indexed_off,%1.reg,%1.scale,%1.off}
  678. with ADDR_LOCAL regorconst
  679. kills indir,locals %ind+%size > %1.ind && %ind < %1.ind+4
  680. gen move %2,{LOCAL,%1.ind,4}
  681. with exact ADDR_LOCAL STACK
  682. kills indir,locals %ind+%size > %1.ind && %ind < %1.ind+4
  683. gen pop {LOCAL,%1.ind,4}
  684. with ADDR_EXTERN regorconst
  685. kills mem_nonlocals
  686. gen move %2,{EXTERN,%1.off}
  687. with exact ADDR_EXTERN STACK
  688. kills mem_nonlocals
  689. gen pop {EXTERN,%1.off}
  690. pat sti $1==1
  691. with addreg regorconst124
  692. kills all_mems
  693. gen move %2,{indir_r1,%1}
  694. with reg_off regorconst124
  695. kills all_mems
  696. gen move %2,{indir_r_off1,%1.reg,%1.off}
  697. with indexed_r_off regorconst124
  698. kills all_mems
  699. gen move %2,{indir_indexed_r_off1,%1.reg,%1.reg2,%1.scale,%1.off}
  700. with indexed_off regorconst124
  701. kills all_mems
  702. gen move %2,{indir_indexed_off1,%1.reg,%1.scale,%1.off}
  703. with ADDR_EXTERN regorconst124
  704. kills mem_nonlocals
  705. gen move %2,{EXTERN1,%1.off}
  706. with ADDR_LOCAL regorconst124
  707. kills indir,locals %ind<%1.ind+1 && %ind+%size>%1.ind
  708. gen move %2,{indir_r_off1,ebp,%1.ind}
  709. pat sti $1==2
  710. with addreg regorconst24
  711. kills all_mems
  712. gen move %2,{indir_r2,%1}
  713. with reg_off regorconst24
  714. kills all_mems
  715. gen move %2,{indir_r_off2,%1.reg,%1.off}
  716. with indexed_r_off regorconst24
  717. kills all_mems
  718. gen move %2,{indir_indexed_r_off2,%1.reg,%1.reg2,%1.scale,%1.off}
  719. with indexed_off regorconst24
  720. kills all_mems
  721. gen move %2,{indir_indexed_off2,%1.reg,%1.scale,%1.off}
  722. with ADDR_EXTERN regorconst24
  723. kills mem_nonlocals
  724. gen move %2,{EXTERN2,%1.off}
  725. with ADDR_LOCAL regorconst24
  726. kills indir,locals %ind<%1.ind+2 && %ind+%size>%1.ind
  727. gen move %2,{indir_r_off2,ebp,%1.ind}
  728. pat sti $1==8 leaving sdf 0
  729. pat sti
  730. with BXREG
  731. kills ALL
  732. gen mov ecx,{ANYCON,$1}
  733. proccall {label, ".sti"}
  734. /* this sort of construction gives problems in the codegenerator
  735. because of the potential very large lookahead
  736. with addreg
  737. kills ALL
  738. gen pop (%1)
  739. add %1,{ANYCON,2} yields %1 leaving sti $1-4
  740. */
  741. pat sts $1==4
  742. with CXREG BXREG
  743. kills ALL
  744. gen proccall {label,".sts"}
  745. pat sdl
  746. with regorconst regorconst yields %2 %1
  747. leaving stl $1 stl $1+4
  748. with exact STACK leaving stl $1 stl $1+4
  749. pat sde
  750. with regorconst regorconst yields %2 %1
  751. leaving ste $1 ste $1+4
  752. with exact STACK leaving ste $1 ste $1+4
  753. pat sdf
  754. with addreg regorconst regorconst
  755. kills all_mems
  756. gen move %2,{indir_r_off,%1,$1}
  757. move %3,{indir_r_off,%1,$1+4}
  758. with exact addreg STACK
  759. kills all_mems
  760. gen pop {indir_r_off,%1,$1}
  761. pop {indir_r_off,%1,$1+4}
  762. with reg_off regorconst regorconst
  763. kills all_mems
  764. gen move %2,{indir_r_off,%1.reg,%1.off+$1}
  765. move %3,{indir_r_off,%1.reg,%1.off+$1+4}
  766. with exact reg_off STACK
  767. kills all_mems
  768. gen pop {indir_r_off,%1.reg,$1+%1.off}
  769. pop {indir_r_off,%1.reg,$1+%1.off+4}
  770. with indexed_r_off regorconst regorconst
  771. kills all_mems
  772. gen move %2,{indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+$1}
  773. move %3,{indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+4+$1}
  774. with exact indexed_r_off STACK
  775. kills all_mems
  776. gen pop {indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+$1}
  777. pop {indir_indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+4+$1}
  778. with indexed_off regorconst regorconst
  779. kills all_mems
  780. gen move %2,{indir_indexed_off,%1.reg,%1.scale,%1.off+$1}
  781. move %3,{indir_indexed_off,%1.reg,%1.scale,%1.off+4+$1}
  782. with exact indexed_off STACK
  783. kills all_mems
  784. gen pop {indir_indexed_off,%1.reg,%1.scale,%1.off+$1}
  785. pop {indir_indexed_off,%1.reg,%1.scale,%1.off+4+$1}
  786. with ADDR_LOCAL regorconst regorconst
  787. kills indir,locals %ind+%size > $1 && %ind < $1+8
  788. gen move %2,{LOCAL,%1.ind+$1,4}
  789. move %3,{LOCAL,%1.ind+$1+4,4}
  790. with exact ADDR_LOCAL STACK
  791. kills indir,locals %ind+%size > $1 && %ind < $1+8
  792. gen pop {LOCAL,%1.ind+$1,4}
  793. pop {LOCAL,%1.ind+$1+4,4}
  794. with ADDR_EXTERN regorconst regorconst
  795. kills mem_nonlocals
  796. gen move %2,{EXTERN,%1.off+$1}
  797. move %3,{EXTERN,%1.off+$1+4}
  798. with exact ADDR_EXTERN STACK
  799. kills mem_nonlocals
  800. gen pop {EXTERN,%1.off+$1}
  801. pop {EXTERN,%1.off+$1+4}
  802. /****************************************************************
  803. * Group 3 : Integer Arithmetic. *
  804. * *
  805. * Implemented (sometimes with the use of subroutines) : *
  806. * 4 byte arithmetic. *
  807. ****************************************************************/
  808. pat adi $1==4
  809. #ifdef REGVARS
  810. with exact ANYCON RREG
  811. yields {Rreg_off,%2,%1.val}
  812. with exact RREG ANYCON
  813. yields {Rreg_off,%1,%2.val}
  814. #endif
  815. with REG rmorconst
  816. gen add %1,%2 yields %1
  817. with rmorconst REG
  818. gen add %2,%1 yields %2
  819. with EXACT rmorconst const
  820. uses reusing %1,REG=%1
  821. gen add %a,%2 yields %a
  822. /*
  823. pat adi !defined($1)
  824. with CXREG ACC
  825. kills ALL
  826. gen proccall {label,".adi"} yields eax
  827. */
  828. pat sbi $1==4
  829. with rmorconst REG
  830. gen sub %2,%1 yields %2
  831. with EXACT REG rmorconst
  832. gen sub %1,%2
  833. neg %1 yields %1
  834. /*
  835. pat sbi !defined($1)
  836. with CXREG ACC
  837. kills ALL
  838. gen proccall {label,".sbi"} yields eax
  839. */
  840. pat mli $1==4
  841. with rm REG
  842. gen imul %2,%1 yields %2
  843. with REG rm
  844. gen imul %1,%2 yields %1
  845. with const rm
  846. uses reusing %2,REG
  847. gen imul %a,%2,%1 yields %a
  848. with rm const
  849. uses reusing %1,REG
  850. gen imul %a,%1,%2 yields %a
  851. /*
  852. pat mli !defined($1)
  853. with ACC
  854. kills ALL
  855. gen proccall {label,".mli"}
  856. */
  857. pat dvi $1==4
  858. with noacc ACC
  859. uses DXREG
  860. gen cdq.
  861. idiv %1 yields eax
  862. /*
  863. pat dvi !defined($1)
  864. with ACC
  865. kills ALL
  866. gen proccall {label,".dvi"}
  867. */
  868. pat rmi $1==4
  869. with noacc ACC
  870. uses DXREG
  871. gen cdq.
  872. idiv %1 yields edx
  873. /*
  874. pat rmi !defined($1)
  875. with ACC
  876. kills ALL
  877. gen proccall {label,".rmi"}
  878. */
  879. pat ngi $1==4
  880. with REG
  881. gen neg %1 yields %1
  882. /*
  883. pat ngi !defined($1)
  884. with ACC
  885. kills ALL
  886. gen proccall {label,".ngi"}
  887. */
  888. pat sli $1==4
  889. with ANYCON REG
  890. gen sal %2,%1 yields %2
  891. with SHIFT_CREG REG
  892. gen sal %2,cl yields %2
  893. /*
  894. pat sli !defined($1)
  895. with ACC
  896. kills ALL
  897. gen proccall {label,".sli"}
  898. */
  899. pat sri $1==4
  900. with SHIFT_CREG REG
  901. gen sar %2,cl yields %2
  902. with ANYCON REG
  903. gen sar %2,%1 yields %2
  904. /*
  905. pat sri !defined($1)
  906. with ACC
  907. kills ALL
  908. gen proccall {label,".sri"}
  909. */
  910. /*******************************************************************
  911. * Group 4: Unsigned Arithmetic *
  912. *******************************************************************/
  913. pat adu leaving adi $1
  914. pat loc lol adu stl $1==1 && $3==4 && $2==$4 leaving inl $2
  915. pat loc loe adu ste $1==1 && $3==4 && $2==$4 leaving ine $2
  916. pat loc lol adu $1==1 && $3==4 leaving lol $2 inc
  917. pat loc loe adu $1==1 && $3==4 leaving loe $2 inc
  918. pat loc lil adu $1==1 && $3==4 leaving lil $2 inc
  919. pat loc lol adu stl $1==0-1 && $3==4 && $2==$4 leaving del $2
  920. pat loc loe adu ste $1==0-1 && $3==4 && $2==$4 leaving dee $2
  921. pat loc lol adu $1==0-1 && $3==4 leaving lol $2 dec
  922. pat loc loe adu $1==0-1 && $3==4 leaving loe $2 dec
  923. pat loc lil adu $1==0-1 && $3==4 leaving lil $2 dec
  924. pat sbu leaving sbi $1
  925. pat lol loc sbu stl $1==$4 && $2==1 && $3==4 leaving del $1
  926. pat loe loc sbu ste $1==$4 && $2==1 && $3==4 leaving dee $1
  927. pat lol loc sbu $2==1 && $3==4 leaving lol $1 dec
  928. pat loe loc sbu $2==1 && $3==4 leaving loe $1 dec
  929. pat lil loc sbu $2==1 && $3==4 leaving lil $1 dec
  930. pat lol loc sbu stl $1==$4 && $2==0-1 && $3==4 leaving inl $1
  931. pat loe loc sbu ste $1==$4 && $2==0-1 && $3==4 leaving ine $1
  932. pat lol loc sbu $2==0-1 && $3==4 leaving lol $1 inc
  933. pat loe loc sbu $2==0-1 && $3==4 leaving loe $1 inc
  934. pat lil loc sbu $2==0-1 && $3==4 leaving lil $1 inc
  935. pat mlu leaving mli $1
  936. pat loe loc loe adu ste $1==$3 && $1==$5 && $4==4
  937. uses REG = {EXTERN, $1}
  938. yields %a leaving loc $2 loe $3 adu 4 ste $3
  939. pat lol loc lol adu stl $1==$3 && $1==$5 && $4==4
  940. uses REG = {LOCAL, $1, 4}
  941. yields %a leaving loc $2 lol $3 adu 4 stl $3
  942. pat loe loc loe adi ste $1==$3 && $1==$5 && $4==4
  943. uses REG = {EXTERN, $1}
  944. yields %a leaving loc $2 loe $3 adi 4 ste $3
  945. pat lol loc lol adi stl $1==$3 && $1==$5 && $4==4
  946. uses REG = {LOCAL, $1, 4}
  947. yields %a leaving loc $2 lol $3 adi 4 stl $3
  948. pat dvu $1==4
  949. with noacc ACC
  950. uses DXREG={ANYCON,0}
  951. gen div %1 yields eax
  952. /*
  953. pat dvu !defined($1)
  954. with ACC STACK
  955. kills ALL
  956. gen proccall {label,".dvu"}
  957. */
  958. pat rmu $1==4
  959. with noacc ACC
  960. uses DXREG={ANYCON,0}
  961. gen div %1 yields edx
  962. /*
  963. pat rmu !defined($1)
  964. with ACC STACK
  965. kills ALL
  966. gen proccall {label,".rmu"}
  967. */
  968. pat slu leaving sli $1
  969. pat loc slu leaving loc $1 sli $2
  970. pat sru $1==4
  971. with SHIFT_CREG REG
  972. gen shr %2,cl yields %2
  973. with ANYCON REG
  974. gen shr %2,%1 yields %2
  975. /*
  976. pat sru !defined($1)
  977. with ACC STACK
  978. kills ALL
  979. gen proccall {label,".sru"}
  980. */
  981. /*******************************************************************
  982. * Group 5: Floating Point Instructions *
  983. *******************************************************************/
  984. pat adf $1==4 leaving cal ".adf4" asp 4
  985. pat adf $1==8 leaving cal ".adf8" asp 8
  986. pat sbf $1==4 leaving cal ".sbf4" asp 4
  987. pat sbf $1==8 leaving cal ".sbf8" asp 8
  988. pat mlf $1==4 leaving cal ".mlf4" asp 4
  989. pat mlf $1==8 leaving cal ".mlf8" asp 8
  990. pat dvf $1==4 leaving cal ".dvf4" asp 4
  991. pat dvf $1==8 leaving cal ".dvf8" asp 8
  992. pat ngf $1==4 leaving cal ".ngf4"
  993. pat ngf $1==8 leaving cal ".ngf8"
  994. pat fif $1==4 leaving lor 1 cal ".fif4" asp 4
  995. pat fif $1==8 leaving lor 1 cal ".fif8" asp 4
  996. pat fef $1==4 leaving lor 1 adp 0-4 cal ".fef4"
  997. pat fef $1==8 leaving lor 1 adp 0-4 cal ".fef8"
  998. /******************************************************************
  999. * Group 6: Pointer Arithmetic *
  1000. ******************************************************************/
  1001. pat adp $1==1
  1002. with exact Xreg_off yields {Xreg_off,%1.reg,%1.off+$1}
  1003. with exact Rreg_off yields {Rreg_off,%1.reg,%1.off+$1}
  1004. with exact indexed_r_off
  1005. yields {indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+$1}
  1006. with exact indexed_off yields {indexed_off,%1.reg,%1.scale,%1.off+$1}
  1007. with exact ADDR_EXTERN yields {ADDR_EXTERN,%1.off+$1}
  1008. with exact ADDR_LOCAL yields {ADDR_LOCAL,%1.ind+$1}
  1009. with REG
  1010. gen inc %1 yields %1
  1011. with ADDREG
  1012. gen killreg %1
  1013. yields {Xreg_off, %1, $1}
  1014. with exact RREG yields {Rreg_off, %1, $1}
  1015. pat adp $1==0-1
  1016. with exact Xreg_off yields {Xreg_off,%1.reg,%1.off+$1}
  1017. with exact Rreg_off yields {Rreg_off,%1.reg,%1.off+$1}
  1018. with exact indexed_r_off
  1019. yields {indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+$1}
  1020. with exact indexed_off yields {indexed_off,%1.reg,%1.scale,%1.off+$1}
  1021. with exact ADDR_EXTERN yields {ADDR_EXTERN,%1.off+$1}
  1022. with exact ADDR_LOCAL yields {ADDR_LOCAL,%1.ind+$1}
  1023. with REG
  1024. gen dec %1 yields %1
  1025. with ADDREG
  1026. gen killreg %1
  1027. yields {Xreg_off, %1, $1}
  1028. with exact RREG yields {Rreg_off, %1, $1}
  1029. pat adp
  1030. with exact Xreg_off yields {Xreg_off,%1.reg,%1.off+$1}
  1031. with exact Rreg_off yields {Rreg_off,%1.reg,%1.off+$1}
  1032. with exact indexed_r_off
  1033. yields {indexed_r_off,%1.reg,%1.reg2,%1.scale,%1.off+$1}
  1034. with exact indexed_off yields {indexed_off,%1.reg,%1.scale,%1.off+$1}
  1035. with exact ADDR_EXTERN yields {ADDR_EXTERN,%1.off+$1}
  1036. with exact ADDR_LOCAL yields {ADDR_LOCAL,%1.ind+$1}
  1037. with ADDREG
  1038. gen killreg %1
  1039. yields {Xreg_off,%1,$1}
  1040. with exact RREG yields {Rreg_off, %1, $1}
  1041. with REG
  1042. gen add %1,{ANYCON,$1} yields %1
  1043. pat ads stl $1==4 leaving adi 4 stl $2
  1044. pat ads ste $1==4 leaving adi 4 ste $2
  1045. pat ads sil $1==4 leaving adi 4 sil $2
  1046. pat ads lol stf $1==4 leaving adi 4 lol $2 stf $3
  1047. pat ads loe stf $1==4 leaving adi 4 loe $2 stf $3
  1048. pat ads $1==4
  1049. with exact ANYCON Rreg_off
  1050. yields {Rreg_off,%2.reg,%2.off+%1.val}
  1051. with exact ANYCON Xreg_off
  1052. yields {Xreg_off,%2.reg,%2.off+%1.val}
  1053. with exact ANYCON indexed_r_off
  1054. yields {indexed_r_off,%2.reg,%2.reg2,
  1055. %2.scale,%2.off+%1.val}
  1056. with exact ANYCON indexed_off
  1057. yields {indexed_off,%2.reg,%2.scale,%2.off+%1.val}
  1058. with exact ADDR_EXTERN Rreg_off
  1059. yields {Rreg_off,%2.reg,%2.off+%1.off}
  1060. with exact ADDR_EXTERN Xreg_off
  1061. yields {Xreg_off,%2.reg,%2.off+%1.off}
  1062. with exact ADDR_EXTERN indexed_r_off
  1063. yields {indexed_r_off,%2.reg,%2.reg2,
  1064. %2.scale,%2.off+%1.off}
  1065. with exact ADDR_EXTERN indexed_off
  1066. yields {indexed_off,%2.reg,%2.scale,%2.off+%1.off}
  1067. with exact IREG reg_off
  1068. yields {indexed_r_off,%2.reg,%1,1,%2.off}
  1069. with exact reg_off IREG
  1070. yields {indexed_r_off,%1.reg,%2,1,%1.off}
  1071. with exact IREG ADDR_LOCAL
  1072. yields {indexed_r_off,ebp,%1,1,%2.ind}
  1073. with exact ADDR_LOCAL IREG
  1074. yields {indexed_r_off,ebp,%2,1,%1.ind}
  1075. with rmorconst Xreg_off
  1076. gen add %2.reg,%1 yields %2
  1077. with Xreg_off rmorconst
  1078. gen add %1.reg,%2 yields %1
  1079. with exact Xreg_off ANYCON
  1080. yields {Xreg_off,%1.reg,%1.off+%2.val}
  1081. with exact Rreg_off ANYCON
  1082. yields {Rreg_off,%1.reg,%1.off+%2.val}
  1083. with exact indexed_r_off ANYCON
  1084. yields {indexed_r_off,%1.reg,%1.reg2,
  1085. %1.scale,%1.off+%2.val}
  1086. with exact indexed_off ANYCON
  1087. yields {indexed_off,%1.reg,%1.scale,%1.off+%2.val}
  1088. with exact Xreg_off ADDR_EXTERN
  1089. yields {Xreg_off,%1.reg,%1.off+%2.off}
  1090. with exact Rreg_off ADDR_EXTERN
  1091. yields {Rreg_off,%1.reg,%1.off+%2.off}
  1092. with exact indexed_r_off ADDR_EXTERN
  1093. yields {indexed_r_off,%1.reg,%1.reg2,
  1094. %1.scale,%1.off+%2.off}
  1095. with exact indexed_off ADDR_EXTERN
  1096. yields {indexed_off,%1.reg,%1.scale,%1.off+%2.off}
  1097. with exact Xreg_off reg_off
  1098. gen add %1.reg,%2.reg
  1099. yields {Xreg_off,%1.reg,%1.off+%2.off}
  1100. with exact RREG ADDR_EXTERN
  1101. yields {Rreg_off, %1, %2.off}
  1102. with exact ADDR_EXTERN RREG
  1103. yields {Rreg_off,%2,%1.off}
  1104. with exact rmorconst ADDR_EXTERN
  1105. uses reusing %1,ADDREG=%1
  1106. yields {Xreg_off,%a,%2.off}
  1107. with exact ADDR_EXTERN rmorconst
  1108. uses reusing %2,ADDREG=%2
  1109. yields {Xreg_off,%a,%1.off}
  1110. with rmorconst ADDREG
  1111. gen add %2,%1 yields %2
  1112. with ADDREG rmorconst
  1113. gen add %1,%2 yields %1
  1114. pat sbs $1==4
  1115. with exact ANYCON Xreg_off
  1116. yields {Xreg_off,%2.reg,%2.off+"-"+%1.val}
  1117. with exact ANYCON Rreg_off
  1118. yields {Rreg_off,%2.reg,%2.off+"-"+%1.val}
  1119. with exact ANYCON indexed_r_off
  1120. yields {indexed_r_off,%2.reg,%2.reg2,%2.scale,
  1121. %2.off+"-"+%1.val}
  1122. with exact ANYCON indexed_off
  1123. yields {indexed_off,%2.reg,%2.scale,%2.off+"-"+%1.val}
  1124. with exact ANYCON ADDR_LOCAL
  1125. yields {ADDR_LOCAL,%2.ind-%1.val}
  1126. with rm Xreg_off
  1127. gen sub %2.reg,%1 yields {Xreg_off,%2.reg,%2.off}
  1128. /* Should not occur
  1129. with exact reg_off ANYCON
  1130. yields {reg_off,%1.reg,%1.off-%2.val}
  1131. with ANYCON ADDR_EXTERN
  1132. yields {ADDR_EXTERN,%2.off+%1.val}
  1133. with exact ANYCON ADDR_LOCAL
  1134. yields {ADDR_LOCAL,%1.val+%2.ind}
  1135. */
  1136. with rm REG
  1137. gen sub %2,%1 yields %2
  1138. with const ACC
  1139. gen sub %2,%1 yields %2
  1140. /*******************************************************************
  1141. * Group 7 : Increment/Decrement Zero *
  1142. *******************************************************************/
  1143. pat inc
  1144. with REG
  1145. gen inc %1 yields %1
  1146. #ifdef REGVARS
  1147. pat inl inreg($1)==reg_any
  1148. kills regvar($1)
  1149. gen inc {LOCAL,$1,4}
  1150. #endif
  1151. pat inl
  1152. kills indir, locals %ind + %size>$1 && %ind<$1+4
  1153. gen inc {LOCAL,$1,4}
  1154. pat ine
  1155. kills mem_nonlocals
  1156. gen inc {EXTERN,$1}
  1157. pat dec
  1158. with REG
  1159. gen dec %1 yields %1
  1160. #ifdef REGVARS
  1161. pat del inreg($1)==reg_any
  1162. kills regvar($1)
  1163. gen dec {LOCAL,$1,4}
  1164. #endif
  1165. pat del
  1166. kills indir, locals %ind+%size>$1 && %ind<$1+4
  1167. gen dec {LOCAL, $1, 4}
  1168. pat dee
  1169. kills mem_nonlocals
  1170. gen dec {EXTERN, $1}
  1171. #ifdef REGVARS
  1172. pat zrl inreg($1)==reg_any
  1173. kills regvar($1)
  1174. gen move {ANYCON, 0}, {LOCAL,$1,4}
  1175. #endif
  1176. pat zrl
  1177. kills indir, locals %ind+%size>$1 && %ind<$1+4
  1178. gen move {ANYCON, 0}, {LOCAL,$1,4}
  1179. pat zre
  1180. kills mem_nonlocals
  1181. gen move {ANYCON, 0}, {EXTERN, $1}
  1182. pat zrf leaving zer $1
  1183. pat zer $1==4 yields {ANYCON, 0}
  1184. pat zer $1==8 yields {ANYCON, 0} {ANYCON, 0}
  1185. pat zer $1==12 yields {ANYCON, 0} {ANYCON, 0}
  1186. {ANYCON, 0}
  1187. pat zer $1==16 yields {ANYCON, 0} {ANYCON, 0}
  1188. {ANYCON, 0} {ANYCON, 0}
  1189. pat zer defined($1)
  1190. with STACK
  1191. gen move {ANYCON, $1/4}, ecx
  1192. move {ANYCON, 0}, ebx
  1193. 1:
  1194. push ebx
  1195. loop {label,1b}
  1196. pat zer !defined($1)
  1197. with CXREG STACK
  1198. gen move {ANYCON, $1/4}, ebx
  1199. sar ecx,{ANYCON, 1}
  1200. 1:
  1201. push ebx
  1202. loop {label,1b}
  1203. #ifdef REGVARS
  1204. proc lolrxxxstl example lol adi stl
  1205. with rmorconst
  1206. kills regvar($1)
  1207. gen axx* {LOCAL, $1, 4}, %1
  1208. proc lilrxxxsil example lil adi sil
  1209. with regorconst
  1210. kills all_mems
  1211. gen axx* {indir_r, regvar($1)}, %1
  1212. proc xxxrstl example adi stl
  1213. with rmorconst regorconst-RREG
  1214. kills regvar($2)
  1215. gen move %1, {LOCAL, $2, 4}
  1216. axx* {LOCAL, $2, 4}, %2
  1217. pat lol adi stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add")
  1218. pat lol adu stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add")
  1219. pat lol ads stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("add")
  1220. pat lol and stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("and")
  1221. pat lol ior stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("or")
  1222. pat lol xor stl $1==$3 && $2==4 && inreg($1)==reg_any call lolrxxxstl("xor")
  1223. pat lil adi sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("add")
  1224. pat lil adu sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("add")
  1225. pat lil ads sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("add")
  1226. pat lil and sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("and")
  1227. pat lil ior sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("or")
  1228. pat lil xor sil $1==$3 && $2==4 && inreg($1)==reg_any call lilrxxxsil("xor")
  1229. pat adi stl $1==4 && inreg($2)==reg_any call xxxrstl("add")
  1230. pat adu stl $1==4 && inreg($2)==reg_any call xxxrstl("add")
  1231. pat ads stl $1==4 && inreg($2)==reg_any call xxxrstl("add")
  1232. pat and stl $1==4 && inreg($2)==reg_any call xxxrstl("and")
  1233. pat ior stl $1==4 && inreg($2)==reg_any call xxxrstl("or")
  1234. pat xor stl $1==4 && inreg($2)==reg_any call xxxrstl("xor")
  1235. #endif
  1236. proc lolxxxstl example lol adi stl
  1237. with regorconst
  1238. kills indir, locals %ind+%size>$1 && %ind<$1+4
  1239. gen axx* {LOCAL, $1, 4}, %1
  1240. pat lol adi stl $1==$3 && $2==4 call lolxxxstl("add")
  1241. pat lol adu stl $1==$3 && $2==4 call lolxxxstl("add")
  1242. pat lol ads stl $1==$3 && $2==4 call lolxxxstl("add")
  1243. pat lol and stl $1==$3 && $2==4 call lolxxxstl("and")
  1244. pat lol ior stl $1==$3 && $2==4 call lolxxxstl("or")
  1245. pat lol xor stl $1==$3 && $2==4 call lolxxxstl("xor")
  1246. proc lilxxxsil example lil adi sil
  1247. with regorconst
  1248. kills all_mems
  1249. uses ADDREG={LOCAL, $1, 4}
  1250. gen axx* {indir_r, %a}, %1
  1251. killreg %a
  1252. pat lil adi sil $1==$3 && $2==4 call lilxxxsil("add")
  1253. pat lil adu sil $1==$3 && $2==4 call lilxxxsil("add")
  1254. pat lil ads sil $1==$3 && $2==4 call lilxxxsil("add")
  1255. pat lil and sil $1==$3 && $2==4 call lilxxxsil("and")
  1256. pat lil ior sil $1==$3 && $2==4 call lilxxxsil("or")
  1257. pat lil xor sil $1==$3 && $2==4 call lilxxxsil("xor")
  1258. #ifdef REGVARS
  1259. proc lilruxxsil example lil ngi sil
  1260. kills all_mems
  1261. gen uxx* {indir_r, regvar($1)}
  1262. pat lil ngi sil $1==$3 && $2==4 && inreg($1)==reg_any call lilruxxsil("neg")
  1263. pat lil com sil $1==$3 && $2==4 && inreg($1)==reg_any call lilruxxsil("not")
  1264. pat lil dec sil $1==$3 && inreg($1)==reg_any call lilruxxsil("dec")
  1265. pat lil inc sil $1==$3 && inreg($1)==reg_any call lilruxxsil("inc")
  1266. pat lil adp sil $1==$3 && inreg($1)==reg_any && $2==1 call lilruxxsil("inc")
  1267. pat lil adp sil $1==$3 && inreg($1)==reg_any && $2==(0-1)
  1268. call lilruxxsil("dec")
  1269. #endif
  1270. proc liluxxsil example lil ngi sil
  1271. kills all_mems
  1272. uses ADDREG={LOCAL, $1, 4}
  1273. gen uxx* {indir_r, %a}
  1274. killreg %a
  1275. pat lil ngi sil $1==$3 && $2==4 call liluxxsil("neg")
  1276. pat lil com sil $1==$3 && $2==4 call liluxxsil("not")
  1277. pat lil dec sil $1==$3 call liluxxsil("dec")
  1278. pat lil inc sil $1==$3 call liluxxsil("inc")
  1279. pat lil adp sil $1==$3 && $2==1 call liluxxsil("inc")
  1280. pat lil adp sil $1==$3 && $2==(0-1) call liluxxsil("dec")
  1281. proc loexxxste example loe adi ste
  1282. with regorconst
  1283. kills mem_nonlocals
  1284. gen axx* {EXTERN, $1}, %1
  1285. pat loe adi ste $1==$3 && $2==4 call loexxxste("add")
  1286. pat loe adu ste $1==$3 && $2==4 call loexxxste("add")
  1287. pat loe ads ste $1==$3 && $2==4 call loexxxste("add")
  1288. pat loe and ste $1==$3 && $2==4 call loexxxste("and")
  1289. pat loe ior ste $1==$3 && $2==4 call loexxxste("or")
  1290. pat loe xor ste $1==$3 && $2==4 call loexxxste("xor")
  1291. #ifdef REGVARS
  1292. proc lofrxxxsof example lol lof adi lol stf
  1293. with regorconst
  1294. kills all_mems
  1295. gen axx* {indir_r_off, regvar($1), $2}, %1
  1296. pat lol lof adi lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1297. call lofrxxxsof("add")
  1298. pat lol lof adu lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1299. call lofrxxxsof("add")
  1300. pat lol lof ads lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1301. call lofrxxxsof("add")
  1302. pat lol lof and lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1303. call lofrxxxsof("and")
  1304. pat lol lof ior lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1305. call lofrxxxsof("or")
  1306. pat lol lof xor lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1307. call lofrxxxsof("xor")
  1308. proc lofruxxsof example lol lof inc lol stf
  1309. kills all_mems
  1310. gen uxx* {indir_r_off, regvar($1), $2}
  1311. pat lol lof inc lol stf $1==$4 && $2==$5 && inreg($1)==reg_any
  1312. call lofruxxsof("inc")
  1313. pat lol lof adp lol stf $1==$4 && $2==$5 && inreg($1)==reg_any && $3==1
  1314. call lofruxxsof("inc")
  1315. pat lol lof dec lol stf $1==$4 && $2==$5 && inreg($1)==reg_any
  1316. call lofruxxsof("dec")
  1317. pat lol lof adp lol stf $1==$4 && $2==$5 && inreg($1)==reg_any && $3==(0-1)
  1318. call lofruxxsof("dec")
  1319. pat lol lof ngi lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1320. call lofruxxsof("neg")
  1321. pat lol lof com lol stf $1==$4 && $2==$5 && $3==4 && inreg($1)==reg_any
  1322. call lofruxxsof("not")
  1323. pat lol lof dup adp lol stf $1==$5 && $2==$6 && $3==4 && inreg($1)==reg_any
  1324. kills all_mems
  1325. uses ADDREG={indir_r_off, regvar($1), $2}
  1326. gen add {indir_r_off, regvar($1), $2}, {ANYCON, $4} yields %a
  1327. #endif
  1328. proc lofuxxsof example lol lof inc lol stf
  1329. kills all_mems
  1330. uses ADDREG={LOCAL,$1,4}
  1331. gen uxx* {indir_r_off, %a, $2}
  1332. killreg %a
  1333. pat lol lof ngi lol stf $1==$4 && $2==$5 && $3==4 call lofuxxsof("neg")
  1334. pat lol lof com lol stf $1==$4 && $2==$5 && $3==4 call lofuxxsof("not")
  1335. pat lol lof dec lol stf $1==$4 && $2==$5 call lofuxxsof("dec")
  1336. pat lol lof inc lol stf $1==$4 && $2==$5 call lofuxxsof("inc")
  1337. pat lol lof adp lol stf $1==$4 && $2==$5 && $3==1 call lofuxxsof("inc")
  1338. pat lol lof adp lol stf $1==$4 && $2==$5 && $3==(0-1) call lofuxxsof("dec")
  1339. proc lofxxxsof example lol lof adi lol stf
  1340. with regorconst
  1341. kills all_mems
  1342. uses ADDREG={LOCAL,$1,4}
  1343. gen axx* {indir_r_off, %a, $2}, %1
  1344. killreg %a
  1345. pat lol lof adi lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("add")
  1346. pat lol lof adu lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("add")
  1347. pat lol lof ads lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("add")
  1348. pat lol lof and lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("and")
  1349. pat lol lof ior lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("or")
  1350. pat lol lof xor lol stf $1==$4 && $2==$5 && $3==4 call lofxxxsof("xor")
  1351. pat lol lof dup adp lol stf $1==$5 && $2==$6 && $3==4
  1352. kills all_mems
  1353. uses ADDREG={LOCAL,$1,4},ADDREG
  1354. gen mov %b, {indir_r_off, %a, $2}
  1355. add {indir_r_off, %a, $2}, {ANYCON, $4}
  1356. killreg %a yields %b
  1357. proc lefuxxsef example loe lof inc loe stf
  1358. kills all_mems
  1359. uses ADDREG={EXTERN,$1}
  1360. gen uxx* {indir_r_off, %a, $2}
  1361. killreg %a
  1362. pat loe lof ngi loe stf $1==$4 && $2==$5 && $3==4 call lefuxxsef("neg")
  1363. pat loe lof com loe stf $1==$4 && $2==$5 && $3==4 call lefuxxsef("not")
  1364. pat loe lof dec loe stf $1==$4 && $2==$5 call lefuxxsef("dec")
  1365. pat loe lof inc loe stf $1==$4 && $2==$5 call lefuxxsef("inc")
  1366. pat loe lof adp loe stf $1==$4 && $2==$5 && $3==1 call lefuxxsef("inc")
  1367. pat loe lof adp loe stf $1==$4 && $2==$5 && $3==(0-1) call lefuxxsef("dec")
  1368. proc lefxxxsef example loe lof adi loe stf
  1369. with regorconst
  1370. kills all_mems
  1371. uses ADDREG={EXTERN,$1}
  1372. gen axx* {indir_r_off, %a, $2}, %1
  1373. killreg %a
  1374. pat loe lof adi loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("add")
  1375. pat loe lof adu loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("add")
  1376. pat loe lof ads loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("add")
  1377. pat loe lof and loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("and")
  1378. pat loe lof ior loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("or")
  1379. pat loe lof xor loe stf $1==$4 && $2==$5 && $3==4 call lefxxxsef("xor")
  1380. pat loe lof dup adp loe stf $1==$5 && $2==$6 && $3==4
  1381. kills all_mems
  1382. uses ADDREG={EXTERN,$1},ADDREG
  1383. gen mov %b, {indir_r_off, %a, $2}
  1384. add {indir_r_off, %a, $2}, {ANYCON, $4}
  1385. killreg %a yields %b
  1386. proc leiuxxsei example loe loi inc loe sti
  1387. kills all_mems
  1388. uses ADDREG={EXTERN,$1}
  1389. gen uxx* {indir_r, %a}
  1390. killreg %a
  1391. pat loe loi ngi loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1392. call leiuxxsei("neg")
  1393. pat loe loi com loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1394. call leiuxxsei("not")
  1395. pat loe loi dec loe sti $1==$4 && $2==4 && $5==4
  1396. call leiuxxsei("dec")
  1397. pat loe loi inc loe sti $1==$4 && $2==4 && $5==4
  1398. call leiuxxsei("inc")
  1399. pat loe loi adp loe sti $1==$4 && $2==4 && $5==4 && $3==1
  1400. call leiuxxsei("inc")
  1401. pat loe loi adp loe sti $1==$4 && $2==4 && $5==4 && $3==(0-1)
  1402. call leiuxxsei("dec")
  1403. proc leixxxsei example loe loi adi loe sti
  1404. with regorconst
  1405. kills all_mems
  1406. uses ADDREG={EXTERN,$1}
  1407. gen axx* {indir_r, %a}, %1
  1408. killreg %a
  1409. pat loe loi adi loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1410. call leixxxsei("add")
  1411. pat loe loi adu loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1412. call leixxxsei("add")
  1413. pat loe loi ads loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1414. call leixxxsei("add")
  1415. pat loe loi and loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1416. call leixxxsei("and")
  1417. pat loe loi ior loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1418. call leixxxsei("or")
  1419. pat loe loi xor loe sti $1==$4 && $2==4 && $5==4 && $3==4
  1420. call leixxxsei("xor")
  1421. #ifdef REGVARS
  1422. proc lifuxxsif example lil lof inc lil stf
  1423. kills all_mems
  1424. uses ADDREG={indir_r,regvar($1)}
  1425. gen uxx* {indir_r_off, %a, $2}
  1426. killreg %a
  1427. pat lil lof ngi lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1428. call lifuxxsif("neg")
  1429. pat lil lof com lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1430. call lifuxxsif("not")
  1431. pat lil lof dec lil stf $1==$4 && $2==$5 && inreg($1)>0
  1432. call lifuxxsif("dec")
  1433. pat lil lof inc lil stf $1==$4 && $2==$5 && inreg($1)>0
  1434. call lifuxxsif("inc")
  1435. proc lifxxxsif example lil lof adi lil stf
  1436. with regorconst
  1437. kills all_mems
  1438. uses ADDREG={indir_r,regvar($1)}
  1439. gen axx* {indir_r_off, %a, $2}, %1
  1440. killreg %a
  1441. pat lil lof adi lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1442. call lifxxxsif("add")
  1443. pat lil lof adu lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1444. call lifxxxsif("add")
  1445. pat lil lof ads lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1446. call lifxxxsif("add")
  1447. pat lil lof and lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1448. call lifxxxsif("and")
  1449. pat lil lof ior lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1450. call lifxxxsif("or")
  1451. pat lil lof xor lil stf $1==$4 && $2==$5 && $3==4 && inreg($1)>0
  1452. call lifxxxsif("xor")
  1453. proc liiuxxsii example lil loi inc lil sti
  1454. kills all_mems
  1455. uses ADDREG={indir_r,regvar($1)}
  1456. gen uxx* {indir_r, %a}
  1457. killreg %a
  1458. pat lil loi ngi lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1459. call liiuxxsii("neg")
  1460. pat lil loi com lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1461. call liiuxxsii("not")
  1462. pat lil loi dec lil sti $1==$4 && $2==4 && $5==4 && inreg($1)>0
  1463. call liiuxxsii("dec")
  1464. pat lil loi inc lil sti $1==$4 && $2==4 && $5==4 && inreg($1)>0
  1465. call liiuxxsii("inc")
  1466. pat lil loi adp lil sti $1==$4 && $2==4 && $5==4 && inreg($1)>0 && $3==1
  1467. call liiuxxsii("inc")
  1468. pat lil loi adp lil sti $1==$4 && $2==4 && $5==4 && inreg($1)>0 && $3==(0-1)
  1469. call liiuxxsii("dec")
  1470. proc liixxxsii example lil loi adi lil sti
  1471. with regorconst
  1472. kills all_mems
  1473. uses ADDREG={indir_r,regvar($1)}
  1474. gen axx* {indir_r, %a}, %1
  1475. killreg %a
  1476. pat lil loi adi lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1477. call liixxxsii("add")
  1478. pat lil loi adu lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1479. call liixxxsii("add")
  1480. pat lil loi ads lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1481. call liixxxsii("add")
  1482. pat lil loi and lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1483. call liixxxsii("and")
  1484. pat lil loi ior lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1485. call liixxxsii("or")
  1486. pat lil loi xor lil sti $1==$4 && $2==4 && $5==4 && $3==4 && inreg($1)>0
  1487. call liixxxsii("xor")
  1488. proc lolcrxxstl example lol loc sbi stl
  1489. kills regvar($1)
  1490. gen axx* {LOCAL,$1,4},{ANYCON,$2}
  1491. pat lol loc sbi stl $1==$4 && $3==4 && inreg($1)==reg_any
  1492. call lolcrxxstl("sub")
  1493. pat lol loc sbu stl $1==$4 && $3==4 && inreg($1)==reg_any
  1494. call lolcrxxstl("sub")
  1495. pat lol loc sli stl $1==$4 && $3==4 && inreg($1)==reg_any
  1496. call lolcrxxstl("sal")
  1497. pat lol loc slu stl $1==$4 && $3==4 && inreg($1)==reg_any
  1498. call lolcrxxstl("sal")
  1499. pat lol loc sri stl $1==$4 && $3==4 && inreg($1)==reg_any
  1500. call lolcrxxstl("sar")
  1501. pat lol loc sru stl $1==$4 && $3==4 && inreg($1)==reg_any
  1502. call lolcrxxstl("shr")
  1503. #endif
  1504. proc lolcxxstl example lol loc sbi stl
  1505. kills indir, locals %ind+%size>$1 && %ind<$1+4
  1506. gen axx* {LOCAL,$1,4},{ANYCON,$2}
  1507. pat lol loc sbi stl $1==$4 && $3==4 call lolcxxstl("sub")
  1508. pat lol loc sbu stl $1==$4 && $3==4 call lolcxxstl("sub")
  1509. pat lol loc adi stl $1==$4 && $3==4 call lolcxxstl("add")
  1510. pat lol loc adi stl $1==$4 && $3==4 call lolcxxstl("add")
  1511. pat lol loc sli stl $1==$4 && $3==4 call lolcxxstl("sal")
  1512. pat lol loc slu stl $1==$4 && $3==4 call lolcxxstl("sal")
  1513. pat lol loc sri stl $1==$4 && $3==4 call lolcxxstl("sar")
  1514. pat lol loc sru stl $1==$4 && $3==4 call lolcxxstl("shr")
  1515. proc loecxxste example loe loc sbi ste
  1516. kills mem_nonlocals
  1517. gen axx* {EXTERN,$1},{ANYCON,$2}
  1518. pat loe loc sbi ste $1==$4 && $3==4 call loecxxste("sub")
  1519. pat loe loc sbu ste $1==$4 && $3==4 call loecxxste("sub")
  1520. pat loe loc adu ste $1==$4 && $3==4 call loecxxste("add")
  1521. pat loe loc adi ste $1==$4 && $3==4 call loecxxste("add")
  1522. pat loe loc sli ste $1==$4 && $3==4 call loecxxste("sal")
  1523. pat loe loc slu ste $1==$4 && $3==4 call loecxxste("sal")
  1524. pat loe loc sri ste $1==$4 && $3==4 call loecxxste("sar")
  1525. pat loe loc sru ste $1==$4 && $3==4 call loecxxste("shr")
  1526. #ifdef REGVARS
  1527. proc lilcxxsil example lil loc sbi sil
  1528. kills mem_nonlocals
  1529. gen axx* {indir_r,regvar($1)},{ANYCON,$2}
  1530. pat lil loc sbi sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("sub")
  1531. pat lil loc sbu sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("sub")
  1532. pat lil loc adu sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("add")
  1533. pat lil loc adi sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("add")
  1534. pat lil loc sli sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("sal")
  1535. pat lil loc slu sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("sal")
  1536. pat lil loc sri sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("sar")
  1537. pat lil loc sru sil $1==$4 && $3==4 && inreg($1)>0 call lilcxxsil("shr")
  1538. pat lol ngi stl $1==$3 && $2==4 && inreg($1)==reg_any
  1539. kills regvar($1)
  1540. gen neg {LOCAL, $1, 4}
  1541. #endif
  1542. pat lol ngi stl $1==$3 && $2==4
  1543. kills indir, locals %ind+%size>$1 && %ind<$1+4
  1544. gen neg {LOCAL, $1, 4}
  1545. pat lol dup adp stl loi stl $1==$4 && $2==4 && $5<=4
  1546. leaving lol $1 loi $5 stl $6 lol $1 adp $3 stl $4
  1547. #ifdef REGVARS
  1548. pat lol dup adp stl loi loc loc cii $1==$4 && $2==4 && $5==1 && inreg($1) > 0 && $6==1 && $7==4
  1549. uses REG
  1550. gen movsxb %a,{indir_r1, regvar($1)}
  1551. yields %a
  1552. leaving lol $1 adp $3 stl $4
  1553. pat lol dup adp stl loi $1==$4 && $2==4 && $5==1 && inreg($1) > 0
  1554. uses REG1 = {indir_r1, regvar($1)}
  1555. yields %a
  1556. leaving lol $1 adp $3 stl $4
  1557. pat lol dup adp stl loi loc loc cii $1==$4 && $2==4 && $5==2 && inreg($1) > 0 && $6==2 && $7==4
  1558. uses REG
  1559. gen movsx %a,{indir_r2, regvar($1)}
  1560. yields %a
  1561. leaving lol $1 adp $3 stl $4
  1562. pat lol dup adp stl loi $1==$4 && $2==4 && $5==2 && inreg($1) > 0
  1563. uses REG2 = {indir_r2, regvar($1)}
  1564. yields %a
  1565. leaving lol $4 adp $3 stl $4
  1566. pat lol dup adp stl loi $1==$4 && $2==4 && $5==4 && inreg($1) > 0
  1567. uses REG = {indir_r, regvar($1)}
  1568. yields %a
  1569. leaving lol $4 adp $3 stl $4
  1570. pat adp stl inreg($2) > 0 leaving stl $2 lol $2 adp $1 stl $2
  1571. #endif
  1572. pat lol dup adp stl $1==$4 && $2==4
  1573. uses ADDREG={LOCAL,$1,4} yields %a
  1574. leaving lol $4 adp $3 stl $4
  1575. pat lol inl $1==$2
  1576. uses REG={LOCAL,$1,4} yields %a
  1577. leaving inl $1
  1578. pat lol del $1==$2
  1579. uses REG={LOCAL,$1,4} yields %a
  1580. leaving del $1
  1581. pat lol adp stl $1==$3 && $2==1 leaving inl $1
  1582. pat lol adp stl $1==$3 && $2==0-1 leaving del $1
  1583. pat lol adp stl $1==$3 leaving loc $2 lol $1 adi 4 stl $3
  1584. #ifdef REGVARS
  1585. pat lol com stl $1==$3 && $2==4 && inreg($1)==reg_any
  1586. kills regvar($1)
  1587. gen not {LOCAL,$1,4}
  1588. #endif
  1589. pat lol com stl $1==$3 && $2==4
  1590. kills indir, locals %ind+%size>$1 && %ind<$1+4
  1591. gen not {LOCAL, $1, 4}
  1592. #ifdef REGVARS
  1593. pat lil dup adp sil $1==$4 && $2==4 && inreg($1)==reg_any
  1594. uses ADDREG={indir_r, regvar($1)}
  1595. yields %a
  1596. leaving lil $4 adp $3 sil $4
  1597. pat lil dup inc sil $1==$4 && $2==4 && inreg($1)==reg_any
  1598. uses REG={indir_r, regvar($1)}
  1599. yields %a
  1600. leaving lil $4 inc sil $4
  1601. pat lil dup dec sil $1==$4 && $2==4 && inreg($1)==reg_any
  1602. uses REG={indir_r, regvar($1)}
  1603. yields %a
  1604. leaving lil $4 dec sil $4
  1605. #endif
  1606. pat lil adp sil $1==$3 && $2==1 leaving lil $1 inc sil $1
  1607. pat lil adp sil $1==$3 && $2==0-1 leaving lil $1 dec sil $1
  1608. pat lil adp sil $1==$3 leaving loc $2 lil $1 adi 4 sil $3
  1609. #ifdef REGVARS
  1610. pat lol lof lol lof adp lol stf
  1611. $1==$3 && $1==$6 && $2==$4 && $2==$7 && inreg($1)==reg_any
  1612. uses ADDREG={indir_r_off, regvar($1), $2}
  1613. yields %a
  1614. leaving lol $1 lof $2 adp $5 lol $6 stf $7
  1615. pat lol lof lol lof inc lol stf
  1616. $1==$3 && $1==$6 && $2==$4 && $2==$7 && inreg($1)==reg_any
  1617. uses REG={indir_r_off, regvar($1), $2}
  1618. yields %a
  1619. leaving lol $1 lof $2 inc lol $6 stf $7
  1620. pat lol lof lol lof dec lol stf
  1621. $1==$3 && $1==$6 && $2==$4 && $2==$7 && inreg($1)==reg_any
  1622. uses REG={indir_r_off, regvar($1), $2}
  1623. yields %a
  1624. leaving lol $1 lof $2 dec lol $6 stf $7
  1625. pat lol lof dup adp lol stf
  1626. $1==$5 && $2==$6 && $3==4 && inreg($1)==reg_any
  1627. uses REG={indir_r_off, regvar($1), $2}
  1628. yields %a
  1629. leaving lol $1 lof $2 adp $4 lol $1 stf
  1630. $2
  1631. pat lol lof dup inc lol stf
  1632. $1==$5 && $2==$6 && $3==4 && inreg($1)==reg_any
  1633. uses REG={indir_r_off, regvar($1), $2}
  1634. yields %a
  1635. leaving lol $1 lof $2 inc lol $1 stf $2
  1636. pat lol lof dup dec lol stf
  1637. $1==$5 && $2==$6 && $3==4 && inreg($1)==reg_any
  1638. uses REG={indir_r_off, regvar($1), $2}
  1639. yields %a
  1640. leaving lol $1 lof $2 dec lol $1 stf $2
  1641. #endif
  1642. pat lol lof adp lol stf $1==$4 && $2==$5
  1643. leaving loc $3 lol $1 lof $2 adi 4 lol $4 stf $5
  1644. pat lol lof dup adp lol stf
  1645. $1==$5 && $2==$6 && $3==4 && $4==1
  1646. kills all_mems
  1647. uses REG={LOCAL,$1,4}, REG
  1648. gen move {indir_r_off, %a, $2},%b
  1649. inc {indir_r_off, %a, $2}
  1650. yields %b
  1651. pat loe lof dup adp loe stf
  1652. $1==$5 && $2==$6 && $3==4 && $4==1
  1653. kills all_mems
  1654. uses REG={EXTERN,$1}, REG
  1655. gen move {indir_r_off, %a, $2},%b
  1656. inc {indir_r_off, %a, $2}
  1657. yields %b
  1658. pat loe loi dup adp loe sti
  1659. $1==$5 && $2==$6 && $3==4 && $2==4 && $4==1
  1660. kills all_mems
  1661. uses REG={EXTERN,$1}, REG
  1662. gen move {indir_r, %a},%b
  1663. inc {indir_r, %a}
  1664. yields %b
  1665. pat lol lof dup adp lol stf
  1666. $1==$5 && $2==$6 && $3==4 && $4==(0-1)
  1667. kills all_mems
  1668. uses REG={LOCAL,$1,4}, REG
  1669. gen move {indir_r_off, %a, $2},%b
  1670. dec {indir_r_off, %a, $2}
  1671. yields %b
  1672. pat loe lof dup adp loe stf
  1673. $1==$5 && $2==$6 && $3==4 && $4==(0-1)
  1674. kills all_mems
  1675. uses REG={EXTERN,$1}, REG
  1676. gen move {indir_r_off, %a, $2},%b
  1677. dec {indir_r_off, %a, $2}
  1678. yields %b
  1679. pat loe loi dup adp loe sti
  1680. $1==$5 && $2==$6 && $3==4 && $2==4 && $4==(0-1)
  1681. kills all_mems
  1682. uses REG={EXTERN,$1}, REG
  1683. gen move {indir_r, %a},%b
  1684. dec {indir_r, %a}
  1685. yields %b
  1686. pat lol lof dup adp lol stf
  1687. $1==$5 && $2==$6 && $3==4
  1688. kills all_mems
  1689. uses REG={LOCAL,$1,4}, REG
  1690. gen move {indir_r_off, %a, $2},%b
  1691. add {indir_r_off, %a, $2}, {ANYCON, $4}
  1692. yields %b
  1693. pat loe lof dup adp loe stf
  1694. $1==$5 && $2==$6 && $3==4
  1695. kills all_mems
  1696. uses REG={EXTERN,$1}, REG
  1697. gen move {indir_r_off, %a, $2},%b
  1698. add {indir_r_off, %a, $2}, {ANYCON, $4}
  1699. yields %b
  1700. pat loe loi dup adp loe sti
  1701. $1==$5 && $2==$6 && $3==4 && $2==4
  1702. kills all_mems
  1703. uses REG={EXTERN,$1}, REG
  1704. gen move {indir_r, %a},%b
  1705. add {indir_r, %a}, {ANYCON, $4}
  1706. yields %b
  1707. pat loe ngi ste $1==$3 && $2==4
  1708. kills mem_nonlocals
  1709. gen neg {EXTERN, $1}
  1710. pat loe dup adp ste $1==$4 && $2==4
  1711. uses REG={EXTERN,$1} yields %a
  1712. leaving loe $1 adp $3 ste $1
  1713. pat loe ine $1==$2
  1714. uses REG={EXTERN,$1} yields %a
  1715. leaving ine $1
  1716. pat loe dee $1==$2
  1717. uses REG={EXTERN,$1} yields %a
  1718. leaving dee $1
  1719. pat loe adp ste $1==$3 && $2==1 leaving ine $1
  1720. pat loe adp ste $1==$3 && $2==0-1 leaving dee $1
  1721. pat loe adp ste $1==$3 leaving loc $2 loe $1 adi 4 ste $3
  1722. pat loe com ste $1==$3 && $2==4
  1723. kills mem_nonlocals
  1724. gen not {EXTERN, $1}
  1725. pat loe lof adp loe stf $1==$4 && $2==$5
  1726. leaving loc $3 loe $1 lof $2 adi 4 loe $1 stf $2
  1727. pat loe loi adp loe sti $1==$4 && $2==$5 && $2==4
  1728. leaving loc $3 loe $1 loi $2 adi 4 loe $1 sti $2
  1729. pat lil lof adp lil stf $1==$4 && $2==$5 && $3==1
  1730. leaving lil $1 lof $2 inc lil $1 stf $2
  1731. pat lil lof adp lil stf $1==$4 && $2==$5 && $3==0-1
  1732. leaving lil $1 lof $2 dec lil $1 stf $2
  1733. pat lil lof adp lil stf $1==$4 && $2==$5
  1734. leaving loc $3 lil $1 lof $2 adi 4 lil $1 stf $2
  1735. pat lil loi adp lil sti $1==$4 && $2==$5 && $2==4 && $3==1
  1736. leaving lil $1 loi $2 inc lil $1 sti $2
  1737. pat lil loi adp lil sti $1==$4 && $2==$5 && $2==4 && $3==0-1
  1738. leaving lil $1 loi $2 dec lil $1 sti $2
  1739. pat lil loi adp lil sti $1==$4 && $2==$5 && $2==4
  1740. leaving loc $3 lil $1 loi $2 adi 4 lil $1 sti $2
  1741. /*******************************************************************
  1742. * Group 8: Convert Instructions *
  1743. *******************************************************************/
  1744. pat cii
  1745. with CXREG DXREG ACC
  1746. kills ALL
  1747. gen proccall {label,".cii"} yields %3
  1748. pat ciu leaving cuu
  1749. pat cui leaving cuu
  1750. pat cuu
  1751. pat loc loc cii zeq $1==1
  1752. with GENREG STACK
  1753. gen test %1.1
  1754. je {label, $4}
  1755. pat loc loc cii zne $1==1
  1756. with GENREG STACK
  1757. gen test %1.1
  1758. jne {label, $4}
  1759. pat loc loc cii loc and zeq $4<256 && $4>=0 && $5==4 && $1==1 && $2==4
  1760. leaving loc $4 and $5 zeq $6
  1761. pat loc loc cii loc and zne $4<256 && $4>=0 && $5==4 && $1==1 && $2==4
  1762. leaving loc $4 and $5 zne $6
  1763. pat loc loc cii loc and zeq $4<65536 && $4>=0 && $5==4 && $1==2 && $2==4
  1764. leaving loc $4 and $5 zeq $6
  1765. pat loc loc cii loc and zne $4<65536 && $4>=0 && $5==4 && $1==2 && $2==4
  1766. leaving loc $4 and $5 zne $6
  1767. pat loc loc cii $1==1 && $2==4
  1768. with ACC
  1769. gen movsxb %1,%1 yields eax
  1770. with exact rm1
  1771. uses reusing %1, GENREG
  1772. gen movsxb %a,%1 yields %a
  1773. pat loc loc cii $1==2 && $2==4
  1774. with ACC
  1775. gen movsx %1,%1 yields eax
  1776. with exact rm2
  1777. uses reusing %1,GENREG
  1778. gen movsx %a,%1 yields %a
  1779. pat loc loc ciu leaving loc $1 loc $2 cuu
  1780. pat loc loc cui leaving loc $1 loc $2 cuu
  1781. pat loc loc cuu $1==$2
  1782. pat loc loc cif $1==4 && $2==4 leaving loc 4 cal ".cif4" asp 4
  1783. pat loc loc cif $1==4 && $2==8 leaving loc 4 cal ".cif8"
  1784. pat loc loc cuf $1==4 && $2==4 leaving loc 4 cal ".cuf4" asp 4
  1785. pat loc loc cuf $1==4 && $2==8 leaving loc 4 cal ".cuf8"
  1786. pat loc loc cfi leaving loc $1 loc $2 cal ".cfi" asp 8+($1-4)
  1787. pat loc loc cfu leaving loc $1 loc $2 cal ".cfu" asp 8+($1-4)
  1788. pat loc loc cff $1==8 && $2==4 leaving cal ".cff4" asp 4
  1789. pat loc loc cff $1==4 && $2==8
  1790. with REG
  1791. kills ALL
  1792. gen push {ANYCON,0}
  1793. push %1 leaving cal ".cff8"
  1794. /********************************************************************
  1795. * Group 9 : Logical Instructions *
  1796. ********************************************************************/
  1797. pat and $1==4
  1798. with REG rmorconst
  1799. gen and %1,%2 yields %1
  1800. with rmorconst REG
  1801. gen and %2,%1 yields %2
  1802. pat loc and $1==255 && $2==4
  1803. with GENREG yields %1.1
  1804. pat and $1==8
  1805. with EXACT REG REG rmorconst rmorconst
  1806. gen and %1,%3
  1807. and %2,%4 yields %2 %1
  1808. with rmorconst rmorconst REG REG
  1809. gen and %3,%1
  1810. and %4,%2 yields %4 %3
  1811. pat and defined($1)
  1812. kills ALL
  1813. gen mov ecx,{ANYCON,$1}
  1814. proccall {label, ".and"}
  1815. pat and !defined($1)
  1816. with CXREG
  1817. kills ALL
  1818. gen proccall {label, ".and"}
  1819. pat ior $1==4
  1820. with REG rmorconst
  1821. gen or %1,%2 yields %1
  1822. with rmorconst REG
  1823. gen or %2,%1 yields %2
  1824. pat ior $1==8
  1825. with EXACT REG REG rmorconst rmorconst
  1826. gen or %1,%3
  1827. or %2,%4 yields %2 %1
  1828. with rmorconst rmorconst REG REG
  1829. gen or %3,%1
  1830. or %4,%2 yields %4 %3
  1831. pat ior defined($1)
  1832. kills ALL
  1833. gen mov ecx,{ANYCON,$1}
  1834. proccall {label, ".ior"}
  1835. pat ior !defined($1)
  1836. with CXREG
  1837. kills ALL
  1838. gen proccall {label, ".ior"}
  1839. pat xor $1==4
  1840. with REG rmorconst
  1841. gen xor %1,%2 yields %1
  1842. with rmorconst REG
  1843. gen xor %2,%1 yields %2
  1844. pat xor $1==8
  1845. with EXACT REG REG rmorconst rmorconst
  1846. gen xor %1,%3
  1847. xor %2,%4 yields %2 %1
  1848. with rmorconst rmorconst REG REG
  1849. gen xor %3,%1
  1850. xor %4,%2 yields %4 %3
  1851. pat xor defined($1)
  1852. kills ALL
  1853. gen mov ecx,{ANYCON,$1}
  1854. proccall {label, ".xor"}
  1855. pat xor !defined($1)
  1856. with CXREG
  1857. kills ALL
  1858. gen proccall {label, ".xor"}
  1859. pat com $1==4
  1860. with REG
  1861. gen not %1 yields %1
  1862. pat com $1==8
  1863. with REG REG
  1864. gen not %2
  1865. not %1 yields %2 %1
  1866. pat com defined($1)
  1867. kills ALL
  1868. gen mov ecx,{ANYCON,$1}
  1869. proccall {label, ".com"}
  1870. pat com !defined($1)
  1871. with CXREG
  1872. kills ALL
  1873. gen proccall {label, ".com"}
  1874. pat rol $1==4
  1875. with SHIFT_CREG REG
  1876. gen rol %2,cl yields %2
  1877. with ANYCON REG
  1878. gen rol %2,%1 yields %2
  1879. pat ror $1==4
  1880. with SHIFT_CREG REG
  1881. gen ror %2,cl yields %2
  1882. with ANYCON REG
  1883. gen ror %2,%1 yields %2
  1884. /*******************************************************************
  1885. * Group 10 : Set Instructions *
  1886. *******************************************************************/
  1887. pat inn $1==4
  1888. with SHIFT_CREG REG
  1889. gen shr %2,cl
  1890. and %2,{ANYCON, 1} yields %2
  1891. with ANYCON REG
  1892. gen shr %2,%1
  1893. and %2,{ANYCON, 1} yields %2
  1894. pat loc inn $1==0 && $2==4
  1895. with REG
  1896. gen and %1,{ANYCON, 1} yields %1
  1897. pat inn defined($1)
  1898. with ACC
  1899. kills ALL
  1900. gen mov ecx,{ANYCON, $1}
  1901. proccall {label,".inn"} yields eax
  1902. pat inn !defined($1)
  1903. with CXREG ACC
  1904. kills ALL
  1905. gen proccall {label,".inn"} yields eax
  1906. pat loc inn zeq $2==4
  1907. with rm STACK
  1908. gen check %1,{ANYCON,1<<$1}
  1909. je {label,$3}
  1910. pat loc inn zne $2==4
  1911. with rm STACK
  1912. gen check %1,{ANYCON,1<<$1}
  1913. jne {label,$3}
  1914. pat set $1==4
  1915. with SHIFT_CREG
  1916. uses REG={ANYCON, 1}
  1917. gen shl %a,cl yields %a
  1918. pat set defined($1)
  1919. with ACC
  1920. kills ALL
  1921. gen mov ecx,{ANYCON, $1}
  1922. proccall {label,".set"}
  1923. pat set !defined($1)
  1924. with CXREG ACC
  1925. kills ALL
  1926. gen proccall {label,".set"}
  1927. /********************************************************************
  1928. * Group 11 : Array Instructions *
  1929. ********************************************************************/
  1930. pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)==0
  1931. leaving ads 4
  1932. pat lae aar $2==4 && rom($1,3)==1 && rom($1,1)!=0
  1933. leaving adp 0-rom($1,1) ads 4
  1934. pat lae aar $2==4 && rom($1,3)==2 && rom($1,1)==0
  1935. leaving loc 1 sli 4 ads 4
  1936. pat lae aar $2==4 && rom($1,3)==2 && rom($1,1)!=0
  1937. leaving adp 0-rom($1,1) loc 1 sli 4 ads 4
  1938. pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)==0
  1939. leaving loc 2 sli 4 ads 4
  1940. pat lae aar $2==4 && rom($1,3)==4 && rom($1,1)!=0
  1941. leaving adp 0-rom($1,1) loc 2 sli 4 ads 4
  1942. pat lae aar $2==4 && rom($1,3)==8 && rom($1,1)==0
  1943. leaving loc 3 sli 4 ads 4
  1944. pat lae aar $2==4 && rom($1,3)==8 && rom($1,1)!=0
  1945. leaving adp 0-rom($1,1) loc 3 sli 4 ads 4
  1946. pat lae aar $2==4 && rom($1,1)==0
  1947. with ADDREG
  1948. gen imul %1,%1,{ANYCON,rom($1,3)} yields %1 leaving ads 4
  1949. pat lae aar $2==4 && defined(rom($1,1))
  1950. with ADDREG
  1951. gen imul %1,%1,{ANYCON,rom($1,3)} yields %1
  1952. leaving adp 0-rom($1,1)*rom($1,3) ads 4
  1953. /* when followed by an LOI or STI instruction, use indexed mode */
  1954. pat loc sli ads loi ($1==1 || $1==2 || $1==3) && $2==4 && $3==4
  1955. with IREG ADDR_LOCAL yields {indexed_r_off,ebp,%1,1<<$1,%2.ind}
  1956. leaving loi $4
  1957. with IREG ADDR_EXTERN yields {indexed_off,%1,1<<$1,%2.off}
  1958. leaving loi $4
  1959. with IREG ADDREG yields {indexed_r_off,%2,%1,1<<$1,0}
  1960. leaving loi $4
  1961. pat loc sli ads sti ($1==1 || $1==2 || $1==3) && $2==4 && $3==4
  1962. with IREG ADDR_LOCAL yields {indexed_r_off,ebp,%1,1<<$1,%2.ind}
  1963. leaving sti $4
  1964. with IREG ADDR_EXTERN yields {indexed_off,%1,1<<$1,%2.off}
  1965. leaving sti $4
  1966. with IREG ADDREG yields {indexed_r_off,%2,%1,1<<$1,0}
  1967. leaving sti $4
  1968. pat loc sli ads ($1==1 || $1==2 || $1==3) && $2==4 && $3==4
  1969. with IREG ADDR_LOCAL yields {indexed_r_off,ebp,%1,1<<$1,%2.ind}
  1970. with IREG ADDR_EXTERN yields {indexed_off,%1,1<<$1,%2.off}
  1971. with IREG ADDREG yields {indexed_r_off,%2,%1,1<<$1,0}
  1972. with REG rmorconst
  1973. gen sal %1,{ANYCON,$1} yields %2 %1 leaving ads 4
  1974. pat aar $1==4
  1975. with AREG REG
  1976. gen sub %2,{indir_r,%1}
  1977. imul %2,{indir_r_off,%1,8} yields %2 leaving ads 4
  1978. with reg_off REG
  1979. gen sub %2,{indir_r_off, %1.reg, %1.off}
  1980. imul %2,{indir_r_off, %1.reg, 8+%1.off}
  1981. yields %2 leaving ads 4
  1982. with ADDR_LOCAL REG
  1983. gen sub %2,{LOCAL,%1.ind,4}
  1984. imul %2,{LOCAL,8+%1.ind,4} yields %2 leaving ads 4
  1985. with ADDR_EXTERN REG
  1986. gen sub %2,{EXTERN,%1.off}
  1987. imul %2,{EXTERN,8+%1.off} yields %2 leaving ads 4
  1988. pat lae lar defined(rom($1,3)) leaving lae $1 aar $2 loi rom($1,3)
  1989. pat lae sar defined(rom($1,3)) leaving lae $1 aar $2 sti rom($1,3)
  1990. pat aar !defined($1)
  1991. kills ALL
  1992. gen proccall {label,".iaar"} yields ebx
  1993. pat sar $1==4
  1994. with BXREG ACC
  1995. kills ALL
  1996. gen proccall {label,".sar4"}
  1997. pat sar !defined($1)
  1998. kills ALL
  1999. gen proccall {label,".isar"}
  2000. pat lar $1==4
  2001. with BXREG ACC
  2002. kills ALL
  2003. gen proccall {label,".lar4"}
  2004. pat lar !defined($1)
  2005. kills ALL
  2006. gen proccall {label,".ilar"}
  2007. /*******************************************************************
  2008. * Group 12 : Compare Instructions *
  2009. *******************************************************************/
  2010. pat cmi $1==4
  2011. with register rmorconst
  2012. uses REG={ANYCON,0}
  2013. gen cmp %1,%2
  2014. je {label,2f}
  2015. jl {label,1f}
  2016. inc %a
  2017. jmp {label,2f}
  2018. 1:
  2019. dec %a
  2020. 2: yields %a
  2021. with rmorconst register
  2022. uses REG={ANYCON,0}
  2023. gen cmp %2,%1
  2024. je {label,2f}
  2025. jg {label,1f}
  2026. inc %a
  2027. jmp {label,2f}
  2028. 1:
  2029. dec %a
  2030. 2: yields %a
  2031. pat cmu $1==4 leaving cmp
  2032. pat cms $1==4
  2033. with REG rmorconst
  2034. gen sub %1,%2 yields %1
  2035. with rmorconst REG
  2036. gen sub %2,%1 yields %2
  2037. pat cms $1==8
  2038. with rmorconst rmorconst REG REG
  2039. gen sub %3,%1
  2040. sbb %4,%2
  2041. or %4,%3 yields %4
  2042. with REG REG rmorconst rmorconst
  2043. gen sub %1,%3
  2044. sbb %2,%4
  2045. or %2,%1 yields %2
  2046. pat cms defined($1)
  2047. kills ALL
  2048. gen mov ecx,{ANYCON,$1}
  2049. proccall {label,".cms"} yields ecx
  2050. pat cms !defined($1)
  2051. with CXREG
  2052. kills ALL
  2053. gen proccall {label,".cms"} yields ecx
  2054. pat cmf $1==4
  2055. kills ALL
  2056. gen proccall {label,".cmf4"} leaving asp 8 lfr 4
  2057. pat cmf $1==8
  2058. kills ALL
  2059. gen proccall {label,".cmf8"} leaving asp 16 lfr 4
  2060. pat cmp
  2061. with register rmorconst
  2062. uses REG = {ANYCON,0}
  2063. gen cmp %1,%2
  2064. je {label,2f}
  2065. jb {label,1f}
  2066. inc %a
  2067. jmp {label,2f}
  2068. 1: dec %a
  2069. 2: yields %a
  2070. with rmorconst register
  2071. uses REG = {ANYCON,0}
  2072. gen cmp %2,%1
  2073. je {label,2f}
  2074. ja {label,1f}
  2075. inc %a
  2076. jmp {label,2f}
  2077. 1: dec %a
  2078. 2: yields %a
  2079. proc txx
  2080. with rm
  2081. uses GENREG = {ANYCON,0}
  2082. gen test %1
  2083. setxx* %a.1 yields %a
  2084. pat tlt call txx("sets")
  2085. pat teq call txx("sete")
  2086. pat tne call txx("setne")
  2087. pat tge call txx("setns")
  2088. /* Explicit test for TLE and TGT. We must make sure that the OC
  2089. flag is cleared.
  2090. */
  2091. pat tle
  2092. with rm
  2093. uses GENREG = {ANYCON,0}
  2094. gen
  2095. killcc.
  2096. test %1
  2097. setle %a.1
  2098. yields %a
  2099. pat tgt
  2100. with rm
  2101. uses GENREG = {ANYCON,0}
  2102. gen
  2103. killcc.
  2104. test %1
  2105. setg %a.1
  2106. yields %a
  2107. proc txxior
  2108. with rm REG
  2109. gen test %1
  2110. jxx* {label,1f}
  2111. or %2,{ANYCON,1}
  2112. 1: yields %2
  2113. pat tlt ior $2==4 call txxior("jge")
  2114. pat tle ior $2==4 call txxior("jg")
  2115. pat teq ior $2==4 call txxior("jne")
  2116. pat tne ior $2==4 call txxior("je")
  2117. pat tge ior $2==4 call txxior("jl")
  2118. pat tgt ior $2==4 call txxior("jle")
  2119. proc cmixxior
  2120. with regorconst rm REG
  2121. gen cmp %2,%1
  2122. jxx* {label,1f}
  2123. or %3,{ANYCON,1}
  2124. 1: yields %3
  2125. pat cmi tlt ior $1==4 && $3==4 call cmixxior("jge")
  2126. pat cmi tle ior $1==4 && $3==4 call cmixxior("jg")
  2127. pat cmi teq ior $1==4 && $3==4 call cmixxior("jne")
  2128. pat cmi tne ior $1==4 && $3==4 call cmixxior("je")
  2129. pat cmi tge ior $1==4 && $3==4 call cmixxior("jl")
  2130. pat cmi tgt ior $1==4 && $3==4 call cmixxior("jle")
  2131. proc cmxtxx
  2132. with regorconst rm
  2133. uses REG = {ANYCON,0}
  2134. gen cmp %2,%1
  2135. jxx[1] {label,1f}
  2136. inc %a
  2137. 1: yields %a
  2138. with rm regorconst
  2139. uses REG = {ANYCON,0}
  2140. gen cmp %1,%2
  2141. jxx[2] {label,1f}
  2142. inc %a
  2143. 1: yields %a
  2144. pat cmi tlt $1==4 call cmxtxx("jge","jle")
  2145. pat cmi tle $1==4 call cmxtxx("jg","jl")
  2146. pat cmi teq $1==4 call cmxtxx("jne","jne")
  2147. pat cmi tne $1==4 call cmxtxx("je","je")
  2148. pat cmi tge $1==4 call cmxtxx("jl","jg")
  2149. pat cmi tgt $1==4 call cmxtxx("jle","jge")
  2150. pat cmp tlt call cmxtxx("jae","jbe")
  2151. pat cmp tle call cmxtxx("ja","jb")
  2152. pat cmp teq call cmxtxx("jne","jne")
  2153. pat cmp tne call cmxtxx("je","je")
  2154. pat cmp tge call cmxtxx("jb","ja")
  2155. pat cmp tgt call cmxtxx("jbe","jae")
  2156. pat cms teq $1==4 call cmxtxx("jne","jne")
  2157. pat cms tne $1==4 call cmxtxx("je","je")
  2158. proc cmxzxx example cmp zlt
  2159. with regorconst rm STACK
  2160. gen cmp %2,%1
  2161. jxx[1] {label,$2}
  2162. with rm regorconst STACK
  2163. gen cmp %1,%2
  2164. jxx[2] {label,$2}
  2165. pat cmp zlt call cmxzxx("jb","ja")
  2166. pat cmp zle call cmxzxx("jbe","jae")
  2167. pat cmp zeq call cmxzxx("je","je")
  2168. pat cmp zne call cmxzxx("jne","jne")
  2169. pat cmp zge call cmxzxx("jae","jbe")
  2170. pat cmp zgt call cmxzxx("ja","jb")
  2171. pat cms zeq $1==4 call cmxzxx("je","je")
  2172. pat cms zne $1==4 call cmxzxx("jne","jne")
  2173. pat cms zne $1==8
  2174. with regorconst regorconst rm rm STACK
  2175. gen cmp %3,%1
  2176. jne {label,$2}
  2177. cmp %4,%2
  2178. jne {label,$2}
  2179. with rm rm regorconst regorconst STACK
  2180. kills ALL
  2181. gen cmp %1,%3
  2182. jne {label,$2}
  2183. cmp %2,%4
  2184. jne {label,$2}
  2185. pat cms zeq $1==8
  2186. with regorconst regorconst rm rm STACK
  2187. gen cmp %3,%1
  2188. jne {label, 1f}
  2189. cmp %4,%2
  2190. je {label,$2}
  2191. 1:
  2192. with rm rm regorconst regorconst STACK
  2193. kills ALL
  2194. gen cmp %1,%3
  2195. jne {label,1f}
  2196. cmp %2,%4
  2197. je {label,$2}
  2198. 1:
  2199. proc andzxx example and zeq
  2200. with regorconst rm STACK
  2201. gen check %2,%1
  2202. jxx* {label,$2}
  2203. with exact rm regorconst
  2204. kills ALL
  2205. gen check %1,%2
  2206. jxx* {label,$2}
  2207. pat and zeq $1==4 call andzxx("je")
  2208. pat and zne $1==4 call andzxx("jne")
  2209. proc locandzxx example loc and zeq
  2210. with rm1 STACK
  2211. gen testb %1,{ANYCON,$1}
  2212. jxx* {label,$3}
  2213. with GENREG STACK
  2214. gen testb %1.1,{ANYCON,$1}
  2215. jxx* {label,$3}
  2216. with exact RREG
  2217. kills ALL
  2218. gen check %1,{ANYCON,$1}
  2219. jxx* {label,$3}
  2220. pat loc and zeq $1<256 && $1>=0 && $2==4 call locandzxx("je")
  2221. pat loc and zne $1<256 && $1>=0 && $2==4 call locandzxx("jne")
  2222. proc locbxx example loc beq
  2223. with rm1 STACK
  2224. gen cmpb %1,{ANYCON,$1}
  2225. jxx* {label,$2}
  2226. with rm STACK
  2227. gen cmp %1,{ANYCON,$1}
  2228. jxx* {label,$2}
  2229. pat loc beq $1<256 && $1>=0 call locbxx("je")
  2230. pat loc bne $1<256 && $1>=0 call locbxx("jne")
  2231. proc loccmuzxx example loc cmu zeq
  2232. with rm1 STACK
  2233. gen cmpb %1,{ANYCON,$1}
  2234. jxx* {label,$3}
  2235. with rm STACK
  2236. gen cmp %1,{ANYCON,$1}
  2237. jxx* {label,$3}
  2238. pat loc cmu zeq $1<256 && $1>=0 && $2==4 call loccmuzxx("je")
  2239. pat loc cmu zne $1<256 && $1>=0 && $2==4 call loccmuzxx("jne")
  2240. /*******************************************************************
  2241. * Group 13 : Branch Instructions *
  2242. *******************************************************************/
  2243. pat lab topeltsize($1)==4 && !fallthrough($1)
  2244. with STACK
  2245. kills ALL
  2246. gen labeldef $1 yields eax
  2247. pat lab topeltsize($1)==4 && fallthrough($1)
  2248. with ACC STACK
  2249. kills ALL
  2250. gen labeldef $1 yields eax
  2251. pat lab topeltsize($1)!=4
  2252. with STACK
  2253. kills ALL
  2254. gen labeldef $1
  2255. pat bra topeltsize($1)==4
  2256. with ACC STACK
  2257. gen jmp {label,$1}
  2258. pat bra topeltsize($1)!=4
  2259. with STACK
  2260. gen jmp {label,$1}
  2261. proc bxx example blt
  2262. with regorconst rm STACK
  2263. gen cmp %2,%1
  2264. jxx[1] {label,$1}
  2265. with rm regorconst STACK
  2266. gen cmp %1,%2
  2267. jxx[2] {label,$1}
  2268. pat blt call bxx("jl","jg")
  2269. pat ble call bxx("jle","jge")
  2270. pat beq call bxx("je","je")
  2271. pat bne call bxx("jne","jne")
  2272. pat bge call bxx("jge","jle")
  2273. pat bgt call bxx("jg","jl")
  2274. proc zxx example zlt
  2275. with rm STACK
  2276. gen test %1
  2277. jxx* {label,$1}
  2278. pat zlt call zxx("js")
  2279. pat zge call zxx("jns")
  2280. /* Explicit test for ZLE and ZGT. We must make sure that the OC
  2281. flag is cleared.
  2282. */
  2283. pat zle
  2284. with rm STACK
  2285. gen
  2286. killcc.
  2287. test %1
  2288. jle {label,$1}
  2289. pat zgt
  2290. with rm STACK
  2291. gen
  2292. killcc.
  2293. test %1
  2294. jg {label, $1}
  2295. pat zne
  2296. with rm+rm1 STACK
  2297. gen test %1
  2298. jne {label,$1}
  2299. pat zeq
  2300. with rm+rm1 STACK
  2301. gen test %1
  2302. je {label,$1}
  2303. /*******************************************************************
  2304. * Group 14 : Procedure-call Instructions *
  2305. *******************************************************************/
  2306. pat cal
  2307. kills ALL
  2308. gen proccall {label,$1}
  2309. pat cai
  2310. with rm
  2311. kills ALL
  2312. gen proccall %1
  2313. #ifdef REGVARS
  2314. pat lfr adi stl $1==4 && $2==4 && inreg($3) > 0
  2315. kills ALL
  2316. gen pop {LOCAL,$3,4}
  2317. add {LOCAL,$3,4}, eax
  2318. #endif
  2319. pat lfr $1==4 yields eax
  2320. pat lfr $1==8 yields edx eax
  2321. pat ret $1==0
  2322. kills ALL
  2323. gen
  2324. #ifdef REGVARS
  2325. return
  2326. #else
  2327. leave.
  2328. ret.
  2329. #endif
  2330. pat ret $1==4
  2331. with ACC
  2332. kills ALL
  2333. gen
  2334. #ifdef REGVARS
  2335. return
  2336. #else
  2337. leave.
  2338. ret.
  2339. #endif
  2340. pat ret $1==8
  2341. with ACC DXREG
  2342. kills ALL
  2343. gen
  2344. #ifdef REGVARS
  2345. return
  2346. #else
  2347. leave.
  2348. ret.
  2349. #endif
  2350. /********************************************************************
  2351. * Group 15 : Miscellaneous Instructions *
  2352. ********************************************************************/
  2353. pat asp $1==4
  2354. with exact a_word
  2355. with STACK
  2356. uses CXREG /* GENREG may contain lfr area */
  2357. gen pop %a
  2358. pat asp $1==8
  2359. with exact a_word a_word
  2360. with STACK
  2361. uses CXREG /* GENREG may contain lfr area */
  2362. gen pop %a
  2363. pop %a
  2364. pat asp $1==0-4
  2365. with STACK yields ebp
  2366. pat asp
  2367. with STACK
  2368. gen add esp,{ANYCON,$1}
  2369. pat ass $1==4
  2370. with rmorconst STACK
  2371. gen add esp,%1
  2372. pat ass !defined($1)
  2373. with rm rmorconst STACK
  2374. gen cmp %1,{ANYCON,4}
  2375. jne {label, ".unknown"}
  2376. add esp,%2
  2377. pat blm $1==0 leaving asp 4
  2378. pat blm $1>0
  2379. kills ALL
  2380. gen mov ecx,{ANYCON,$1/4}
  2381. proccall {label, ".blm"}
  2382. pat bls $1==4
  2383. with CXREG
  2384. kills ALL
  2385. gen sar ecx,{ANYCON,2}
  2386. proccall {label, ".blm"}
  2387. pat bls !defined($1)
  2388. with rm-CXREG CXREG
  2389. kills ALL
  2390. gen cmp %1,{ANYCON,4}
  2391. jne {label, ".unknown"}
  2392. sar ecx,{ANYCON,2}
  2393. proccall {label, ".blm"}
  2394. pat csa $1==4
  2395. with BXREG ACC
  2396. kills ALL
  2397. gen jmp {label, ".csa4"}
  2398. pat csa !defined($1)
  2399. with rm-BXREG-ACC BXREG ACC
  2400. kills ALL
  2401. gen cmp %1,{ANYCON,4}
  2402. jne {label, ".unknown"}
  2403. jmp {label, ".csa4"}
  2404. pat csb $1==4
  2405. with BXREG ACC
  2406. kills ALL
  2407. gen jmp {label, ".csb4"}
  2408. pat csb !defined($1)
  2409. with rm-BXREG-ACC BXREG ACC
  2410. gen cmp %1,{ANYCON,4}
  2411. jne {label, ".unknown"}
  2412. jmp {label, ".csb4"}
  2413. pat dup $1==4
  2414. with anyreg yields %1 %1
  2415. with ACC1 yields %1 %1
  2416. pat dup $1==8
  2417. with regorconst regorconst yields %2 %1 %2 %1
  2418. pat dup
  2419. kills ALL
  2420. gen mov ecx,{ANYCON,$1}
  2421. proccall {label, ".dup"}
  2422. pat dus $1==4
  2423. with CXREG
  2424. kills ALL
  2425. gen proccall {label, ".dup"}
  2426. pat dus !defined($1)
  2427. with rm-CXREG CXREG
  2428. kills ALL
  2429. gen cmp %1,{ANYCON,4}
  2430. jne {label, ".unknown"}
  2431. proccall {label, ".dup"}
  2432. pat exg $1==4
  2433. with a_word a_word yields %1 %2
  2434. pat exg $1==8
  2435. with a_word a_word a_word a_word yields %2 %1 %4 %3
  2436. pat exg defined($1)
  2437. kills ALL
  2438. gen mov ecx,{ANYCON,$1}
  2439. proccall {label, ".exg"}
  2440. pat exg
  2441. with CXREG
  2442. kills ALL
  2443. gen proccall {label, ".exg"}
  2444. pat gto
  2445. kills ALL
  2446. gen mov ebx,{ADDR_EXTERN,$1}
  2447. jmp {label, ".gto"}
  2448. pat fil
  2449. gen mov {EXTERN,"hol0+4"},{ADDR_EXTERN,$1}
  2450. pat lim
  2451. uses REG
  2452. gen mov %a,{EXTERN,".ignmask"} yields %a
  2453. pat lin
  2454. gen mov {EXTERN,"hol0"},{ANYCON,$1}
  2455. pat lni
  2456. gen inc {EXTERN,"hol0"}
  2457. pat lor $1==0 yields ebp
  2458. pat lor $1==1
  2459. with STACK
  2460. uses REG
  2461. gen mov %a,esp yields %a
  2462. pat lor $1==2
  2463. uses REG
  2464. gen mov %a,{EXTERN,".reghp"} yields %a
  2465. pat mon
  2466. with ACC
  2467. kills ALL
  2468. gen proccall {label, ".mon"}
  2469. pat nop
  2470. kills ALL
  2471. #ifdef DEBUG
  2472. gen proccall {label, ".nop"}
  2473. #endif
  2474. pat rck $1==4
  2475. with BXREG ACC
  2476. kills ALL
  2477. gen proccall {label, ".rck"} yields eax
  2478. pat rck !defined($1)
  2479. with rm-BXREG-ACC BXREG ACC
  2480. kills ALL
  2481. gen cmp %1,{ANYCON,4}
  2482. jne {label, ".unknown"}
  2483. proccall {label, ".rck"} yields eax
  2484. pat rtt leaving ret 0
  2485. pat sig
  2486. with REG
  2487. gen xchg {EXTERN,".trppc"},%1 yields %1
  2488. pat sim
  2489. with regorconst
  2490. gen mov {EXTERN,".ignmask"},%1
  2491. pat str $1==0
  2492. with rmorconst
  2493. gen mov ebp,%1
  2494. pat str $1==1
  2495. with rmorconst STACK
  2496. gen mov esp,%1
  2497. pat str $1==2
  2498. kills ALL
  2499. gen proccall {label, ".strhp"}
  2500. pat trp
  2501. with ACC
  2502. kills ALL
  2503. gen proccall {label, ".Xtrp"}