ppu.c 29 KB

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  1. /*
  2. * PPU emulation - The TI-NESulator Project
  3. * ppu.c
  4. *
  5. * Define and emulate the PPU (Picture Processing Unit) of the real NES
  6. *
  7. * Created by Manoel TRAPIER.
  8. * Copyright (c) 2003-2008 986Corp. All rights reserved.
  9. *
  10. * $LastChangedDate$
  11. * $Author$
  12. * $HeadURL$
  13. * $Revision$
  14. *
  15. */
  16. /* Allegro includes */
  17. #ifdef __APPLE__
  18. #define USE_CONSOLE
  19. #include <Allegro/allegro.h>
  20. #else
  21. #define USE_CONSOLE
  22. #include <allegro.h>
  23. #endif
  24. #include <stdio.h>
  25. #include <stdlib.h>
  26. #define __TINES_PPU_INTERNAL__
  27. #include <ppu/ppu.h>
  28. #include <ppu/ppu.memory.h>
  29. #include <ppu/ppu.debug.h>
  30. #include <memory/manager.h>
  31. #include <os_dependent.h>
  32. #define __TINES_PLUGINS__
  33. #include <plugins/manager.h>
  34. extern int VBLANK_TIME;
  35. extern BITMAP *Buffer;
  36. volatile extern int frame;
  37. volatile extern unsigned long IPS, FPS;
  38. extern unsigned long ColorPalette[ 9 * 63 ];
  39. extern short IRQScanHit;
  40. BITMAP *VideoBuffer; /* The ppu will only write pixel to this, and then bliting
  41. this on the screen "surface" */
  42. /* PPU sprite sorted by scanline */
  43. /* Work as follow:
  44. 3322 2222 2222 1111 1111 1100 0000 0000
  45. 1098 7654 3210 9876 5432 1098 7654 3210
  46. ---------------------------------------
  47. AAAA AAAA TTTT TTTT xxxx XXXX YYYY YYYY
  48. ---------------------------------------
  49. 8421 8421 8421 8421 8421 8421 8421 8421
  50. A = Sprite Attributes
  51. x = reserved
  52. T = Tile ID
  53. X = X relative position
  54. Y = Y absolute position
  55. x = for future use
  56. */
  57. unsigned long PPU_SpriteByScanLine[241][9]; /* There is 240 scanline and 8 sprite per scanline */
  58. unsigned long PPU_NbSpriteByScanLine[241]; /* There is 240 scanline and 8 sprite per scanline */
  59. unsigned long PPU_NbSpriteByScanLineOverFlow[241]; /* There is 240 scanline and 8 sprite per scanline */
  60. #define PPU_SCANLINESPRITE_GET_ATTRS(sprt) (((sprt)&0xFF000000) >> 24)
  61. #define PPU_SCANLINESPRITE_GET_TILIDX(sprt) (((sprt)&0x00FF0000) >> 16)
  62. #define PPU_SCANLINESPRITE_GET_RELY(sprt) (((sprt)&0x00000F00) >> 8)
  63. #define PPU_SCANLINESPRITE_GET_X(sprt) ((sprt)&0x000000FF)
  64. #define PPU_SCANLINESPRITE_SET_ATTRS(sprt, v) sprt = (((sprt)&0x00FFFFFF) | (( (v) & 0xFF) << 24))
  65. #define PPU_SCANLINESPRITE_SET_TILIDX(sprt, v) sprt = (((sprt)&0xFF00FFFF) | (( (v) & 0xFF) << 16))
  66. #define PPU_SCANLINESPRITE_SET_RELY(sprt, v) sprt = (((sprt)&0xFFFFF0FF) | (( (v) & 0x0F) << 8))
  67. #define PPU_SCANLINESPRITE_SET_X(sprt, v) sprt = (((sprt)&0xFFFFFF00) | ( (v) & 0xFF ))
  68. /* PPU registers */
  69. /* NT: Name Table */
  70. byte PPU_Reg_NT;
  71. /* AT: Attribute/Color Table */
  72. byte PPU_Reg_AT;
  73. /* FV: Fine Vertical Scroll latch/counter */
  74. byte PPU_Reg_FV;
  75. /* HV: Fine Horizontal Scroll latch/counter */
  76. byte PPU_Reg_FH;
  77. /* VT: Vertical Tile indev latch/counter */
  78. byte PPU_Reg_VT;
  79. /* HT: Horizontal Tile indev latch/counter */
  80. byte PPU_Reg_HT;
  81. /* V: Vertical Name Table Selection latch/counter */
  82. byte PPU_Reg_V;
  83. /* H: Horizontal Name Table Selection latch/counter */
  84. byte PPU_Reg_H;
  85. /* S: Playfield pattern table selection latch */
  86. unsigned short PPU_Reg_S;
  87. /* PAR: Picture Address Register */
  88. byte PPU_Reg_PAR;
  89. /* AR: Tile Attribute (palette select) value latch */
  90. byte PPU_Reg_AR;
  91. unsigned short PPU_Reg_Counter;
  92. /* PPU Memory Areas */
  93. byte *ppu_mem_nameTables;
  94. byte *ppu_mem_patternTables;
  95. byte *ppu_mem_paletteValues;
  96. byte ppu_mem_spritesTable[0x100];
  97. byte ppu_mem_sptrTablePtr;
  98. /* Some other PPU "registers" */
  99. byte ppu_VramAccessFlipFlop;
  100. byte ppu_inVBlankTime;
  101. byte ppu_spriteZeroHit;
  102. byte ppu_scanlineSpriteOverflow;
  103. byte ppu_bgColor;
  104. /* CR #1 variables */
  105. unsigned short ppu_spritePatternTable;
  106. byte ppu_spriteSize;
  107. byte ppu_addrIncrement;
  108. byte ppu_execNMIonVBlank;
  109. /* CR #2 variables */
  110. byte ppu_spriteVisibility;
  111. byte ppu_backgroundVisibility;
  112. byte ppu_spriteClipping;
  113. byte ppu_backgroundClipping;
  114. byte ppu_displayType;
  115. byte ppu_mirrorMode;
  116. byte ppu_singleScreenMode;
  117. byte ppu_screenMode;
  118. #define PPU_MEM_PATTERNTABLES_SIZE 0x2000
  119. #define PPU_MEM_NAMETABLE_SIZE 0x1000
  120. #define PPU_MEM_PALETTEVALUES_SIZE 0x100 /* in fact its 20 but we must allocate a least one page */
  121. #define PPU_SPRITE_FLAGS_VFLIP ( 1 << 7 )
  122. #define PPU_SPRITE_FLAGS_HFLIP ( 1 << 6 )
  123. #define PPU_SPRITE_FLAGS_BGPRIO ( 1 << 5 )
  124. #define PPU_SPRITE_FLAGS_UPPERCOLOR ( 0x03 )
  125. #define PPU_FLAG_SR_VBLANK ( 1 << 7 )
  126. #define PPU_FLAG_SR_SPRT0 ( 1 << 6 )
  127. #define PPU_FLAG_SR_8SPRT ( 1 << 5 )
  128. #define PPU_FLAG_SR_RDWRALLOW ( 1 << 4 )
  129. #define PPU_CR1_SPRTSIZE ( 1 << 5 )
  130. #define PPU_CR1_EXECNMI ( 1 << 7 )
  131. #define PPU_CR2_BGVISIBILITY ( 1 << 3 )
  132. #define PPU_CR2_SPRTVISIBILITY ( 1 << 4 )
  133. int ppu_init()
  134. {
  135. int i;
  136. /*byte defaultColors[] = { 0x09,0x01,0x00,0x01,0x00,0x02,0x02,0x0D,0x08,0x10,0x08,0x24,0x00,0x00,0x04,0x2C,
  137. 0x09,0x01,0x34,0x03,0x00,0x04,0x00,0x14,0x08,0x3A,0x00,0x02,0x00,0x20,0x2C,0x08 };*/
  138. if (ppu_initMemory())
  139. return -1;
  140. /* Set ppu memory parameters */
  141. /* First: Allocate each memory zone */
  142. ppu_mem_patternTables = (byte*) malloc(PPU_MEM_PATTERNTABLES_SIZE);
  143. if (!ppu_mem_patternTables)
  144. return -1;
  145. ppu_mem_nameTables = (byte*) malloc(PPU_MEM_NAMETABLE_SIZE);
  146. if (!ppu_mem_nameTables)
  147. return -1;
  148. ppu_mem_paletteValues = (byte*) malloc(PPU_MEM_PALETTEVALUES_SIZE);
  149. if (!ppu_mem_paletteValues)
  150. return -1;
  151. console_printf(Console_Default, "ppu_mem_nameTables :%p\n"
  152. "ppu_mem_patternTables:%p\n"
  153. "ppu_mem_paletteValues:%p\n",
  154. ppu_mem_nameTables,
  155. ppu_mem_patternTables,
  156. ppu_mem_paletteValues);
  157. /* Second: make the ppu memory manager point on the memory zones */
  158. ppu_setPagePtr8k(0x00, ppu_mem_patternTables);
  159. ppu_setPagePtr4k(0x20, ppu_mem_nameTables);
  160. ppu_setPagePtr (0x3F, ppu_mem_paletteValues);
  161. for ( i = 0x00; i < 0x0F; i++ )
  162. ppu_setPageGhost(0x30 + i, true, 0x20 + i);
  163. /* Third: set registers to defaults */
  164. /* Now test the memory ! */
  165. /* Fille PPU memory with garbage */
  166. for (i = 0x0000; i < 0x2000 ; i++)
  167. ppu_mem_patternTables[i] = rand()%0xFF;
  168. for (i = 0x0000; i < 0x1000 ; i++)
  169. ppu_mem_nameTables[i] = rand()%0xFF;
  170. for (i = 0x0000; i < 0x001F ; i++)
  171. ppu_mem_paletteValues[i] = rand()%0xFF;
  172. //memcpy(ppu_mem_paletteValues, defaultColors, 32);
  173. /* Set some other variables */
  174. ppu_VramAccessFlipFlop = 0;
  175. ppu_addrIncrement = 1;
  176. ppu_spritePatternTable = 0;
  177. ppu_spriteSize = 8;
  178. ppu_execNMIonVBlank = 0;
  179. ppu_spriteVisibility = 0;
  180. ppu_backgroundVisibility = 0;
  181. ppu_spriteClipping = 0;
  182. ppu_backgroundClipping = 0;
  183. ppu_displayType = 0;
  184. ppu_inVBlankTime = 0;
  185. ppu_bgColor = 0;
  186. /* Set PPU registers on CPU side */
  187. set_page_rd_hook(0x20, ppu_readReg);
  188. set_page_wr_hook(0x20, ppu_writeReg);
  189. set_page_readable(0x20, true);
  190. set_page_writeable(0x20, true);
  191. /* Set PPU Ghost Registers */
  192. for(i = 0x21; i < 0x40; i++)
  193. set_page_ghost(i, true, 0x20);
  194. /* allocate the PPU Video memory */
  195. VideoBuffer = create_bitmap(256, 240);
  196. if (VideoBuffer == NULL)
  197. return -1;
  198. return 0;
  199. }
  200. void ppu_updateSpriteScanlineTable()
  201. {
  202. int i, line, j, k;
  203. volatile int sprite_x, sprite_y, sprite_idx, sprite_attr;
  204. int curline;
  205. for (line = 0; line < 241; line ++)
  206. {
  207. PPU_NbSpriteByScanLine[line] = 0;
  208. PPU_NbSpriteByScanLineOverFlow[line] = 0;
  209. for (i = 0; i < 9; i++)
  210. PPU_SpriteByScanLine[line][i] = 0xFFFFFFFF;
  211. }
  212. for ( i = 0; i < 64; i ++)
  213. {
  214. /* Fill sprite_zzz variables */
  215. sprite_y = ppu_mem_spritesTable[(i*4) + 0] + 1;
  216. sprite_idx = ppu_mem_spritesTable[(i*4) + 1];
  217. sprite_attr = ppu_mem_spritesTable[(i*4) + 2] | ((i==0)?0x04:0); /* Add a flag for the sprite #0 */
  218. sprite_x = ppu_mem_spritesTable[(i*4) + 3];
  219. /* For each line covered by the sprite */
  220. for (line = 0; line < ppu_spriteSize; line ++)
  221. {
  222. curline = line + sprite_y;
  223. if ((curline < 0) || (curline > 240))
  224. continue; /* Don't go beyond, this sprite go beyond the borders */
  225. if (PPU_NbSpriteByScanLine[curline] < 8)
  226. PPU_NbSpriteByScanLine[curline] ++;
  227. else
  228. {
  229. PPU_NbSpriteByScanLineOverFlow[curline] = 1;
  230. continue; /* We have 8 sprite in this line, don't continue */
  231. }
  232. if (((sprite_x+8) < 0) && ((sprite_x-8) > 256))
  233. continue; /* this sprite isn't either displayable */
  234. /* Now test if this sprite can be put in the sprite list */
  235. for (j = 0; j <= PPU_NbSpriteByScanLine[curline]; j++)
  236. {
  237. /* sprite are ordered by their y value, so, the first time that
  238. we have lower y value is where we need to put the sprite */
  239. if (sprite_x < PPU_SCANLINESPRITE_GET_X(PPU_SpriteByScanLine[curline][j]))
  240. {
  241. /* move the j eme item and next to the right in the list, trashing
  242. if needed the rightest item. */
  243. for (k = 7; k >= j; k--)
  244. PPU_SpriteByScanLine[curline][k] = PPU_SpriteByScanLine[curline][k-1];
  245. PPU_SpriteByScanLine[curline][j] = 0;
  246. PPU_SCANLINESPRITE_SET_ATTRS (PPU_SpriteByScanLine[curline][j], sprite_attr);
  247. PPU_SCANLINESPRITE_SET_TILIDX(PPU_SpriteByScanLine[curline][j], sprite_idx);
  248. PPU_SCANLINESPRITE_SET_RELY (PPU_SpriteByScanLine[curline][j], curline - sprite_y);
  249. PPU_SCANLINESPRITE_SET_X (PPU_SpriteByScanLine[curline][j], sprite_x);
  250. break; /* Stop the for, we don't need to go further in the line list */
  251. }
  252. }
  253. }
  254. }
  255. }
  256. void ppu_setMirroring(byte direction)
  257. {
  258. if (ppu_screenMode != PPU_SCMODE_NORMAL)
  259. return;
  260. if (ppu_mirrorMode == direction)
  261. return; /* Same value, no need to change! */
  262. switch(direction)
  263. {
  264. default:
  265. direction = PPU_MIRROR_HORIZTAL;
  266. ppu_mirrorMode = direction;
  267. case PPU_MIRROR_HORIZTAL: /* Horizontal */
  268. ppu_setPagePtr1k(0x20, ppu_mem_nameTables + 0x000);
  269. ppu_setPagePtr1k(0x24, ppu_mem_nameTables + 0x000);
  270. ppu_setPagePtr1k(0x28, ppu_mem_nameTables + 0x400);
  271. ppu_setPagePtr1k(0x2C, ppu_mem_nameTables + 0x400);
  272. break;
  273. case PPU_MIRROR_VERTICAL: /* Vertical */
  274. ppu_setPagePtr1k(0x20, ppu_mem_nameTables + 0x000);
  275. ppu_setPagePtr1k(0x24, ppu_mem_nameTables + 0x400);
  276. ppu_setPagePtr1k(0x28, ppu_mem_nameTables + 0x000);
  277. ppu_setPagePtr1k(0x2C, ppu_mem_nameTables + 0x400);
  278. break;
  279. }
  280. ppu_mirrorMode = direction;
  281. }
  282. void ppu_setSingleScreen(byte screen)
  283. {
  284. if (ppu_screenMode != PPU_SCMODE_SINGLE)
  285. return;
  286. if (ppu_singleScreenMode == screen)
  287. return; /* Same value, no need to change! */
  288. switch(screen)
  289. {
  290. default:
  291. screen = PPU_SCREEN_000;
  292. ppu_singleScreenMode = screen;
  293. case PPU_SCREEN_000: /* 0x2000 */
  294. ppu_setPagePtr1k(0x20, ppu_mem_nameTables + 0x000);
  295. ppu_setPagePtr1k(0x24, ppu_mem_nameTables + 0x000);
  296. ppu_setPagePtr1k(0x28, ppu_mem_nameTables + 0x000);
  297. ppu_setPagePtr1k(0x2C, ppu_mem_nameTables + 0x000);
  298. break;
  299. case PPU_SCREEN_400: /* 0x2400 */
  300. ppu_setPagePtr1k(0x20, ppu_mem_nameTables + 0x400);
  301. ppu_setPagePtr1k(0x24, ppu_mem_nameTables + 0x400);
  302. ppu_setPagePtr1k(0x28, ppu_mem_nameTables + 0x400);
  303. ppu_setPagePtr1k(0x2C, ppu_mem_nameTables + 0x400);
  304. break;
  305. case PPU_SCREEN_800: /* 0x2800 */
  306. ppu_setPagePtr1k(0x20, ppu_mem_nameTables + 0x800);
  307. ppu_setPagePtr1k(0x24, ppu_mem_nameTables + 0x800);
  308. ppu_setPagePtr1k(0x28, ppu_mem_nameTables + 0x800);
  309. ppu_setPagePtr1k(0x2C, ppu_mem_nameTables + 0x800);
  310. break;
  311. case PPU_SCREEN_C00: /* 0x2C00 */
  312. ppu_setPagePtr1k(0x20, ppu_mem_nameTables + 0xC00);
  313. ppu_setPagePtr1k(0x24, ppu_mem_nameTables + 0xC00);
  314. ppu_setPagePtr1k(0x28, ppu_mem_nameTables + 0xC00);
  315. ppu_setPagePtr1k(0x2C, ppu_mem_nameTables + 0xC00);
  316. break;
  317. }
  318. ppu_singleScreenMode = screen;
  319. }
  320. /* Let set display to
  321. Single screen (1 NT with mirroring)
  322. Normal screen (2 NT with mirroring)
  323. Four screen (4 NT without mirroring) */
  324. void ppu_setScreenMode(byte mode)
  325. {
  326. if (ppu_screenMode == mode)
  327. return; /* Same value, no need to change! */
  328. ppu_screenMode = mode;
  329. switch(mode)
  330. {
  331. case PPU_SCMODE_SINGLE: /* Single screen (1 NT with mirroring) */
  332. ppu_setSingleScreen(~ppu_singleScreenMode);
  333. break;
  334. default:
  335. mode = PPU_SCMODE_NORMAL;
  336. ppu_screenMode = mode;
  337. case PPU_SCMODE_NORMAL: /* Normal screen (2 NT with mirroring) */
  338. ppu_setMirroring(~ppu_mirrorMode);
  339. break;
  340. case PPU_SCMODE_FOURSC: /* Four screen (4 NT withou mirroring) */
  341. ppu_setPagePtr1k(0x20, ppu_mem_nameTables + 0x000);
  342. ppu_setPagePtr1k(0x24, ppu_mem_nameTables + 0x400);
  343. ppu_setPagePtr1k(0x28, ppu_mem_nameTables + 0x800);
  344. ppu_setPagePtr1k(0x2C, ppu_mem_nameTables + 0xC00);
  345. break;
  346. }
  347. }
  348. /* update whole counters */
  349. void ppu_updateCounters()
  350. {
  351. /*
  352. +---------------+-----------------------------------------------+
  353. | |+===++=++=++=====++=====++===++=++========++==+|
  354. |PPU registers || FV||V||H|| VT|| HT|| FH||S|| PAR||AR||
  355. |PPU counters |+---++-++-++-----++-----++===++=++========++==+|
  356. | |+===++=++=++=====++=====+ |
  357. +---------------+-----------------------------------------------+
  358. |2007 access | DC B A 98765 43210 |
  359. +===============+===============================================+
  360. 8421 8421 8421 8421
  361. -------------------
  362. 1111 1100 0000 0000
  363. 5432 1098 7654 3210
  364. _AAA BCDD DDDE EEEE
  365. */
  366. PPU_Reg_Counter = (PPU_Reg_FV & 0x07) << 12;
  367. PPU_Reg_Counter |= PPU_Reg_V << 11;
  368. PPU_Reg_Counter |= PPU_Reg_H << 10;
  369. PPU_Reg_Counter |= PPU_Reg_VT << 5;
  370. PPU_Reg_Counter |= PPU_Reg_HT;
  371. }
  372. int ppu_hblank(int scanline)
  373. {
  374. int i, j;
  375. byte pixelColor = 0x42;
  376. byte BgColor = 0x42;
  377. byte SpriteColor = 0x42;
  378. unsigned short addr;
  379. byte value;
  380. unsigned short tmp_HHT = 0;
  381. unsigned short tmp_VVTFV = 0;
  382. unsigned long CurrentSprite;
  383. byte SpriteVFlip;
  384. if (scanline == 0)
  385. {
  386. ppu_bgColor = ppu_readMemory(0x3F,00);
  387. if ((ppu_spriteVisibility != 0) || (ppu_backgroundVisibility != 0))
  388. ppu_updateCounters();
  389. }
  390. if (scanline < 240)
  391. {
  392. /* For each PPU pixel of this scanline */
  393. for (i = 0; i < 256; i ++)
  394. {
  395. /* Set the current pixel color to the bg color */
  396. pixelColor = ppu_readMemory(0x3F,00);
  397. /* Compute current pixel bg color if bg is visible */
  398. if (ppu_backgroundVisibility == 1)
  399. {
  400. addr = (PPU_Reg_Counter & 0x0C00);
  401. addr = addr | 0x03C0;
  402. addr |= (PPU_Reg_Counter >> 4 ) & 0x0038;
  403. addr |= (PPU_Reg_Counter >> 2 ) & 0x0007;
  404. PPU_Reg_AR = ppu_readMemory(0x20 | ((addr>>8) & 0x0F), addr& 0xFF);
  405. PPU_Reg_AR = PPU_Reg_AR >> (((PPU_Reg_Counter >> 4 ) & 0x04)|((PPU_Reg_Counter ) & 0x02));
  406. PPU_Reg_AR = (PPU_Reg_AR<<2) & 0x0C;
  407. PPU_Reg_PAR = ppu_readMemory(0x20 | ((PPU_Reg_Counter>>8) & 0x0F), PPU_Reg_Counter& 0xFF);
  408. addr = PPU_Reg_S;
  409. addr |= ((PPU_Reg_PAR & 0xFF) << 4);
  410. addr |= ((PPU_Reg_Counter >> 12) & 0x07);
  411. value = ppu_readMemory((addr >> 8) , addr );
  412. BgColor = (value & (1 << (7-(i + PPU_Reg_FH) % 8)))?0x01:0;
  413. value = ppu_readMemory((addr >> 8) , addr | 0x08 );
  414. BgColor |= (value & (1 << (7-(i + PPU_Reg_FH) % 8)))?0x02:0;
  415. if (BgColor > 0x00)
  416. {
  417. BgColor |= PPU_Reg_AR;
  418. BgColor &= 0x0F;
  419. pixelColor = ppu_readMemory(0x3F, BgColor);
  420. }
  421. if (((i + PPU_Reg_FH)%8) == 7)
  422. {
  423. tmp_HHT = ((PPU_Reg_Counter >> 5) & 0x0020) |
  424. (PPU_Reg_Counter & 0x001F);
  425. tmp_HHT = (tmp_HHT + 1) & 0x003F;
  426. /* Reassemble with HT & H */
  427. PPU_Reg_Counter = (PPU_Reg_Counter & 0xFBE0) |
  428. ((tmp_HHT & 0x0020) << 5) |
  429. (tmp_HHT & 0x001F);
  430. }
  431. }
  432. /* Now calculate if there is a sprite here and sprite visibility is on */
  433. if ((ppu_spriteVisibility == 1) &&
  434. (PPU_NbSpriteByScanLine[scanline] != 0))
  435. {
  436. /* scan each sprite on this line to find the one (or more) that is on this pixel */
  437. for (j = 0; j < PPU_NbSpriteByScanLine[scanline]; j++)
  438. {
  439. /* they are orderer by X, so if this one is too far on the right
  440. it's not need to go further */
  441. CurrentSprite = PPU_SpriteByScanLine[scanline][j];
  442. if (PPU_SCANLINESPRITE_GET_X(CurrentSprite) > i)
  443. break; /* break the current for */
  444. if ((PPU_SCANLINESPRITE_GET_X(CurrentSprite) + 8) < i)
  445. continue; /* Not this one too (too far on the left) try next one*/
  446. /* Ok if we arrive here, the current sprite is on the good position */
  447. /* Does the sprite is a BG or FG sprite ? */
  448. /* Ok we could now get the sprite current pixel color */
  449. /* Read sprite scanline pattern */
  450. SpriteVFlip = PPU_SCANLINESPRITE_GET_ATTRS(CurrentSprite) & PPU_SPRITE_FLAGS_VFLIP;
  451. if (ppu_spriteSize == 8)
  452. {
  453. addr = (PPU_SCANLINESPRITE_GET_TILIDX(CurrentSprite) << 4) + ppu_spritePatternTable;
  454. }
  455. else
  456. {
  457. if (PPU_SCANLINESPRITE_GET_RELY(CurrentSprite) < 8)
  458. addr = (((PPU_SCANLINESPRITE_GET_TILIDX(CurrentSprite)&0xFE) + (SpriteVFlip?1:0)) << 4) + ((PPU_SCANLINESPRITE_GET_TILIDX(CurrentSprite)&0x01)?0x1000:0x0000);
  459. else
  460. addr = (((PPU_SCANLINESPRITE_GET_TILIDX(CurrentSprite)&0xFE) + (SpriteVFlip?0:1)) << 4) + ((PPU_SCANLINESPRITE_GET_TILIDX(CurrentSprite)&0x01)?0x1000:0x0000);
  461. }
  462. if (SpriteVFlip)
  463. {
  464. addr += 7;
  465. addr -= (PPU_SCANLINESPRITE_GET_RELY(CurrentSprite) % 8);
  466. }
  467. else
  468. addr += (PPU_SCANLINESPRITE_GET_RELY(CurrentSprite) % 8);
  469. if (PPU_SCANLINESPRITE_GET_ATTRS(CurrentSprite) & PPU_SPRITE_FLAGS_HFLIP)
  470. {
  471. value = ppu_readMemory((addr >> 8) , addr );
  472. SpriteColor = (value & (1 << (i-PPU_SCANLINESPRITE_GET_X(CurrentSprite))))?0x01:0;
  473. value = ppu_readMemory((addr >> 8) , addr | 0x08 );
  474. SpriteColor |= (value & (1 << (i-PPU_SCANLINESPRITE_GET_X(CurrentSprite))))?0x02:0;
  475. }
  476. else
  477. {
  478. value = ppu_readMemory((addr >> 8) , addr );
  479. SpriteColor = (value & (1 << (7-(i-PPU_SCANLINESPRITE_GET_X(CurrentSprite)))))?0x01:0;
  480. value = ppu_readMemory((addr >> 8) , addr | 0x08 );
  481. SpriteColor |= (value & (1 << (7-(i-PPU_SCANLINESPRITE_GET_X(CurrentSprite)))))?0x02:0;
  482. }
  483. if (SpriteColor > 0x00)
  484. {
  485. SpriteColor |= ((PPU_SCANLINESPRITE_GET_ATTRS(CurrentSprite) & PPU_SPRITE_FLAGS_UPPERCOLOR) << 2);
  486. SpriteColor &= 0x0F;
  487. }
  488. if ((PPU_SCANLINESPRITE_GET_ATTRS(CurrentSprite) & 0x04) &&
  489. (SpriteColor != 0x00) && (BgColor != 0x00))
  490. {
  491. ppu_spriteZeroHit = 1;
  492. }
  493. if ( ( (PPU_SCANLINESPRITE_GET_ATTRS(CurrentSprite) & PPU_SPRITE_FLAGS_BGPRIO) && (BgColor == 0x0000)) ||
  494. (!(PPU_SCANLINESPRITE_GET_ATTRS(CurrentSprite) & PPU_SPRITE_FLAGS_BGPRIO)) )
  495. {
  496. if (SpriteColor != 0x00) pixelColor = ppu_readMemory(0x3F, (0x10 + SpriteColor));
  497. }
  498. }
  499. }
  500. /* Set to monochrome if needed */
  501. if (ppu_displayType)
  502. pixelColor &= 0x30;
  503. /* draw the pixel */
  504. _putpixel(VideoBuffer, i, scanline, pixelColor);
  505. }
  506. if (ppu_backgroundVisibility || ppu_spriteVisibility)
  507. if (PPU_NbSpriteByScanLineOverFlow[scanline] == 1)
  508. ppu_scanlineSpriteOverflow = 1;
  509. //blit(VideoBuffer, screen, 0, scanline, 0, scanline, 256, 1);
  510. if (ppu_backgroundVisibility == 1)
  511. {
  512. tmp_VVTFV = ((PPU_Reg_Counter >> 3 ) & 0x0100) | /* V */
  513. ((PPU_Reg_Counter >> 2 ) & 0x00F8) | /* VT */
  514. ((PPU_Reg_Counter >> 12) & 0x0007); /* FV */
  515. tmp_VVTFV++;
  516. if ((tmp_VVTFV&0x0F8) == 0xF0)
  517. {
  518. tmp_VVTFV &= ~0x0F8;
  519. tmp_VVTFV ^= 0x100;
  520. }
  521. PPU_Reg_Counter = ( PPU_Reg_Counter & 0x041F) |
  522. ((tmp_VVTFV & 0x0100 ) << 3 ) | /* V */
  523. ((tmp_VVTFV & 0x00F8 ) << 2 ) | /* VT */
  524. ((tmp_VVTFV & 0x0007 ) << 12); /* FV */
  525. /* Update H & HT */
  526. PPU_Reg_Counter = (PPU_Reg_Counter & ~0x041F) |
  527. (PPU_Reg_H << 10) |
  528. PPU_Reg_HT;
  529. }
  530. }
  531. /* Increment only V & VT & FV*/
  532. /*
  533. 8421 8421 8421 8421
  534. -------------------
  535. 1111 1100 0000 0000
  536. 5432 1098 7654 3210
  537. _AAA BCDD DDDE EEEE
  538. xxx x xx xxx : vvtfv = 7BE0
  539. x x xxxx : hht
  540. B DDDD DAAA : vvtfv
  541. CE EEEE : hht
  542. A = FV
  543. B = V
  544. C = H
  545. D = VT
  546. E = HT
  547. */
  548. if (scanline == 239)
  549. {
  550. ppu_inVBlankTime = 1;
  551. textprintf(Buffer, font, 260, 3, 4, "FPS : %ld (CPU@~%2.2fMhz : %d%%)", FPS, (float) (((float) IPS) / 1000000.0), (int) ((((float) IPS) / 1770000.0) * 100.0));
  552. blit(VideoBuffer, Buffer, 0, 0, 0, 0, 256, 240);
  553. blit(Buffer, screen, 0, 0, 0, 0, 512+256, 512);
  554. return ppu_execNMIonVBlank;
  555. }
  556. if (key[KEY_B])
  557. {
  558. blit(VideoBuffer, Buffer, 0, 0, 0, 0, 256, 240);
  559. blit(Buffer, screen, 0, 0, 0, 0, 512 + 256, 480);
  560. }
  561. if (scanline == (239 + VBLANK_TIME))
  562. {
  563. ppu_inVBlankTime = 0;
  564. ppu_spriteZeroHit = 0;
  565. ppu_scanlineSpriteOverflow = 0;
  566. }
  567. return 0;
  568. }
  569. byte PPU_RegValues[8];
  570. byte ppu_readReg(byte id)
  571. {
  572. id &= 0x07;
  573. static byte garbage;
  574. static byte lastValue;
  575. switch(id)
  576. {
  577. default:
  578. garbage = PPU_RegValues[id];
  579. break;
  580. case 0x02: /* PPU Status Register */
  581. /* Reset VRam 2005/2006 flipflop */
  582. ppu_VramAccessFlipFlop = 0;
  583. garbage = 0;
  584. garbage |= (ppu_inVBlankTime!=0) ?PPU_FLAG_SR_VBLANK:0;
  585. garbage |= (ppu_spriteZeroHit!=0) ?PPU_FLAG_SR_SPRT0:0;
  586. garbage |= (ppu_scanlineSpriteOverflow!=0)?PPU_FLAG_SR_8SPRT:0;
  587. ppu_inVBlankTime = 0;
  588. break;
  589. case 0x04: /* SPR-RAM I/O */
  590. garbage = ppu_mem_spritesTable[ppu_mem_sptrTablePtr];
  591. break;
  592. case 0x07: /* VRAM I/O */
  593. if (PPU_Reg_Counter < 0x3F00)
  594. {
  595. garbage = lastValue;
  596. lastValue = ppu_readMemory((PPU_Reg_Counter>>8) & 0x3F,
  597. PPU_Reg_Counter & 0xFF);
  598. }
  599. else
  600. {
  601. lastValue = ppu_readMemory( 0x2F,
  602. PPU_Reg_Counter & 0xFF);
  603. garbage = ppu_readMemory( 0x3F,
  604. PPU_Reg_Counter & 0xFF);
  605. }
  606. PPU_Reg_Counter += ppu_addrIncrement;
  607. break;
  608. }
  609. return garbage;
  610. }
  611. void ppu_writeReg(byte id, byte val)
  612. {
  613. id &= 0x07;
  614. PPU_RegValues[id] = val;
  615. switch(id)
  616. {
  617. default:
  618. break;
  619. case 0x00: /* PPU Control Register #1 */
  620. /*
  621. +===============+===============================================+
  622. |2000 | 1 0 4 |
  623. +---------------+-----------------------------------------------+
  624. | |+===++=++=++=====++=====++===++=++========++==+|
  625. |PPU registers || FV||V||H|| VT|| HT|| FH||S|| PAR||AR||
  626. |PPU counters |+---++-++-++-----++-----++===++=++========++==+|
  627. | |+===++=++=++=====++=====+ |
  628. +---------------+-----------------------------------------------+
  629. */
  630. /* Set PPU internal registers */
  631. PPU_Reg_V = (val & 0x02)?1:0;
  632. PPU_Reg_H = (val & 0x01)?1:0;
  633. PPU_Reg_S = (val & 0x10)?0x1000:0x0000;
  634. /* Set Other parameters */
  635. ppu_addrIncrement = (val & 0x04)?0x20:0x01;
  636. ppu_spritePatternTable = (val & 0x08)?0x1000:0;
  637. ppu_spriteSize = (val & 0x20)?16:8;
  638. ppu_execNMIonVBlank = (val & 0x80)?1:0;
  639. break;
  640. case 0x01: /* PPU Control Register #2 */
  641. ppu_spriteVisibility = (val & 0x10)?1:0;
  642. ppu_backgroundVisibility = (val & 0x08)?1:0;
  643. ppu_spriteClipping = (val & 0x04)?1:0;
  644. ppu_backgroundClipping = (val & 0x02)?1:0;
  645. ppu_displayType = (val & 0x01)?1:0;
  646. ppu_updateSpriteScanlineTable();
  647. break;
  648. case 0x03: /* SPR-RAM Address Register */
  649. ppu_mem_sptrTablePtr = val;
  650. break;
  651. case 0x04: /* SPR-RAM I/O */
  652. ppu_mem_spritesTable[ppu_mem_sptrTablePtr++] = val;
  653. ppu_updateSpriteScanlineTable();
  654. break;
  655. case 0x05: /* 2005 VRAM Register */
  656. /*
  657. +===============+===============================================+
  658. |2005/1 | 76543 210 |
  659. |2005/2 | 210 76543 |
  660. +---------------+-----------------------------------------------+
  661. | |+===++=++=++=====++=====++===++=++========++==+|
  662. |PPU registers || FV||V||H|| VT|| HT|| FH||S|| PAR||AR||
  663. |PPU counters |+---++-++-++-----++-----++===++=++========++==+|
  664. | |+===++=++=++=====++=====+ |
  665. +---------------+-----------------------------------------------+
  666. */
  667. if (ppu_VramAccessFlipFlop == 0)
  668. {
  669. ppu_VramAccessFlipFlop = ~0;
  670. PPU_Reg_FH = val & 0x07;
  671. PPU_Reg_HT = (val & 0xF8) >> 3;
  672. }
  673. else
  674. {
  675. ppu_VramAccessFlipFlop = 0;
  676. PPU_Reg_FV = val & 0x07;
  677. PPU_Reg_VT = (val & 0xF8) >> 3;
  678. }
  679. break;
  680. case 0x06: /* 2006 VRAM Register */
  681. /*
  682. +===============+===============================================+
  683. |2006/1 | -54 3 2 10 |
  684. |2006/2 | 765 43210 |
  685. +---------------+-----------------------------------------------+
  686. | |+===++=++=++=====++=====++===++=++========++==+|
  687. |PPU registers || FV||V||H|| VT|| HT|| FH||S|| PAR||AR||
  688. |PPU counters |+---++-++-++-----++-----++===++=++========++==+|
  689. | |+===++=++=++=====++=====+ |
  690. +---------------+-----------------------------------------------+
  691. */
  692. if (ppu_VramAccessFlipFlop == 0)
  693. {
  694. ppu_VramAccessFlipFlop = ~0;
  695. PPU_Reg_FV = (val >> 4) & 0x03;
  696. PPU_Reg_V = (val >> 3) & 0x01;
  697. PPU_Reg_H = (val >> 2) & 0x01;
  698. PPU_Reg_VT = (PPU_Reg_VT & 0x07) | ((val & 0x03) << 3);
  699. }
  700. else
  701. {
  702. ppu_VramAccessFlipFlop = 0;
  703. PPU_Reg_VT = (PPU_Reg_VT & 0x18) | ((val >> 5) & 0x07);
  704. PPU_Reg_HT = val & 0x1F;
  705. ppu_updateCounters();
  706. }
  707. break;
  708. case 0x07: /* VRAM I/O */
  709. /*
  710. +---------------+-----------------------------------------------+
  711. | |+===++=++=++=====++=====++===++=++========++==+|
  712. |PPU registers || FV||V||H|| VT|| HT|| FH||S|| PAR||AR||
  713. |PPU counters |+---++-++-++-----++-----++===++=++========++==+|
  714. | |+===++=++=++=====++=====+ |
  715. +---------------+-----------------------------------------------+
  716. |2007 access | DC B A 98765 43210 |
  717. +===============+===============================================+
  718. */
  719. ppu_writeMemory((PPU_Reg_Counter>>8) & 0x3F, PPU_Reg_Counter & 0xFF, val);
  720. PPU_Reg_Counter += ppu_addrIncrement;
  721. break;
  722. }
  723. }
  724. void ppu_fillSprRamDMA(byte value)
  725. {
  726. short i;
  727. byte *ptr = get_page_ptr(value);
  728. for (i = 0; i < 0x100; i++)
  729. {
  730. ppu_mem_spritesTable[(ppu_mem_sptrTablePtr + i)&0xFF] = *(ptr+i);
  731. }
  732. ppu_updateSpriteScanlineTable();
  733. }