asm_man.txt 232 KB

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  1. 8051 CROSS ASSEMBLER
  2. USER'S MANUAL
  3. MetaLink Corporation
  4. Chandler, Arizona
  5. MetaLink Corporation
  6. P.O. BOX 1329
  7. Chandler, Arizona 85244-1329
  8. (602) 926-0797
  9. TELEX: 4998050 MTLNK
  10. FAX: (602) 926-1198
  11. PURCHASE TERMS AND CONDITIONS
  12. Since MetaLink Corporation does business and is located solely in
  13. the State of Arizona, such orders or agreements and the rights of
  14. the parties hereunder shall be governed by the laws of the State
  15. of Arizona.
  16. PAYMENTS TERMS:
  17. Unless otherwise agreed upon, the TOTAL UNPAID BALANCE is due and
  18. payable 30 days following the invoice date.
  19. LIMITED WARRANTY: METALINK MAKES NO WARRANTIES OTHER THAN THOSE
  20. CONTAINED HEREIN AND METALINK EXPRESSLY DISCLAIMS ANY AND ALL
  21. IMPLIED WARRANTIES, INCLUDING ANY WARRANTY OF FITNESS FOR A
  22. PARTICULAR PURPOSE OR OF MERCHANTABILITY.
  23. The foregoing limited warranty shall not apply unless Buyer has
  24. paid for in full the MetaLink products. Updates to the MetaLink
  25. Assembler User's Manual and MetaLink Assembler software are
  26. available free to Registered Buyer upon request for a one (1) year
  27. period from the invoice date.
  28. NOTICE
  29. MetaLink Corp. reserves the right to make improvements in the
  30. software product described in this manual as well as the manual
  31. itself at any time and without notice.
  32. DISCLAIMER OF ALL WARRANTIES AND LIABILITY
  33. METALINK CORP. MAKES NO WARRANTIES, EITHER EXPRESSED OR IMPLIED,
  34. WITH RESPECT TO THIS MANUAL OR WITH RESPECT TO THE SOFTWARE
  35. DESCRIBED IN THIS MANUAL, ITS QUALITY, PERFORMANCE, MERCHANTABILITY,
  36. OR FITNESS FOR ANY PARTICULAR PURPOSE. METALINK CORP. SOFTWARE
  37. IS SOLD OR LICENSED "AS IS". IN NO EVENT SHALL METALINK CORP. BE
  38. LIABLE FOR INCIDENTAL OR CONSEQUENTIAL DAMAGES RESULTING FROM ANY
  39. DEFECT IN THE SOFTWARE.
  40. Copyright (c) 1984, 1985, 1986, 1987, 1988, 1989 by MetaLink Corp.
  41. All rights are reserved. This manual may not, in whole or part,
  42. be copied, photocopied, reproduced, translated, or reduced to any
  43. electronic medium or machine readable form without the prior
  44. agreement and written permission of MetaLink Corp.
  45. MS-DOS is a trademark of Microsoft, Inc.
  46. IBMR is a registered trademark of IBM Corp.
  47. IntelR is a registered trademark of Intel Corp.
  48. MetaLink is a trademark of MetaLink Corp.
  49. T A B L E O F C O N T E N T S
  50. 1. 8051 OVERVIEW............................................1-1
  51. 1.1. Introduction........................................1-1
  52. 1.2. 8051 Architecture...................................1-2
  53. 1.3. Summary of the 8051 Family of Components............1-4
  54. 1.4. References..........................................1-5
  55. 2. 8051 CROSS ASSEMBLER OVERVIEW............................2-1
  56. 2.1. Introduction........................................2-1
  57. 2.2. Symbols.............................................2-1
  58. 2.3. Labels..............................................2-2
  59. 2.4. Assembler Controls..................................2-3
  60. 2.5. Assembler Directives................................2-3
  61. 2.6. 8051 Instruction Mnemonics..........................2-4
  62. 2.7. Bit Addressing......................................2-6
  63. 2.8. ASCII Literals......................................2-6
  64. 2.9. Comments............................................2-6
  65. 2.10. The Location Counter...............................2-7
  66. 2.11. Syntax Summary.....................................2-7
  67. 2.12. Numbers and Operators..............................2-7
  68. 2.13. Source File Listing...............................2-10
  69. 2.14. Object File.......................................2-11
  70. 3. RUNNING THE 8051 CROSS ASSEMBLER.........................3-1
  71. 3.1. Cross Assembler Files...............................3-1
  72. 3.2. Minimum System Requirements.........................3-1
  73. 3.3. Running the Cross Assembler.........................3-1
  74. 3.4. Example Running the Cross Assembler.................3-3
  75. 3.5. DOS Hints and Suggestions...........................3-3
  76. 3.6. References..........................................3-4
  77. 4. 8051 INSTRUCTION SET.....................................4-1
  78. 4.1. Notation............................................4-1
  79. 4.2. 8051 Instruction Set Summary........................4-4
  80. 4.3. Notes..............................................4-14
  81. 4.4. References.........................................4-14
  82. 5. 8051 CROSS ASSEMBLER DIRECTIVES..........................5-1
  83. 5.1. Introduction........................................5-1
  84. 5.2. Symbol Definition Directives........................5-1
  85. 5.3. Segment Selection Directives........................5-4
  86. 5.4. Memory Reservation and Storage Directives...........5-5
  87. 5.5. Miscellaneous Directives............................5-7
  88. 5.6. Conditional Assembly Directives.....................5-8
  89. 6. 8051 CROSS ASSEMBLER CONTROLS............................6-1
  90. 6.1. Introduction........................................6-1
  91. 6.2. Assembler Control Descriptions......................6-1
  92. 7. 8051 CROSS ASSEMBLER MACRO PROCESSOR.....................7-1
  93. 7.1. Introduction........................................7-1
  94. 7.2. Macro Definition....................................7-1
  95. 7.3. Special Macro Operators.............................7-4
  96. 7.4. Using Macros........................................7-4
  97. 7.4.1. NESTING MACROS...............................7-4
  98. 7.4.2. LABELS IN MACROS.............................7-6
  99. 8. 8051 CROSS ASSEMBLER ERROR CODES.........................8-1
  100. 8.1. Introduction........................................8-1
  101. 8.2. Explanation of Error Messages.......................8-2
  102. Appendices
  103. A. SAMPLE PROGRAM AND LISTING...............................A-1
  104. A.1. Source File.........................................A-1
  105. A.2. Source File Listing.................................A-4
  106. B. PRE-DEFINED BYTE AND BIT ADDRESSES.......................B-1
  107. B.1. Pre-defined Byte Addresses..........................B-1
  108. B.2. Pre-defined Bit Addresses..........................B-11
  109. C. RESERVED SYMBOLS.........................................C-1
  110. D. CROSS ASSEMBLER CHARACTER SET............................D-1
  111. CHAPTER 1
  112. 8051 OVERVIEW
  113. 1.1. Introduction
  114. For new users of MetaLink's ASM51 Cross Assembler, please take a
  115. moment to fill out and return postage-prepaid User Registration
  116. Card. This card will be found with the system diskette in the
  117. vinyl jacket at the front of this manual. MetaLink will use this
  118. information to send out, free of charge, any software updates
  119. occurring during the warranty period. Respondents will also be
  120. notified of any new products or product enhancements.
  121. The 8051 series of microcontrollers are highly integrated single
  122. chip microcomputers with an 8-bit CPU, memory, interrupt
  123. controller, timers, serial I/O and digital I/O on a single piece
  124. of silicon. The current members of the 8051 family of components
  125. include:
  126. 80C152JA/JB/JC/JD, 83C152JA/JC, 80C157
  127. 80C154, 83C154, 85C154
  128. 8044, 8344, 8744
  129. 80C451, 83C451, 87C451
  130. 80C452, 83C452, 87C452
  131. 8051, 8031, 8751, 80C51, 80C31, 87C51
  132. 80512, 80532
  133. 80515, 80535, 80C535, 80C515
  134. 80C517, 80C537
  135. 80C51FA, 83C51FA, 87C51FA, 83C51FB, 87C51FB, 83C51FC, 87C51FC
  136. 8052, 8032, 8752
  137. 80C321, 80C521, 87C521, 80C541, 87C541
  138. 8053, 9761, 8753
  139. 80C552, 83C552, 87C552
  140. 80C652, 83C652, 87C652
  141. 83C654, 87C654
  142. 83C751, 87C751
  143. 83C752, 87C752
  144. 80C851, 83C851
  145. All members of the 8051 series of microcontrollers share a common
  146. architecture. They all have the same instruction set, addressing
  147. modes, addressing range and memory spaces. The primary
  148. differences between different 8051 based products are the amount
  149. of memory on chip, the amount and types of I/O and peripheral
  150. functions, and the component's technology (see Table 1-1).
  151. In the brief summary of the 8051 architecture that follows, the
  152. term 8051 is used to mean collectively all available members of
  153. the 8051 family. Please refer to reference (1) for a complete
  154. description of the 8051 architecture and the specifications for
  155. all the currently available 8051 based products.
  156. 1-1
  157. 1.2. 8051 Architecture
  158. The 8051 is an 8-bit machine. Its memory is organized in bytes
  159. and practically all its instruction deal with byte quantities.
  160. It uses an Accumulator as the primary register for instruction
  161. results. Other operands can be accessed using one of the four
  162. different addressing modes available: register implicit, direct,
  163. indirect or immediate. Operands reside in one of the five memory
  164. spaces of the 8051.
  165. The five memory spaces of the 8051 are: Program Memory, External
  166. Data Memory, Internal Data Memory, Special Function Registers and
  167. Bit Memory.
  168. The Program Memory space contains all the instructions, immediate
  169. data and constant tables and strings. It is principally
  170. addressed by the 16-bit Program Counter (PC), but it can also be
  171. accessed by a few instructions using the 16-bit Data Pointer
  172. (DPTR). The maximum size of the Program Memory space is 64K
  173. bytes. Several 8051 family members integrate on-chip some amount
  174. of either masked programmed ROM or EPROM as part of this memory
  175. space (refer to Table 1-1).
  176. The External Data Memory space contains all the variables,
  177. buffers and data structures that can't fit on-chip. It is
  178. principally addressed by the 16-bit Data Pointer (DPTR), although
  179. the first two general purpose register (R0,R1) of the currently
  180. selected register bank can access a 256-byte bank of External
  181. Data Memory. The maximum size of the External Data Memory space
  182. is 64Kbytes. External data memory can only be accessed using
  183. the indirect addressing mode with the DPTR, R0 or R1.
  184. The Internal Data Memory space is functionally the most important
  185. data memory space. In it resides up to four banks of general
  186. purpose registers, the program stack, 128 bits of the 256-bit
  187. memory, and all the variables and data structures that are
  188. operated on directly by the program. The maximum size of the
  189. Internal Data Memory space is 256-bytes. However, different
  190. 8051 family members integrate different amounts of this memory
  191. space on chip (see Amnt of RAM in Table 1-1). The register
  192. implicit, indirect and direct addressing modes can be used in
  193. different parts of the Internal Data Memory space.
  194. The Special Function Register space contains all the on-chip
  195. peripheral I/O registers as well as particular registers that
  196. need program access. These registers include the Stack Pointer,
  197. the PSW and the Accumulator. The maximum number of Special
  198. Function Registers (SFRs) is 128, though the actual number on a
  199. particular 8051 family member depends on the number and type of
  200. peripheral functions integrated on-chip (see Table 1-1). The
  201. SFRs all have addresses greater than 127 and overlap the address
  202. space of the upper 128 bytes of the Internal Data Memory space.
  203. The two memory spaces are differentiated by addressing mode. The
  204. SFRs can only be accessed using the Direct addressing mode while
  205. the upper 128 bytes of the Internal Data Memory (if integrated
  206. on-chip) can only be accessed using the Indirect addressing mode.
  207. 1-2
  208. The Bit Memory space is used for storing bit variables and flags.
  209. There are specific instructions in the 8051 that operate only in
  210. the Bit Memory space. The maximum size of the Bit Memory space
  211. is 256-bits. 128 of the bits overlap with 16-bytes of the
  212. Internal Data Memory space and 128 of the bits overlap with 16
  213. Special Function Registers. Bits can only be accessed using the
  214. bit instructions and the Direct addressing mode.
  215. The 8051 has a fairly complete set of arithmetic and logical
  216. instructions. It includes an 8X8 multiply and an 8/8 divide.
  217. The 8051 is particularly good at processing bits (sometimes
  218. called Boolean Processing). Using the Carry Flag in the PSW as a
  219. single bit accumulator, the 8051 can move and do logical
  220. operations between the Bit Memory space and the Carry Flag. Bits
  221. in the Bit Memory space can also be used as general purpose flags
  222. for the test bit and jump instructions.
  223. 1-3
  224. Except for the MOVE instruction, the 8051 instructions can only
  225. operate on either the Internal Data Memory space or the Special
  226. Function Registers. The MOVE instruction operates in all memory
  227. spaces, including the External Memory space and Program Memory
  228. space.
  229. Program control instructions include the usual unconditional
  230. calls and jumps as well as conditional relative jumps based on
  231. the Carry Flag, the Accumulator's zero state, and the state of
  232. any bit in the Bit Memory space. Also available is a Compare and
  233. Jump if Not Equal instruction and a Decrement Counter and Jump if
  234. Not Zero loop instruction. See Chapter 4 for a description of
  235. the complete 8051 instruction set.
  236. 1.3. Summary of the 8051 Family of Components
  237. 1-4
  238. Table 1-1: 8051 Family of Components
  239. 1.4. References
  240. 1. Intel Corp., 8-Bit Embedded Controllers, 1990.
  241. 2. Siemens Corp., Microcontroller Component 80515, 1985.
  242. 3. AMD Corp., Eight-Bit 80C51 Embedded Processors, 1990.
  243. 4. Signetics Corp., Microcontroller Users' Guide, 1989.
  244. 1-5
  245. CHAPTER 2
  246. 8051 CROSS ASSEMBLER OVERVIEW
  247. 2.1. Introduction
  248. The 8051 Cross Assembler takes an assembly language source file
  249. created with a text editor and translates it into a machine
  250. language object file. This translation process is done in two
  251. passes over the source file. During the first pass, the Cross
  252. Assembler builds a symbol table from the symbols and labels used
  253. in the source file. It's during the second pass that the Cross
  254. Assembler actually translates the source file into the machine
  255. language object file. It is also during the second pass that the
  256. listing is generated.
  257. The following is a discussion of the syntax required by the Cross
  258. Assembler to generate error free assemblies.
  259. 2.2. Symbols
  260. Symbols are alphanumeric representations of numeric constants,
  261. addresses, macros, etc. The legal character set for symbols is
  262. the set of letters, both upper and lower case (A..Z,a..z), the
  263. set of decimal numbers (0..9) and the special characters,
  264. question mark (?) and underscore (_). To ensure that the Cross
  265. Assembler can distinguish between a symbol and a number, all
  266. symbols must start with either a letter or special character (?
  267. or _). The following are examples of legal symbols:
  268. PI
  269. Serial_Port_Buffer
  270. LOC_4096
  271. ?_?_?
  272. In using a symbol, the Cross Assembler converts all letters to
  273. upper case. As a result, the Cross Assembler makes no distinction
  274. between upper and lower case letters. For example, the following
  275. two symbols would be seen as the same symbol by the Cross
  276. Assembler:
  277. Serial_Port_Buffer
  278. SERIAL_PORT_BUFFER
  279. Symbols can be defined only once. Symbols can be up to 255
  280. characters in length, though only the first 32 are significant.
  281. Therefore, for symbols to be unique, they must have a unique
  282. character pattern within the first 32 characters. In the
  283. following example, the first two symbols would be seen by the
  284. Cross Assembler as duplicate symbols, while the third and fourth
  285. 2-1
  286. symbols are unique.
  287. BEGINNING_ADDRESS_OF_CONSTANT_TABLE_1
  288. BEGINNING_ADDRESS_OF_CONSTANT_TABLE_2
  289. CONSTANT_TABLE_1_BEGINNING_ADDRESS
  290. CONSTANT_TABLE_2_BEGINNING_ADDRESS
  291. There are certain symbols that are reserved and can't be defined
  292. by the user. These reserved symbols are listed in Appendix C and
  293. include the assembler directives, the 8051 instruction mnemonics,
  294. implicit operand symbols, and the following assembly time
  295. operators that have alphanumeric symbols: EQ, NE, GT, GE, LT, LE,
  296. HIGH, LOW, MOD, SHR, SHL, NOT,
  297. AND, OR and XOR.
  298. The reserved implicit operands include the symbols A, AB, C,
  299. DPTR, PC, R0, R1, R2, R3, R4, R5, R6, R7, AR0, AR1, AR2, AR3,
  300. AR4, AR5, AR6 and AR7. These symbols are used primarily as
  301. instruction operands. Except for AB, C, DPTR or PC, these
  302. symbols can also be used to define other symbols (see EQU
  303. directive in Chapter 5).
  304. The following are examples of illegal symbols with an explanation
  305. of why they are illegal:
  306. 1ST_VARIABLE (Symbols can not start with a number.)
  307. ALPHA# (Illegal character "#" in symbol.)
  308. MOV (8051 instruction mnemonic)
  309. LOW (Assembly operator)
  310. DATA (Assembly directive)
  311. 2.3. Labels
  312. Labels are special cases of symbols. Labels are used only before
  313. statements that have physical addresses associated with them.
  314. Examples of such statements are assembly language instructions,
  315. data storage directives (DB and DW), and data reservation
  316. directives (DS and DBIT). Labels must follow all the rules of
  317. symbol creation with the additional requirement that they be
  318. followed by a colon. The following are legal examples of label
  319. uses:
  320. TABLE_OF_CONTROL_CONSTANTS:
  321. DB 0,1,2,3,4,5 (Data storage)
  322. MESSAGE: DB 'HELP' (Data storage)
  323. VARIABLES: DS 10 (Data reservation)
  324. BIT_VARIABLES: DBIT 16 (Data reservation)
  325. START: MOV A,#23 (Assembly language instruction)
  326. 2.4. Assembler Controls
  327. 2-2
  328. Assembler controls are used to control where the Cross Assembler
  329. gets its input source file, where it puts the object file, and
  330. how it formats the listing file. Table 2-1 summarizes the
  331. assembler controls available. Refer to Chapter 6 for a detailed
  332. explanation of the controls.
  333. Table 2-1: Summary of Cross Assembler Controls
  334. As can be seen in Table 2-1, all assembler controls are prefaced
  335. with a dollar sign ($). No spaces or tabs are allowed between the
  336. dollar sign and the body of the control. Also, only one control
  337. per line is permitted. However, comments can be on the same line
  338. as a control. The following are examples of assembler controls:
  339. $TITLE(8051 Program Ver. 1.0)
  340. $LIST
  341. $PAGEWIDTH(132)
  342. 2.5. Assembler Directives
  343. Assembler directives are used to define symbols, reserve memory
  344. space, store values in program memory and switch between
  345. different memory spaces. There are also directives that set the
  346. location counter for the active segment and identify the end of
  347. the source file. Table 2-2 summarizes the assembler directives
  348. available. These directives are fully explained in Chapter 5.
  349. Table 2-2: Summary of Cross Assembler Directives
  350. Only one directive per line is allowed, however comments may be
  351. 2-3
  352. included. The following are examples of assembler directives:
  353. TEN EQU 10
  354. RESET CODE 0
  355. ORG 4096
  356. 2.6. 8051 Instruction Mnemonics
  357. The standard 8051 Assembly Language Instruction mnemonics plus
  358. the generic CALL and JMP instructions are recognized by the Cross
  359. Assembler and are summarized in Table 2-3. See Chapter 4 for the
  360. operation of the individual instructions.
  361. 2-4
  362. Table 2-3: 8051 Instructions and Mnemonics
  363. When the Cross Assembler sees a generic CALL or JMP instruction,
  364. it will try to translate the instruction into its most byte
  365. efficient form. The Cross Assembler will translate a CALL into
  366. one of two instructions (ACALL or LCALL) and it will translate a
  367. generic JMP into one of three instructions (SJMP, AJMP or LJMP).
  368. The choice of instructions is based on which one is most byte
  369. efficient. The generic CALL or JMP instructions saves the
  370. programmer the trouble of determining which form is best.
  371. However, generic CALLs and JMPs do have their limitations. While
  372. the byte efficiency algorithm works well for previously defined
  373. locations, when the target location of the CALL or JMP is a forward
  374. location (a location later on in the program), the assembler has no
  375. way of determining the best form of the instruction. In this case
  376. the Cross Assembler simply puts in the long version (LCALL or LJMP)
  377. of the instruction, which may not be the most byte efficient. NOTE
  378. that the generic CALLs and JMPs must not be used for the 751/752
  379. device as LCALL and LJMP are not legal instructions for those
  380. devices. Instead use ACALL and AJMP explicitly.
  381. For instructions that have operands, the operands must be
  382. separated from the mnemonic by at least one space or tab. For
  383. instructions that have multiple operands, each operand must be
  384. separated from the others by a comma.
  385. Two addressing modes require the operands to be preceded by
  386. special symbols to designate the addressing mode. The AT sign
  387. (@) is used to designate the indirect addressing mode. It is
  388. used primarily with Register 0 and Register 1 (R0, R1), but is
  389. can also be used with the DPTR in the MOVX and the Accumulator in
  390. MOVC and JMP @A+DPTR instructions. The POUND sign (#) is used to
  391. designate an immediate operand. It can be used to preface
  392. either a number or a symbol representing a number.
  393. A third symbol used with the operands actually specifies an
  394. operation. The SLASH (/) is used to specify that the contents of
  395. a particular bit address is to be complemented before the
  396. 2-5
  397. instruction operation. This is used with the ANL and ORL bit
  398. instructions.
  399. Only one assembly language instruction is allowed per line.
  400. Comments are allowed on the same line as an instruction, but only
  401. after all operands have been specified. The following are
  402. examples of instruction statements:
  403. START: LJMP INIT
  404. MOV @R0,Serial_Port_Buffer
  405. CJNE R0 , #TEN, INC_TEN
  406. ANL C,/START_FLAG
  407. CALL GET_BYTE
  408. RET
  409. 2.7. Bit Addressing
  410. The period (.) has special meaning to the Cross Assembler when
  411. used in a symbol. It is used to explicitly specify a bit in a
  412. bit-addressable symbol. For example, it you wanted to specify
  413. the most significant bit in the Accumulator, you could write
  414. ACC.7, where ACC was previously defined as the Accumulator
  415. address. The same bit can also be selected using the physical
  416. address of the byte it's in. For example, the Accumulator's
  417. physical address is 224. The most significant bit of the
  418. Accumulator can be selected by specifying 224.7. If the symbol
  419. ON was defined to be equal to the value 7, you could also specify
  420. the same bit by either ACC.ON or 224.ON.
  421. 2.8. ASCII Literals
  422. Printable characters from the ASCII character set can be used
  423. directly as an immediate operand, or they can used to define
  424. symbols or store ASCII bytes in Program Memory. Such use of the
  425. ASCII character set is called ASCII literals. ASCII literals are
  426. identified by the apostrophe (') delimiter. The apostrophe
  427. itself can be used as an ASCII literal. In this case, use two
  428. apostrophes in a row. Below are examples of using ASCII
  429. literals.
  430. MOV A,#'m' ;Load A with 06DH (ASCII m)
  431. QUOTE EQU '''' ;QUOTE defined as 27H (ASCII single quote)
  432. DB '8051' ;Store in Program Memory
  433. 2.9. Comments
  434. Comments are user defined character strings that are not
  435. processed by the Cross Assembler. A comment begins with a
  436. semicolon ( ; ) and ends at the carriage return/line feed pair
  437. that terminates the line. A comment can appear anywhere in a
  438. line, but it has to be the last field. The following are
  439. examples of comment lines:
  440. 2-6
  441. ; Begin initialization routine here
  442. $TITLE(8051 Program Vers. 1.0) ;Place version number here
  443. TEN EQU 10 ;Constant
  444. ; Comment can begin anywhere in a line
  445. MOV A,Serial_Port_Buffer ; Get character
  446. 2.10. The Location Counter
  447. The Cross Assembler keeps a location counter for each of the five
  448. segments (code, internal data, external data, indirect internal
  449. data and bit data). Each location counter is initialized to zero
  450. and can be modified using Assembler Directives described in
  451. Chapter 5.
  452. The dollar sign ($) can be used to specify the current value of
  453. the location counter of the active segment. The following are
  454. examples of how this can be used:
  455. JNB FLAG,$ ;Jump on self until flag is reset
  456. CPYRGHT: DB 'Copyright, 1983'
  457. CPYRGHT_LENGTH
  458. EQU $-CPYRGHT-1 ;Calculate length of copyright message
  459. 2.11. Syntax Summary
  460. Since the Cross Assembler essentially translates the source file
  461. on a line by line basis, certain rules must be followed to ensure
  462. the translation process is done correctly. First of all, since
  463. the Cross Assembler's line buffer is 256 characters deep, there
  464. must always be a carriage return/line feed pair within the first
  465. 256 columns of the line.
  466. A legal source file line must begin with either a control, a
  467. symbol, a label, an instruction mnemonic, a directive, a comment
  468. or it can be null (just the carriage return/line feed pair). Any
  469. other beginning to a line will be flagged as an error.
  470. While a legal source file line must begin with one of the above
  471. items, the item doesn't have to begin in the first column of the
  472. line. It only must be the first field of the line. Any number
  473. (including zero) of spaces or tabs, up to the maximum line size,
  474. may precede it.
  475. Comments can be placed anywhere, but they must be the last field
  476. in any line.
  477. 2.12. Numbers and Operators
  478. The Cross Assembler accepts numbers in any one of four radices:
  479. binary, octal, decimal and hexadecimal. To specify a number in a
  480. specific radix, the number must use the correct digits for the
  481. particular radix and immediately following the number with its
  482. 2-7
  483. radix designator. Decimal is the default radix and the use of
  484. its designator is optional. An hexadecimal number that would
  485. begin with a letter digit must be preceded by a 0 (zero) to
  486. distinguish it from a symbol. The internal representation of
  487. numbers is 16-bits, which limits the maximum number possible.
  488. Table 2-4 summarizes the radices available.
  489. MAXIMUM LEGAL
  490. RADIX DESIGNATOR LEGAL DIGITS NUMBER
  491. ----------- ---------- ------------ -----------------
  492. Binary B 0,1 1111111111111111B
  493. Octal O,Q 0,1,2,3,4,5, 177777O
  494. 6,7 177777Q
  495. Decimal D,(default) 0,1,2,3,4,5, 65535D
  496. 6,7,8,9 65535
  497. Hexadecimal H 0,1,2,3,4,5, 0FFFFH
  498. 6,7,8,9,A,B,
  499. C,D,E,F
  500. Table 2-4: Cross Assembler Radices
  501. No spaces or tabs are allowed between the number and the radix
  502. designator. The letter digits and radix designators can be in
  503. upper or lower case. The following examples list the decimal
  504. number 2957 in each of the available radices:
  505. 101110001101B (Binary)
  506. 5615o or 5615Q (Octal)
  507. 2957 or 2957D (Decimal)
  508. 0B8DH, 0b8dh (Hexadecimal)
  509. When using radices with explicit bit symbols, the radix
  510. designator follows the byte portion of the address as shown in
  511. the following examples:
  512. 0E0H.7 Bit seven of hexadecimal address 0E0
  513. 200Q.ON Bit ON of octal address 200
  514. The Cross Assembler also allows assembly time evaluation of
  515. arithmetic expressions up to thirty-two levels of embedded
  516. parentheses. All calculations use integer numbers and are done
  517. in sixteen bit precision.
  518. OPERATOR SYMBOL OPERATION
  519. --------------- ------------------------
  520. + Addition
  521. Unary positive
  522. - Subtraction
  523. Unary negation (2's complement)
  524. * Multiplication
  525. / Integer division (no remainder)
  526. MOD Modulus (remainder of integer division)
  527. SHR Shift right
  528. SHL Shift left
  529. 2-8
  530. NOT Logical negation (1's complement)
  531. AND Logical and
  532. OR Inclusive or
  533. XOR Exclusive or
  534. LOW Low order 8-bits
  535. HIGH High order 8-bits
  536. EQ, = Relational equal
  537. NE, <> Relational not equal
  538. GT, > Relational greater than
  539. GE, >= Relational greater than or equal
  540. LT, < Relational less than
  541. LE, <= Relational less than or equal
  542. ( ) Parenthetical statement
  543. Table 2-5: Assembly Time Operations
  544. The relational operators test the specified values and return
  545. either a True or False. False is represented by a zero value,
  546. True is represented by a non zero value (the True condition
  547. actually returns a 16-bit value with every bit set; i.e.,
  548. 0FFFFH). The relational operators are used primarily with the
  549. Conditional Assembly capability of the Cross Assembler.
  550. Table 2-5 lists the operations available while Table 2-6 lists
  551. the operations precedence in descending order. Operations with
  552. higher precedence are done first. Operations with equal
  553. precedence are evaluated from left to right.
  554. OPERATION PRECEDENCE
  555. --------- ----------
  556. (,) HIGHEST
  557. HIGH,LOW
  558. *,/,MOD,SHR,SHL
  559. +,-
  560. EQ,LT,GT,LE,GE,NE,=,<,>,<=,>=,<>
  561. NOT
  562. AND
  563. OR,XOR LOWEST
  564. Table 2-6: Operators Precedence
  565. The following are examples of all the available operations and
  566. their result:
  567. HIGH(0AADDH) will return a result of 0AAH
  568. LOW(0AADDH) will return a result of 0DDH
  569. 7*4 will return a result of 28
  570. 7/4 will return a result of 1
  571. 7 MOD 4 will return a result of 3
  572. 1000B SHR 2 will return a result of 0010B
  573. 1010B SHL 2 will return a result of 101000B
  574. 10+5 will return a result of 15
  575. +72 will return a result of 72
  576. 25-17 will return a result of 8
  577. 2-9
  578. -1 will return a result of 1111111111111111B
  579. NOT 1 will return a result of 1111111111111110B
  580. 7 EQ 4, 7 = 4 will return a result of 0
  581. 7 LT 4, 7 < 4 will return a result of 0
  582. 7 GT 4, 7 > 4 will return a result of 0FFFFH
  583. 7 LE 4, 7 <= 4 will return a result of 0
  584. 7 GE 4, 7 >= 4 will return a result of 0FFFFH
  585. 7 NE 4, 7 <> 4 will return a result of 0FFFFH
  586. 1101B AND 0101B will return a result of 0101B
  587. 1101B OR 0101B will return a result of 1101B
  588. 1101B XOR 0101B will return a result of 1000B
  589. 2.13. Source File Listing
  590. The source file listing displays the results of the Cross
  591. Assembler translation. Every line of the listing includes a copy
  592. of the original source line as well as a line number and the
  593. Cross Assembler translation.
  594. For example, in translating the following line taken from the
  595. middle of a source file:
  596. TRANS: MOV R7,#32 ;Set up pointer
  597. the listing will print:
  598. 002F 7920 152 TRANS: MOV R1,#32 ;Set up pointer
  599. The '002F' is the current value of the location counter in
  600. hexadecimal. The '7920' is the translated instruction, also in
  601. hexadecimal. The '152' is the decimal line number of the current
  602. assembly. After the line number is a copy of the source file
  603. line that was translated.
  604. Another example of a line in the listing file is as follows:
  605. 015B 13 =1 267 +2 RRC A
  606. Here we see two additional fields. The '=1' before the line
  607. number gives the current nesting of include files. The '+2'
  608. after the line number gives the current macro nesting. This line
  609. essentially says that this line comes from a second level nesting
  610. of a macro that is part of an include file.
  611. Another line format that is used in the listing is that of symbol
  612. definition. In this case the location counter value and
  613. translated instruction fields described above are replaced with
  614. the definition of the symbol. The following are examples of
  615. this:
  616. 00FF 67 MAX_NUM EQU 255
  617. REG 68 COUNTER EQU R7
  618. The '00FF' is the hexadecimal value of the symbol MAX_NUM.
  619. Again, '67'is the decimal line number of the source file and the
  620. 2-10
  621. remainder of the first line is a copy of the source file. In the
  622. second line above, the 'REG' shows that the symbol COUNTER was
  623. defined to be a general purpose register.
  624. Optionally, a listing can have a page header that includes the
  625. name of the file being assembled, title of program, date and page
  626. number. The header and its fields are controlled by specific
  627. Assembler Controls (see Chapter 6).
  628. The default case is for a listing to be output as a file on the
  629. default drive with the same name as the entered source file and
  630. an extension of .LST. For example, if the source file name was
  631. PROGRAM.ASM, the listing file would be called PROGRAM.LST. Or if
  632. the source file was called MODULE1, the listing file would be
  633. stored as MODULE1.LST. The default can be changed using the
  634. $NOPRINT and $PRINT() Assembler Controls (see Chapter 6).
  635. 2.14. Object File
  636. The 8051 Cross Assembler also creates a machine language object
  637. file. The format of the object file is standard Intel
  638. Hexadecimal. This Hexadeciaml file can be used to either program
  639. EPROMs using standard PROM Programmers for prototyping, or used
  640. to pattern masked ROMs for production.
  641. The default case is for the object file to be output on the
  642. default drive with the same name as the first source file and an
  643. extension of .HEX. For example, if the source file name was
  644. PROGRAM.ASM, the object file would be called PROGRAM.HEX. Or if
  645. the source file was called MODULE1, the object file would be
  646. stored as MODULE1.HEX. The default can be changed using the
  647. $NOOBJECT and $OBJECT() Assembler Controls (see Chapter 6).
  648. 2-11
  649. CHAPTER 3
  650. RUNNING THE 8051 CROSS ASSEMBLER ON PC-DOS/MS-DOS SYSTEMS
  651. 3.1. Cross Assembler Files
  652. The floppy disk you receive with this manual is an 8 sector,
  653. single-sided, double density disk. This distribution disk will
  654. contain the following files:
  655. ASM51.EXE The Cross Assembler program itself
  656. MOD152 Source file for the $MOD152 control
  657. MOD154 Source file for the $MOD154 control
  658. MOD252 Source file for the $MOD252 control
  659. MOD44 Source file for the $MOD44 control
  660. MOD451 Source file for the $MOD451 control
  661. MOD452 Source file for the $MOD452 control
  662. MOD51 Source file for the $MOD51 control
  663. MOD512 Source file for the $MOD512 control
  664. MOD515 Source file for the $MOD515 control
  665. MOD517 Source file for the $MOD517 control
  666. MOD52 Source file for the $MOD52 control
  667. MOD521 Source file for the $MOD521 control
  668. MOD552 Source file for the $MOD552 control
  669. MOD652 Source file for the $MOD652 control
  670. MOD751 Source file for the $MOD751 control
  671. MOD752 Source file for the $MOD752 control
  672. MOD851 Source file for the $MOD851 control
  673. There will also be one or more files with an extension of .ASM.
  674. These are sample programs. Listings of these programs can be
  675. found in Appendix A.
  676. DON'T USE THE DISTRIBUTION DISK. MAKE WORKING AND BACKUP COPIES
  677. FROM THE DISTRIBUTION DISK AND THEN STORE THE DISTRIBUTION DISK
  678. IN A SAFE PLACE.
  679. 3.2. Minimum System Requirements
  680. With DOS 2.0 or later - 96K RAM
  681. 1 Floppy Disk Drive
  682. 3.3. Running the Cross Assembler
  683. Once you've created an 8051 assembly language source text file in
  684. accordance with the guidelines in Chapter 2, you are now ready to
  685. run the Cross Assembler. Make sure your system is booted and the
  686. DOS prompt ( A> ) appears on the screen. Place the disk with the
  687. 8051 Cross Assembler on it in the drive and simply type (in all
  688. the following examples, the symbol <CR> is used to show where the
  689. 3-1
  690. ENTER key was hit):
  691. ASM51<CR>
  692. If the 8051 Cross Assembler disk was placed in a drive other than
  693. the default drive, the drive name would have to be typed first.
  694. For example, if the A drive is the default drive, and the 8051
  695. Cross Assembler is in the B drive, you would then type:
  696. B:ASM51<CR>
  697. After loading the program from the disk, the program's name, its
  698. version number and general copyright information will be dis-
  699. played on the screen. The Cross Assembler then asks for the
  700. source file name to begin the assembly process.
  701. Source file drive and name [.ASM]:
  702. At this point, if you have only one floppy disk drive and the
  703. 8051 Cross Assembler and source files are on separate disks,
  704. remove the disk with the 8051 Cross Assembler on it and replace
  705. it with your source file disk.
  706. Next, enter the source file name. If no extension is given, the
  707. Cross Assembler will assume an extension of .ASM. If no drive is
  708. given, the Cross Assembler will assume the default drive. Since
  709. in every case where no drive is given, the Cross Assembler
  710. assumes the default drive, it is generally a good practice to
  711. change the default drive to the drive with your source files.
  712. An alternative method for entering the source file is in the
  713. command line. In this case, after typing in ASM51, type in a
  714. space and the source file name (again if no extension is given,
  715. source file on the command line:
  716. A>ASM51 B:CONTROL.A51<CR>
  717. After the source file name has been accepted, the Cross Assembler
  718. will begin the translation process. As it starts the first pass
  719. of its two pass process, it will print on the screen:
  720. First pass
  721. At the completion of the first pass, and as it starts its second
  722. pass through the source file, the Cross Assembler will display:
  723. Second pass
  724. When second pass is completed, the translation process is done
  725. and the Cross Assembler will print the following message:
  726. ASSEMBLY COMPLETE, XX ERRORS FOUND
  727. XX is replaced with the actual number of errors that were found.
  728. Disk I/O may continue for a while as the Cross Assembler appends
  729. 3-2
  730. the symbol table to the listing file.
  731. 3.4. Example Running the Cross Assembler
  732. The following is an example of an actual run. The Cross
  733. Assembler will take the source file SAMPLE.ASM from Drive A
  734. (default drive).
  735. Again, the symbol <CR> is used to show where the ENTER key was
  736. hit.
  737. A>ASM51<CR>
  738. 8 0 5 1 C R O S S A S S E M B L E R
  739. Version 1.2
  740. (c) Copyright 1984, 1985, 1986, 1987, 1988, 1989, 1990
  741. MetaLink Corporation
  742. Source file drive and name [.ASM]: sample<CR>
  743. First pass
  744. Second pass
  745. ASSEMBLY COMPLETE, 0 ERRORS FOUND
  746. 3.5. DOS Hints and Suggestions
  747. If you are using DOS 2.0 or later, you may want to use the BREAK
  748. ON command before you run the Cross Assembler. This will allow
  749. you to abort (Ctrl-Break) the Cross Assembler at any time.
  750. Otherwise, you will only be able to abort the Cross Assembler
  751. after it completes a pass through the source file. If you are
  752. assembling a large file, this could cause you a several minute
  753. wait before the Cross Assembler aborts.
  754. The reason for this it that the default condition for DOS to
  755. recognizes a Ctrl-Break is when the program (in this case the
  756. Cross Assembler) does keyboard, screen or printer I/O.
  757. Unfortunately, the assembler does this very rarely (once each
  758. pass). By using the BREAK ON command, DOS will recognize a Ctrl-
  759. Break for all I/O, including disk I/O. Since the Cross Assembler
  760. is constantly doing disk I/O, with BREAK ON you can abort almost
  761. immediately by hitting the Ctrl-Break keys.
  762. 3-3
  763. So much for the good news. However, aborting a program can cause
  764. some undesirable side-effects. Aborting a program while files
  765. are open causes DOS to drop some information about the open
  766. files. This results in disk sectors being allocated when they
  767. are actually free. Your total available disk storage shrinks.
  768. You should make the practice of running CHKDSK with the /F switch
  769. periodically to recover these sectors.
  770. The Cross Assembler run under DOS 2.0 or later supports
  771. redirection. You can specify the redirection on the command line.
  772. Use the following form:
  773. ASM51 <infile >outfile
  774. "infile" and "outfile" can be any legal file designator. The
  775. Cross Assembler will take its input from the "infile" instead of
  776. the keyboard and will send its output to "outfile" instead of the
  777. screen.
  778. Note that redirection of input in ASM51 is redundant since the
  779. assembler is an absolute assembler and has no command line
  780. options other than the file name argument.
  781. Output redirection is useful for speeding up the assembly
  782. process. Because assembly-time errors are directed to std_err in
  783. DOS, an error listing cannot be redirected to a file
  784. To make the .lst file serve as an error-only file, use the Cross
  785. Assembler Controls $PRINT (create a list file) $NOLIST (turn the
  786. listing off). Use the Cross Assembler Controls $NOSYMBOLS to
  787. further compress the error-only listing resulting from the
  788. manipulation of the list file controls. See Chapter 6 for more
  789. information. The errors will be listed in the .lst file, as
  790. usual.
  791. If the control $NOPRINT (see Chapter 6) is active, all error
  792. messages are send to the screen.
  793. 3.6. References
  794. 1. IBM Corp., Disk Operating System, Version 1.10, May 1982.
  795. 2. IBM Corp., Disk Operating System, Version 2.00, January 1983.
  796. 3-4
  797. CHAPTER 4
  798. 8051 INSTRUCTION SET
  799. 4.1. Notation
  800. Below is an explanation of the column headings and column
  801. contents of the 8051 Instruction Set Summary Table that follows
  802. in this chapter.
  803. MNEMONIC
  804. The MNEMONIC column contains the 8051 Instruction Set Mnemonic
  805. and a brief description of the instruction's operation.
  806. OPERATION
  807. The OPERATION column describes the 8051 Instruction Set in unam-
  808. biguous symbology. Following are the definitions of the symbols
  809. used in this column.
  810. <n:m> Bits of a register inclusive. For
  811. example, PC<10:0> means bits 0 through 10
  812. inclusive of the PC. Bit 0 is always the
  813. least significant bit.
  814. + Binary addition
  815. - Binary 2s complement subtraction
  816. / Unsigned integer division
  817. X Unsigned integer multiplication
  818. ~ Binary complement (1s complement)
  819. ^ Logical And
  820. v Inclusive Or
  821. v Exclusive Or
  822. > Greater than
  823. <> Not equal to
  824. = Equals
  825. -> Is written into. For example, A + SOper -
  826. > A means the result of the binary
  827. addition between A and the Source Operand
  828. is written into A.
  829. A The 8-bit Accumulator Register.
  830. AC The Auxiliary Carry Flag in the Program
  831. Status Word
  832. CF The Carry Flag in the Program Status Word
  833. DOper The Destination Operand used in the
  834. instruction.
  835. DPTR 16-bit Data Pointer
  836. Intrupt Active Flag Internal Flag that holds off interrupts
  837. 4-1
  838. until the Flag is cleared.
  839. Jump Relative to PC A Jump that can range between -128 bytes
  840. and +127 bytes from the PC value of
  841. the next instruction.
  842. Paddr A 16-bit Program Memory address
  843. PC The 8051 Program Counter. This 16-bit
  844. register points to the byte in the
  845. Program Memory space that is fetched as
  846. part of the instruction stream.
  847. PM(addr) Byte in Program Memory space pointed
  848. to by addr.
  849. Remainder Integer remainder of unsigned integer division
  850. SOper The Source Operand used in the instruction.
  851. SP 8-bit Stack Pointer
  852. STACK The Last In First Out data structure that
  853. is controlled by the 8-bit Stack
  854. Pointer (SP). Sixteen bit quantities are
  855. pushed on the stack low byte first.
  856. DEST ADDR MODE/SOURCE ADDR MODE
  857. These two columns specify the Destination and Source Addressing
  858. Modes, respectively, that are available for each instruction.
  859. AB The Accumulator-B Register pair.
  860. Accumulator Operand resides in the accumulator
  861. Bit Direct Operand is the state of the bit specified by the
  862. Bit Memory address.
  863. Carry Flag Operand is the state of the 1-bit Carry flag in
  864. the Program Status Word (PSW).
  865. Data Pointer Operand resides in the 16-bit Data Pointer
  866. Register.
  867. Direct Operand is the contents of the specified 8-bit
  868. Internal Data Memory address from 0
  869. (00H) to 127 (7FH) or a Special Function Register
  870. address.
  871. Indirect Operand is the contents of the address contained
  872. in the register specified.
  873. Immediate Operand is the next sequential byte after the
  874. instruction in Program Memory space
  875. Prog Direct 16-bit address in Program Memory Space.
  876. Prog Indir Operand in Program Memory Space is the address
  877. contained in the register specified.
  878. Register Operand is the contents of the register specified.
  879. Stack Operand is on the top of the Stack.
  880. ASSEMBLY LANGUAGE FORM
  881. This column contains the correct format of the instructions that
  882. are recognized by the Cross Assembler.
  883. A Accumulator
  884. AB Accumulator-B Register pair.
  885. 4-2
  886. C Carry Flag
  887. Baddr Bit Memory Direct Address.
  888. Daddr Internal Data Memory or Special Function Register
  889. Direct Address.
  890. data 8-bit constant data.
  891. data16 16-bit constant data.
  892. DPTR 16-bit Data Pointer Register.
  893. PC 16-bit Program Counter.
  894. Paddr 16-bit Program Memory address
  895. Ri Indirect Register. R0 or R1 are the only indirect
  896. registers.
  897. Roff 8-bit offset for Relative Jump.
  898. Rn Implicit Register. Each register bank has 8 general
  899. purpose registers, designated R0, R1, R2, R3,
  900. R4, R5, R6, R7.
  901. HEX OPCODE
  902. This column gives the machine language hexadecimal opcode for
  903. each 8051 instruction.
  904. BYT
  905. This column gives the number of bytes in each 8051 instruction.
  906. CYC
  907. This column gives the number of cycles of each 8051 instruction.
  908. The time value of a cycle is defined as 12 divided by the
  909. oscillator frequency. For example, if running an 8051 family
  910. component at 12 MHz, each cycle takes 1 microsecond.
  911. PSW
  912. This column identifies which condition code flags are affected by
  913. the operation of the individual instructions. The condition code
  914. flags available on the 8051 are the Carry Flag, CF, the Auxiliary
  915. Carry Flag, AC, and the Overflow Flag, OV.
  916. It should be noted that the PSW is both byte and bit directly
  917. addressable. Should the PSW be the operand of an instruction
  918. that modifies it, the condition codes could be changed even if
  919. this column states that the instruction doesn't affect them.
  920. 0 Condition code is cleared
  921. 1 Condition code is set
  922. * Condition code is modified by instruction
  923. - Condition code is not affected by instruction
  924. 4.2. 8051 Instruction Set Summary
  925. 4-3
  926. 4-4
  927. 4-5
  928. 4-6
  929. 4-7
  930. 4-8
  931. 4-9
  932. 4-10
  933. 4-11
  934. 4-12
  935. 4.3. Notes
  936. 1 There are 8 possible opcodes. Starting with 11H as the
  937. opcode base, the final opcode is formed by placing bits 8, 9 and
  938. 10 of the target address in bits 5, 6 and 7 of the opcode. The 8
  939. possible opcodes in hexadecimal are then: 11, 31, 51, 71, 91, B1,
  940. D1, F1.
  941. 2 There are 8 possible opcodes. Starting with 01H as
  942. the opcode base, the final opcode is formed by placing bits 8, 9
  943. and 10 of the target address in bits 5, 6 and 7 of the opcode.
  944. The 8 possible opcodes in hexadecimal are then: 01, 21, 41, 61,
  945. 81, A1, C1, E1.
  946. 3 The Carry Flag is set if the Destination Operand is
  947. less than the Source Operand. Otherwise the Carry Flag is
  948. cleared.
  949. 4 The Carry Flag is set if the BCD result in the
  950. Accumulator is greater than decimal 99.
  951. 5 The Overflow Flag is set if the B Register contains
  952. zero (flags a divide by zero operation). Otherwise the Overflow
  953. Flag is cleared.
  954. 6 If any of the condition code flags are specified as
  955. the operand of this instruction, they will be reset by the
  956. instruction if they were originally set.
  957. 7 The high byte of the 16-bit product is placed in the
  958. B Register, the low byte in Accumulator.
  959. 4.4. References
  960. 1. Intel Corp., Microcontroller Handbook, 1984.
  961. 4-13
  962. CHAPTER 5
  963. 8051 CROSS ASSEMBLER DIRECTIVES
  964. 5.1. Introduction
  965. The 8051 Cross Assembler Directives are used to define symbols,
  966. reserve memory space, store values in program memory, select
  967. various memory spaces, set the current segment's location counter
  968. and identify the end of the source file.
  969. Only one directive per line is allowed, however comments may be
  970. included. The remaining part of this chapter details the
  971. function of each directive.
  972. 5.2. Symbol Definition Directives
  973. EQU Directive
  974. The EQUate directive is used to assign a value to a symbol. It
  975. can also be used to specify user defined names for the implicit
  976. operand symbols predefined for the Accumulator (i.e., A) and the
  977. eight General Purpose Registers (i.e., R0 thru R7).
  978. The format for the EQU directive is: symbol, followed by one or
  979. more spaces or tabs, followed by EQU, followed by one or more
  980. spaces or tabs, followed by a number, arithmetic expression,
  981. previously defined symbol (no forward references allowed) or one
  982. of the allowed implicit operand symbols (e.g., A, R0, R1, R2, R3,
  983. R4, R5, R6, R7), followed by an optional comment.
  984. Below are examples of using the EQU Directive:
  985. TEN EQU 10 ;Symbol equated to a number
  986. COUNTER EQU R7 ;User defined symbol for the implicit
  987. ;operand symbol R7. COUNTER can now
  988. ;be used wherever it is legal to use
  989. ;R7. For example the instruction
  990. ;INC R7 could now be written INC COUNTER.
  991. ALSO_TEN EQU TEN ;Symbol equated to a previously defined
  992. ;symbol.
  993. FIVE EQU TEN/2 ;Symbol equated to an arithmetic exp.
  994. A_REG EQU A ;User defined symbol for the implicit
  995. ;operand symbol A.
  996. ASCII_D EQU 'D' ;Symbol equated to an ASCII literal
  997. SET Directive
  998. Similar to the EQU directive, the SET directive is used to assign
  999. a value or implicit operand to a user defined symbol. The
  1000. difference however, is that with the EQU directive, a symbol can
  1001. 5-1
  1002. only be defined once. Any attempt to define the symbol again
  1003. will cause the Cross Assembler to flag it as an error. On the
  1004. other hand, with the SET directive, symbols are redefineable.
  1005. There is no limit to the number of times a symbol can be
  1006. redefined with the SET directive.
  1007. The format for the SET directive is: symbol, followed by one or
  1008. more spaces or tabs, followed by SET, followed by one or more
  1009. spaces or tabs, followed by a number, arithmetic expression,
  1010. previously defined symbol (no forward references allowed) or one
  1011. of the allowed implicit operand symbols (e.g., A, R0, R1, R2, R3,
  1012. R4, R5, R6, R7), followed by an optional comment.
  1013. Below are examples of using the SET Directive:
  1014. POINTER SET R0 ;Symbol equated to register 0
  1015. POINTER SET R1 ;POINTER redefined to register 1
  1016. COUNTER SET 1 ;Symbol initialized to 1
  1017. COUNTER SET COUNTER+1 ;An incrementing symbol
  1018. BIT Directive
  1019. The BIT Directive assigns an internal bit memory direct address
  1020. to the symbol. If the numeric value of the address is between 0
  1021. and 127 decimal, it is a bit address mapped in the Internal
  1022. Memory Space. If the numeric value of the address is between 128
  1023. and 255, it is an address of a bit located in one of the Special
  1024. Function Registers. Addresses greater than 255 are illegal and
  1025. will be flagged as an error.
  1026. The format for the BIT Directive is: symbol, followed by one or
  1027. more spaces or tabs, followed by BIT, followed by one or more
  1028. spaces or tabs, followed by a number, arithmetic expression, or
  1029. previously defined symbol (no forward references allowed),
  1030. followed by an optional comment.
  1031. Below are examples of using the BIT Directive:
  1032. CF BIT 0D7H ;The single bit Carry Flag in PSW
  1033. OFF_FLAG BIT 6 ;Memory address of single bit flag
  1034. ON_FLAG BIT OFF_FLAG+1 ;Next bit is another flag
  1035. CODE Directive
  1036. The CODE Directive assigns an address located in the Program
  1037. Memory Space to the symbol. The numeric value of the address
  1038. cannot exceed 65535.
  1039. The format for the CODE Directive is: symbol, followed by one or
  1040. more spaces or tabs, followed by CODE, followed by one or more
  1041. spaces or tabs, followed by a number, arithmetic expression, or
  1042. previously defined symbol (no forward references allowed),
  1043. followed by an optional comment.
  1044. 5-2
  1045. Below are examples of using the CODE Directive:
  1046. RESET CODE 0
  1047. EXTI0 CODE RESET + (1024/16)
  1048. DATA Directive
  1049. The DATA Directive assigns a directly addressable internal memory
  1050. address to the symbol. If the numeric value of the address is
  1051. between 0 and 127 decimal, it is an address of an Internal Data
  1052. Memory location. If the numeric value of the address is between
  1053. 128 and 255, it is an address of a Special Function Register.
  1054. Addresses greater than 255 are illegal and will be flagged as an
  1055. error.
  1056. The format for the DATA Directive is: symbol, followed by one or
  1057. more spaces or tabs, followed by DATA, followed by one or more
  1058. spaces or tabs, followed by a number, arithmetic expression, or
  1059. previously defined symbol (no forward references allowed),
  1060. followed by an optional comment.
  1061. Below are examples of using the DATA Directive:
  1062. PSW DATA 0D0H ;Defining the Program Status address
  1063. BUFFER DATA 32 ;Internal Data Memory address
  1064. FREE_SPAC DATA BUFFER+16 ;Arithmetic expression.
  1065. IDATA Directive
  1066. The IDATA Directive assigns an indirectly addressable internal
  1067. data memory address to the symbol. The numeric value of the
  1068. address can be between 0 and 255 decimal. Addresses greater than
  1069. 255 are illegal and will be flagged as an error.
  1070. The format for the IDATA Directive is: symbol, followed by one or
  1071. more spaces or tabs, followed by IDATA, followed by one or more
  1072. spaces or tabs, followed by a number, arithmetic expression, or
  1073. previously defined symbol (no forward references allowed),
  1074. followed by an optional comment.
  1075. Below are examples of using the IDATA Directive:
  1076. TOKEN IDATA 60
  1077. BYTE_CNT IDATA TOKEN + 1
  1078. ADDR IDATA TOKEN + 2
  1079. XDATA Directive
  1080. The XDATA Directive assigns an address located in the External
  1081. Data Memory Space to the symbol. The numeric value of the
  1082. address cannot exceed 65535.
  1083. 5-3
  1084. The format for the XDATA Directive is: symbol, followed by one or
  1085. more spaces or tabs, followed by XDATA, followed by one or more
  1086. spaces or tabs, followed by a number, arithmetic expression, or
  1087. previously defined symbol (no forward references allowed),
  1088. followed by an optional comment.
  1089. Below are examples of using the XDATA Directive:
  1090. USER_BASE XDATA 2048
  1091. HOST_BASE XDATA USER_BASE + 1000H
  1092. 5.3. Segment Selection Directives
  1093. There are five Segment Selection Directives: CSEG, BSEG, DSEG,
  1094. ISEG, XSEG, one for each of the five memory spaces in the 8051
  1095. architecture. The CSEG Directive is used to select the Program
  1096. Memory Space. The BSEG Directive is used to select the Bit
  1097. Memory Space. The DSEG Directive is used to select the directly
  1098. addressable Internal Data Memory Space. The ISEG is used to
  1099. select the indirectly addressable Internal Data Memory Space.
  1100. The XSEG is used to select the External Data Memory Space.
  1101. Each segment has its own location counter that is reset to zero
  1102. during the Cross Assembler program initialization. The contents
  1103. of the location counter can be overridden by using the optional
  1104. AT after selecting the segment.
  1105. The Program Memory Space, or CSEG, is the default segment and is
  1106. selected when the Cross Assembler is run.
  1107. The format of the Segment Selection Directives are: zero or more
  1108. spaces or tabs, followed by the Segment Selection Directive,
  1109. followed by one or more spaces or tabs, followed by the optional
  1110. segment location counter override AT command and value, followed
  1111. by an optional comment.
  1112. The value of the AT command can be a number, arithmetic
  1113. expression or previously defined symbol (forward references are
  1114. not allowed). Care should be taken to ensure that the location
  1115. counter does not advance beyond the limit of the selected
  1116. segment.
  1117. Below are examples of the Segment Selection Directives:
  1118. DSEG ;Select direct data segment using
  1119. ;current location counter value.
  1120. BSEG AT 32 ;Select bit data segment forcing
  1121. ;location counter to 32 decimal.
  1122. XSEG AT (USER_BASE * 5) MOD 16 ;Arithmetic expressions can be
  1123. ;used to specify location.
  1124. 5.4. Memory Reservation and Storage Directives
  1125. 5-4
  1126. DS Directive
  1127. The DS Directive is used to reserve space in the currently
  1128. selected segment in byte units. It can only be used when ISEG,
  1129. DSEG or XSEG are the currently active segments. The location
  1130. counter of the segment is advanced by the value of the directive.
  1131. Care should be taken to ensure that the location counter does not
  1132. advance beyond the limit of the segment.
  1133. The format for the DS Directive is: optional label, followed by
  1134. one or more spaces or tabs, followed by DS, followed by one or
  1135. more spaces or tabs, followed by a number, arithmetic expression,
  1136. or previously defined symbol (no forward references allowed),
  1137. followed by an optional comment.
  1138. Below is an example of using the DS Directive in the internal
  1139. Data Segment. If, for example, the Data Segment location counter
  1140. contained 48 decimal before the example below, it would contain
  1141. 104 decimal after processing the example.
  1142. DSEG ;Select the data segment
  1143. DS 32 ;Label is optional
  1144. SP_BUFFER: DS 16 ;Reserve a buffer for the serial port
  1145. IO_BUFFER: DS 8 ;Reserve a buffer for the I/O
  1146. DBIT Directive
  1147. The DBIT Directive is used to reserve bits within the BIT
  1148. segment. It can only be used when BSEG is the active segment.
  1149. The location counter of the segment is advanced by the value of
  1150. the directive. Care should be taken to ensure that the location
  1151. counter does not advance beyond the limit of the segment.
  1152. The format for the DBIT Directive is: optional label, followed by
  1153. one or more spaces or tabs, followed by DBIT, followed by one or
  1154. more spaces or tabs, followed by a number, arithmetic expression,
  1155. or previously defined symbol (no forward references allowed),
  1156. followed by an optional comment.
  1157. Below is an example of using the DBIT Directive:
  1158. BSEG ;Select the bit segment
  1159. DBIT 16 ;Label is optional
  1160. IO_MAP: DBIT 32 ;Reserve a bit buffer for I/O
  1161. DB Directive
  1162. The DB Directive is used to store byte constants in the Program
  1163. Memory Space. It can only be used when CSEG is the active
  1164. segment.
  1165. The format for the DB Directive is: optional label, followed by
  1166. one or more spaces or tabs, followed by DB, followed by one or
  1167. more spaces or tabs, followed by the byte constants that are
  1168. 5-5
  1169. separated by commas, followed by an optional comment.
  1170. The byte constants can be numbers, arithmetic expressions, symbol
  1171. values or ASCII literals. ASCII literals have to be delimited by
  1172. apostrophes ( ' ), but they can be strung together up to the
  1173. length of the line.
  1174. Below are examples of using the DB Directive. If an optional
  1175. label is used, its value will point to the first byte constant
  1176. listed.
  1177. COPYRGHT_MSG:
  1178. DB '(c) Copyright, 1984' ;ASCII Literal
  1179. RUNTIME_CONSTANTS:
  1180. DB 127,13,54,0,99 ;Table of constants
  1181. DB 17,32,239,163,49 ;Label is optional
  1182. MIXED: DB 2*8,'MPG',2*16,'abc' ;Can mix literals & no.
  1183. DW Directive
  1184. The DW Directive is used to store word constants in the Program
  1185. Memory Space. It can only be used when CSEG is the active
  1186. segment.
  1187. The format for the DW Directive is: optional label, followed by
  1188. one or more spaces or tabs, followed by DW, followed by one or
  1189. more spaces or tabs, followed by the word constants that are
  1190. separated by commas, followed by an optional comment.
  1191. The word constants can be numbers, arithmetic expressions, symbol
  1192. values or ASCII literals. ASCII literals must be delimited by
  1193. apostrophes ( ' ), but unlike the DB Directive, only a maximum of
  1194. two ASCII characters can be strung together. The first character
  1195. is placed in the high byte of the word and the second character
  1196. is placed in the low byte. If only one character is enclosed by
  1197. the apostrophes, a zero will be placed in the high byte of the
  1198. word.
  1199. Below are examples of using the DW Directive. If an optional
  1200. label is used, its value will point to the high byte of the first
  1201. word constant listed.
  1202. JUMP_TABLE: DW RESET,START,END ;Table of addresses
  1203. DW TEST,TRUE,FALSE ;Optional label
  1204. RADIX: DW 'H',1000H ;1st byte contains 0
  1205. ;2nd byte contains 48H (H)
  1206. ;3rd byte contains 10H
  1207. ;4th byte contains 0
  1208. 5.5. Miscellaneous Directives
  1209. ORG Directive
  1210. 5-6
  1211. The ORG Directive is used to specify a value for the currently
  1212. active segment's location counter. It cannot be used to select
  1213. segments like the directives above. It can only be used within a
  1214. segment when the location counter needs to be changed. Care
  1215. should be taken to ensure that the location counter does not
  1216. advance beyond the limit of the selected segment.
  1217. The format of the ORG Directive is: zero or more spaces or tabs,
  1218. followed by ORG, followed by one or more spaces or tabs, followed
  1219. by a number, arithmetic expression, or previously defined symbol
  1220. (no forward references are allowed), followed by an optional
  1221. comment.
  1222. Below are examples of the ORG directive.
  1223. ORG 1000H ;Location counter set at 4096 decimal
  1224. ORG RESET ;Previously defined symbol
  1225. ORG BASE + MODULE_NO ;Arithmetic expression
  1226. USING DIRECTIVE
  1227. The USING Directive is used to specify which of the four General
  1228. Purpose Register banks is used in the code that follows the
  1229. directive. It allows the use of the predefined register symbols
  1230. AR0 thru AR7 instead of the register's direct addresses. It
  1231. should be noted that the actual register bank switching must
  1232. still be done in the code. This directive simplifies the direct
  1233. addressing of a specified register bank.
  1234. The format of the USING Directive is: zero or more spaces or
  1235. tabs, followed by USING, followed by one or more spaces or tabs,
  1236. followed by a number, arithmetic expression, or previously
  1237. defined symbol (no forward references are allowed), followed by
  1238. an optional comment.
  1239. The number, arithmetic expression, or previously defined symbol
  1240. must result in a number between 0 and 3 in order to specify one
  1241. of the four register banks in the 8051.
  1242. 5-7
  1243. The following table maps the specified value in the USING
  1244. directive with the direct addresses of the predefined symbols.
  1245. Predefined | USING Value |
  1246. Symbol | 0 1 2 3 |
  1247. -----------------------------------------------
  1248. AR0 0 8 16 24
  1249. AR1 1 9 17 25
  1250. AR2 2 10 18 26
  1251. AR3 3 11 19 27
  1252. AR4 4 12 20 28
  1253. AR5 5 13 21 29
  1254. AR6 6 14 22 30
  1255. AR7 7 15 23 31
  1256. Below are examples of the USING Directive:
  1257. USING 0 ;Select addresses for Bank 0
  1258. USING 1+1+1 ;Arithmetic expressions
  1259. END Directive
  1260. The END Directive is used to signal the end of the source program
  1261. to the Cross Assembler. Every source program must have one and
  1262. only one END Directive. A missing END Directive, as well as text
  1263. beyond the occurrence of the END Directive are not allowed and
  1264. will be flagged as errors.
  1265. The format of the END Directive is: zero or more spaces or tabs,
  1266. followed by END, followed by an optional comment. All text must
  1267. appear in the source program before the occurrence of the END
  1268. Directive.
  1269. Below is an example of the END Directive:
  1270. END ;This is the End
  1271. 5.6. Conditional Assembly Directives
  1272. IF, ELSE and ENDIF Directive
  1273. The IF, ELSE and ENDIF directives are used to define conditional
  1274. assembly blocks. A conditional assembly block begins with an IF
  1275. statement and must end with the ENDIF directive. In between the
  1276. IF statement and ENDIF directive can be any number of assembly
  1277. language statements, including directives, controls,
  1278. instructions, the ELSE directive and nested IF-ENDIF conditional
  1279. assembly blocks.
  1280. The IF statement starts with the keyword IF, followed by one or
  1281. more spaces or tabs, followed by a number, arithmetic expression,
  1282. or previously defined symbol (no forward references are allowed),
  1283. followed by an optional comment. The number, arithmetic
  1284. 5-8
  1285. expression or symbol is evaluated and if found to be TRUE (non-
  1286. zero), the assembly language statements are translated up to the
  1287. next ELSE or ENDIF directives. If the IF statement was evaluated
  1288. FALSE (zero), the assembly language statements are considered
  1289. null up to the next ELSE or ENDIF directives.
  1290. If an optional ELSE appears in the conditional assembly block,
  1291. the assembly language statements following are handled oppositely
  1292. from the assembly language statements following the IF statement.
  1293. In other words, if the IF statement was evaluated TRUE, the
  1294. statements following it are translated, while the statements
  1295. following the ELSE will be handled as if they were null. On the
  1296. other hand, if the IF statement was evaluated FALSE, only the
  1297. assembly language statements following the ELSE directive would
  1298. be translated.
  1299. IF-ELSE-ENDIF conditional assembly blocks can be nested up to 255
  1300. levels deep. The following are some examples of conditional
  1301. assembly blocks. This first conditional assembly block simply
  1302. checks the symbol DEBUG. If DEBUG is non-zero, the MOV and CALL
  1303. instructions will be translated by the Cross Assembler.
  1304. IF (DEBUG)
  1305. MOV A,#25
  1306. CALL OUTPUT
  1307. ENDIF
  1308. The next example used the optional ELSE directive. If
  1309. SMALL_MODEL is zero, only the statements following the ELSE
  1310. directive will be translated.
  1311. IF (SMALL_MODEL)
  1312. MOV R0,#BUFFER
  1313. MOV A,@R0
  1314. ELSE
  1315. MOV R0,#EXT_BUFFER
  1316. MOVX A,@R0
  1317. ENDIF
  1318. The last example shows nested conditional assembly blocks.
  1319. Conditional assembly blocks can be nested up to 255 levels deep.
  1320. Every level of nesting must have balanced IF-ENDIF statements.
  1321. _
  1322. IF (VERSION > 10) \
  1323. CALL DOUBLE_PRECISION |
  1324. CALL UPDATE_STATUS _ |
  1325. IF (DEBUG) \ |
  1326. CALL DUMP_REGISTERS > Nested |
  1327. ENDIF _/ Block |
  1328. ELSE > Outer Block
  1329. CALL SINGLE_PRECISION |
  1330. CALL UPDATE_STATUS _ |
  1331. IF (DEBUG) \ |
  1332. CALL DUMP_REGISTERS > Nested |
  1333. ENDIF _/ Block |
  1334. ENDIF _/
  1335. 5-9
  1336. CHAPTER 6
  1337. 8051 CROSS ASSEMBLER CONTROLS
  1338. 6.1. Introduction
  1339. Assembler controls are used to control where the Cross Assembler
  1340. gets its input source file, where it stores the object file, how
  1341. it formats and where it outputs the listing.
  1342. All Assembler controls are prefaced with a dollar sign, ($). No
  1343. spaces or tabs are allowed between the dollar sign and the body
  1344. of the control. Also, only one control per line is permitted.
  1345. Comments are allowed on the same line as an Assembler control.
  1346. There are two types of controls, Primary controls and General
  1347. controls. Primary controls can be invoked only once per
  1348. assembly. If an attempt is made to change a previously invoked
  1349. primary control, the attempt is ignored. For example, if
  1350. $NOPRINT is put on line 1 of the source file and $PRINT is put on
  1351. line 2, the $PRINT control will be ignored and the listing will
  1352. not be output. General controls can be invoked any number of
  1353. times in a source program.
  1354. There are two legal forms for each Assembler control, the full
  1355. form and the abbreviated form. The two forms can be used inter-
  1356. changeable in the source program.
  1357. Below is a description of each Assembler control. Assembler
  1358. controls with common functionality are grouped together.
  1359. 6.2. Assembler Control Descriptions
  1360. $DATE(date)
  1361. Places the ASCII string enclosed by parenthesis in the date
  1362. field of the page header. The ASCII string can be from 0 to 9
  1363. characters long.
  1364. CONTROL: $DATE(date)
  1365. ABBREV: $DA(date)
  1366. TYPE: Primary
  1367. DEFAULT: No date in page header
  1368. EXAMPLES: $DATE(1-JUL-84)
  1369. $DA(7/22/84)
  1370. 6-1
  1371. $DEBUG(file)
  1372. $NODEBUG
  1373. These controls determine whether or not a MetaLink Absolute
  1374. Object Module format file is created. The MetaLink Absolute
  1375. Object Module format file is used in conjunction with
  1376. MetaLink's MetaICE series of in-circuit-emulators. Among
  1377. other advantages, it provides powerful symbolic debug
  1378. capability in the emulator debug environment. $NODEBUG
  1379. specifies that a MetaLink Absolute Object Module file will not
  1380. be created. $DEBUG specifies that a MetaLink Absolute Object
  1381. Module file will be created. The $DEBUG control allows any
  1382. legal file name to be specified as the MetaLink Absolute
  1383. Object Module filename. If no filename is specified, a
  1384. default name is used. The default name used for the file is
  1385. the source file name root with a .DBG extension. If the
  1386. $DEBUG control is used, both a MetaLink Absolute Object Module
  1387. file and a standard Intel Hexadecimal format object file can
  1388. be generated at the same time. Refer to the $OBJECT control
  1389. description later in this chapter for information on
  1390. controlling the Hexadecimal format object file output.
  1391. CONTROL: $DEBUG(file)
  1392. $NODEBUG
  1393. ABBREV: $DB(file)
  1394. $NODB
  1395. DEFAULT: $NODEBUG
  1396. TYPE: Primary
  1397. EXAMPLES: $DB(A:NEWNAME.ICE)
  1398. $DEBUG
  1399. $NOOBJECT
  1400. $EJECT
  1401. Places a form feed (ASCII 0CH) in the listing output. The
  1402. $NOPAGING control will override this control.
  1403. CONTROL: $EJECT
  1404. ABBREV: $EJ
  1405. DEFAULT: No form feeds in listing output
  1406. TYPE: General
  1407. EXAMPLES: $EJECT
  1408. $EJ
  1409. $INCLUDE(file)
  1410. Inserts a file in source program as part of the input source
  1411. program. The file field in this control can be any legal file
  1412. designator. No extension is assumed, so the whole file name
  1413. must be specified. Any number of files can be included in a
  1414. source program. Includes can be nested up to 8 level deep. It
  1415. is important to note that this control inserts files, it does
  1416. not chain or concatenate files.
  1417. CONTROL: $INCLUDE(file)
  1418. ABBREV: $IC(file)
  1419. DEFAULT: No file included in source program
  1420. TYPE: General
  1421. EXAMPLES: $INCLUDE(B:COMMON.EQU
  1422. $IC(TABLES.ASM) ;Uses default drive
  1423. 6-2
  1424. $LIST
  1425. $NOLIST
  1426. These controls determine whether or not the source program
  1427. listing is output or not. $LIST will allow the source program
  1428. listing to be output. $NOLIST stops the source program
  1429. listing from being output. The $NOPRINT control overrides the
  1430. $LIST control.
  1431. CONTROL: $LIST
  1432. $NOLIST
  1433. ABBREV: $LI
  1434. $NOLI
  1435. DEFAULT: $LIST
  1436. TYPE: General
  1437. EXAMPLES: $NOLIST ;This will cause the included
  1438. $INCLUDE(COMMON.TBL) ;file not to be listed
  1439. $LI ;Listing continues
  1440. $MOD51
  1441. $MOD52
  1442. $MOD44
  1443. $MOD515
  1444. $MOD512
  1445. $MOD517
  1446. $MOD152
  1447. $MOD451
  1448. $MOD452
  1449. $MOD751
  1450. $MOD752
  1451. $MOD154
  1452. $MOD252
  1453. $MOD521
  1454. $MOD552
  1455. $MOD652
  1456. $MOD851
  1457. $NOMOD
  1458. Recognizes predefined special function register symbols in the
  1459. source program. This saves the user from having to define all
  1460. the registers in the source program. Appendix B lists the
  1461. symbols that are defined by these controls. $NOMOD disables
  1462. the recognizing function. These controls access a files of
  1463. the same name that are included with the MetaLink 8051 CROSS
  1464. ASSEMBLER distribution diskette. When a $MOD control is used
  1465. in a source program, it is important that the $MOD file be
  1466. available to the Cross Assembler. The Cross Assembler first
  1467. looks for the $MOD file on the default drive, if it isn't
  1468. found there, the Cross Assembler looks for it on the A: drive.
  1469. The components supported by each switch are:
  1470. $MOD51: 8051, 8751, 8031, 80C51, 80C31, 87C51, 9761, 8053
  1471. $MOD52: 8052, 8032, 8752
  1472. $MOD44: 8044, 8344, 8744
  1473. $MOD515: 80515, 80535, 80C515, 80C535
  1474. $MOD512: 80512, 80532
  1475. $MOD517: 80C517, 80C537
  1476. 6-3
  1477. $MOD152: 80C152, 83C152, 80C157
  1478. $MOD451: 80C451. 83C451, 87C451
  1479. $MOD452: 80C452, 83C452, 87C452
  1480. $MOD752: 83C752, 87C752
  1481. $MOD751: 83C751, 87C751
  1482. $MOD154: 83C514, 80C154, 85C154
  1483. $MOD252: 80C252, 83C252, 87C252, 80C51FA, 83C51FA, 87C51FA,
  1484. 83C51FB, 87C51FB
  1485. $MOD521: 80C521, 80C321, 87C521, 80C541, 87C541
  1486. $MOD552: 80C552, 83C552, 87C552
  1487. $MOD652: 80C652, 83C652
  1488. $MOD851: 80C851, 83C851
  1489. CONTROL: $MOD51
  1490. $MOD52
  1491. $MOD44
  1492. $MOD152
  1493. $MOD515
  1494. $MOD512
  1495. $MOD451
  1496. $MOD452
  1497. $MOD751
  1498. $MOD752
  1499. $MOD154
  1500. $MOD252
  1501. $MOD521
  1502. $MOD552
  1503. $MOD652
  1504. $MOD517
  1505. $MOD851
  1506. $NOMOD
  1507. ABBREV:
  1508. DEFAULT: $NOMOD
  1509. TYPE: Primary
  1510. EXAMPLES: $MOD51
  1511. $MOD52
  1512. $MOD44
  1513. $MOD515
  1514. $MOD512
  1515. $MOD152
  1516. $MOD451
  1517. $MOD452
  1518. $MOD751
  1519. $MOD752
  1520. $MOD154
  1521. $MOD252
  1522. $MOD521
  1523. $MOD552
  1524. $MOD652
  1525. $MOD517
  1526. $MOD851
  1527. $NOMOD
  1528. $OBJECT(file)
  1529. $NOOBJECT
  1530. 6-4
  1531. These controls determine whether or not a standard Intel
  1532. Hexadecimal format object file is created. $NOOBJECT
  1533. specifies that an object file will not be created. $OBJECT
  1534. specifies that an object file will be created. If other than
  1535. the default name is to be used for the object file, the
  1536. $OBJECT control allows any legal file name to be specified as
  1537. the object filename. The default name used for the object
  1538. file is the source file name root with a .HEX extension.
  1539. CONTROL: $OBJECT(file)
  1540. $NOOBJECT
  1541. ABBREV: $OJ(file)
  1542. $NOOJ
  1543. DEFAULT: $OBJECT(source.HEX)
  1544. TYPE: Primary
  1545. EXAMPLES: $OJ(A:NEWNAME.OBJ)
  1546. $NOOBJECT
  1547. $PAGING
  1548. $NOPAGING
  1549. These controls specify whether or not the output listing will
  1550. be broken into pages or will be output as one continuous
  1551. listing. When the $NOPAGING control is used, the $EJECT and
  1552. $PAGELENGTH controls are ignored. With the $PAGING control, a
  1553. form feed and header line is inserted into the output listing
  1554. whenever an $EJECT control is met, or whenever the number of
  1555. lines output on the current page exceeds the value specified
  1556. by the $PAGELENGTH control. The header line contains source
  1557. file name, title (if $TITLE control was used), date (if $DATE
  1558. control was used) and page number.
  1559. CONTROL: $PAGING
  1560. $NOPAGING
  1561. ABBREV: $PI
  1562. $NOPI
  1563. DEFAULT: $PAGING
  1564. TYPE: Primary
  1565. EXAMPLES: $PAGING
  1566. $NOPI
  1567. $PAGELENGTH(n)
  1568. Sets the maximum number of lines, (n), on a page of the output
  1569. listing. If the maximum is exceeded, a form feed and page
  1570. header is inserted in the output listing. This control allows
  1571. the number of lines per page to be set anywhere between 10 and
  1572. 255. If the number of lines specified is less than 10,
  1573. pagelength will be set to 10. If the number of lines
  1574. specified is greater than 255, pagelength will be set to 255.
  1575. The $NOPAGING control will override this control.
  1576. CONTROL: $PAGELENGTH(n)
  1577. ABBREV: $PL(n)
  1578. DEFAULT: $PAGELENGTH(60)
  1579. TYPE: Primary
  1580. EXAMPLES: $PAGELENGTH(48)
  1581. 6-5
  1582. $PL(58)
  1583. $PAGEWIDTH(n)
  1584. Sets the maximum number of characters, (n), on a line of the
  1585. output listing. This control allows the number of characters
  1586. per line to be set anywhere between 72 and 132. If the number
  1587. specified is less than 72, the pagewidth is set at 72. If the
  1588. number specified is greater than 132, the pagewidth is set at
  1589. 132. If the pagewidth is specified between 72 and 100 and the
  1590. line being output exceeds the pagewidth specification, the
  1591. line is truncated at the specified pagewidth and a carriage
  1592. return/line feed pair is inserted in the listing. If the
  1593. pagewidth is specified to be greater than 100 and the line
  1594. being output exceed the pagewidth specification, a carriage
  1595. return/line feed pair is inserted at the specified pagewidth
  1596. and the line will continue to be listed on the next line
  1597. beginning at column 80.
  1598. CONTROL: $PAGEWIDTH(n)
  1599. ABBREV: $PW(n)
  1600. DEFAULT $PAGEWIDTH(72)
  1601. TYPE: Primary
  1602. EXAMPLES: $PAGEWIDTH(132)
  1603. $PW(80)
  1604. $PRINT(file)
  1605. $NOPRINT
  1606. These controls determine whether or not a listing file is
  1607. created. $NOPRINT specifies that a listing file will not be
  1608. created. $PRINT specifies that an listing file will be
  1609. created. If other than the default name is to be used for the
  1610. listing file, the $PRINT control allows any legal file name to
  1611. be specified as the listing filename. The default name used
  1612. for the listing file is the source file name root with a .LST
  1613. extension.
  1614. CONTROL: $PRINT(file)
  1615. $NOPRINT
  1616. ABBREV: $PR
  1617. $NOPR
  1618. DEFAULT: $PRINT(source.LST)
  1619. TYPE: Primary
  1620. EXAMPLES: $PRINT(A:CONTROL.OUT)
  1621. $NOPR
  1622. $SYMBOLS
  1623. $NOSYMBOLS
  1624. Selects whether or not the symbol table is appended to the
  1625. listing output. $SYMBOLS causes the symbol table to be sorted
  1626. alphabetically by symbol, formatted and output to the listing
  1627. file. Along with the symbol name, its value and type are
  1628. output. Values are output in hexadecimal. Types include NUMB
  1629. 6-6
  1630. (number), ADDR (address), REG (register symbol) and ACC
  1631. (accumulator symbol). If a symbol was of type ADDR, it
  1632. segment is also output as either C (code), D (data) or X
  1633. (external). Other information listed with the symbols is NOT
  1634. USED (symbol defined but never referenced), UNDEFINED (symbol
  1635. referenced but never defined) and REDEFINEABLE (symbol defined
  1636. using the SET directive). The type and value listed for a
  1637. REDEFINABLE symbol is that of its last definition in the
  1638. source program. $NOSYMBOLS does not output the symbol table.
  1639. CONTROL: $SYMBOLS
  1640. $NOSYMBOLS
  1641. ABBREV: $SB
  1642. $NOSB
  1643. DEFAULT: $SYMBOLS
  1644. TYPE: Primary
  1645. EXAMPLES: $SB
  1646. $NOSYMBOLS
  1647. $TITLE(string)
  1648. Places the ASCII string enclosed by the parenthesis in the
  1649. title field of the page header. The ASCII string can be from
  1650. 0 to 64 characters long. If the string is greater than 64
  1651. characters or if the width of the page will not support such a
  1652. long title, the title will be truncated. If parentheses are
  1653. part of the string, they must be balanced.
  1654. CONTROL: $TITLE(string)
  1655. ABBREV: $TT(string)
  1656. DEFAULT: No title in page header
  1657. TYPE: Primary
  1658. EXAMPLES: $TITLE(SAMPLE PROGRAM V1.2)
  1659. $TT(METALINK (TM) CROSS ASSEMBLER)
  1660. 6-7
  1661. CHAPTER 7
  1662. 8051 CROSS ASSEMBLER MACRO PROCESSOR
  1663. 7.1. Introduction
  1664. Macros are useful for code that is used repetitively throughout
  1665. the program. It saves the programmer the time and tedium of
  1666. having to specify the code every time it is used. The code is
  1667. written only once in the macro definition and it can be used
  1668. anywhere in the source program any number of times by simply
  1669. using the macro name.
  1670. Sometimes there is confusion between macros and subroutines.
  1671. Subroutines are common routines that are written once by the
  1672. programmer and then accessed by CALLing them. Subroutines are
  1673. usually used for longer and more complex routines where the
  1674. call/return overhead can be tolerated. Macros are commonly used
  1675. for simpler routines or where the speed of in-line code is
  1676. required.
  1677. 7.2. Macro Definition
  1678. Before a macro can be used, it first must be defined. The macro
  1679. definition specifies a template that is inserted into the source
  1680. program whenever the macro name is encountered. Macro
  1681. definitions can not be nested, but once a macro is defined, it
  1682. can be used in other macro definitions. Macros used this way can
  1683. be nested up to nine levels deep.
  1684. The macro definition has three parts to it: 1) the macro header
  1685. which specifies the macro name and its parameter list, 2) the
  1686. macro body which is the part that is actually inserted into the
  1687. source program, and 3) the macro terminator.
  1688. The macro header has the following form:
  1689. name MACRO <parameter list>
  1690. The name field contains a unique symbol that it used to identify
  1691. the macro. Whenever that symbol is encountered in the source
  1692. program, the Cross Assembler will automatically insert the macro
  1693. body in the source program at that point. The name must be a
  1694. unique symbol that follows all the rules of symbol formation as
  1695. outlined in Chapter 2.
  1696. The MACRO field of the macro header contains the keyword MACRO.
  1697. This is used to notify the Cross Assembler that this is the
  1698. beginning of a macro definition.
  1699. 7-1
  1700. The <parameter list> field of the macro header lists anywhere
  1701. from zero to 16 parameters that are used in the macro body and
  1702. are defined at assembly time. The symbols used in the parameter
  1703. list are only used by the Cross Assembler during the storing of
  1704. the macro definition. As a result, while symbols used in the
  1705. parameter list must be unique symbols that follow all the the
  1706. rules of symbol formation as outlined in Chapter 2, they can be
  1707. reissued in the parameter list of another macro definition
  1708. without conflict. Parameter list items are separated from one
  1709. another by a comma. The following are examples of macro
  1710. definition headers:
  1711. MULT_BY_16 MACRO (no parameters)
  1712. DIRECT_ADD MACRO DESTINATION,SOURCE (two parameters)
  1713. The macro body contains the template that will replace the macro
  1714. name in the source program. The macro body can contain
  1715. instructions, directives, conditional assembly statements or
  1716. controls. As a matter of fact, the macro body can contain any
  1717. legal Cross Assembler construct as defined in Chapters 2, 4, 5
  1718. and 6.
  1719. There are two macro definition terminators: ENDM and EXITM.
  1720. Every macro definition must have an ENDM at the end of its
  1721. definition to notify the Cross Assembler that the macro
  1722. definition is complete. The EXITM terminator is an alternative
  1723. ending of the macro that is useful with conditional assembly
  1724. statements. When a EXITM is encountered in a program, all
  1725. remaining statements (to the ENDM) are ignored.
  1726. The following is an example of a macro definition that multiplies
  1727. the Accumulator by 16:
  1728. MULT_BY_16 MACRO
  1729. RL A ;* 2
  1730. RL A ;* 4
  1731. RL A ;* 8
  1732. RL A ;* 16
  1733. ENDM
  1734. The following is an example of a macro that adds two numbers
  1735. together. This could be used by the programmer to do direct
  1736. memory to memory adds of external variables (create a virtual
  1737. instruction).
  1738. DIRECT_ADDX MACRO DESTINATION,SOURCE (two parameters)
  1739. MOV R0,#SOURCE
  1740. MOVX A,@R0
  1741. MOV R1,A
  1742. MOV R0,#DESTINATION
  1743. MOVX A,@R0
  1744. ADD A,R1
  1745. MOVX @R0,A
  1746. ENDM
  1747. 7-2
  1748. A final macro definition example shows the use of the EXITM
  1749. macro terminator. If CMOS is non-zero, the MOV and only the MOV
  1750. instruction will be translated by the Cross Assembler.
  1751. IDLE MACRO
  1752. IF (CMOS)
  1753. MOV PCON,#IDL
  1754. EXITM
  1755. ENDIF
  1756. JMP $
  1757. ENDM
  1758. 7-3
  1759. 7.3. Special Macro Operators
  1760. There are four special macro operators that are defined below:
  1761. % when the PERCENT sign prefaces a symbol in the
  1762. parameter list, the symbol's value is passed to
  1763. the macro's body instead of the symbol itself.
  1764. ! when the EXCLAMATION POINT precedes a character,
  1765. that character is handled as a literal and is
  1766. passed to the macro body with the EXCLAMATION
  1767. POINT removed. This is useful when it is
  1768. necessary to pass a delimiter to the macro body.
  1769. For example, in the following parameter list, the
  1770. second parameter passed to the macro body would be
  1771. a COMMA ( , ):
  1772. GENERATE_INST 75,!,,STK_VALUE
  1773. & when the AMPERSAND is used in the macro body, the
  1774. symbols on both sides of it are concatenated
  1775. together and the AMPERSAND is removed.
  1776. ;; when double SEMI-COLONS are used in a macro
  1777. definition, the comment preceded by the double
  1778. SEMI_COLONS will not be saved and thus will not
  1779. appear in the listing whenever the macro is
  1780. invoked. Using the double SEMI-COLONS lowers the
  1781. memory requirement in storing the macro
  1782. definitions and should be used whenever possible.
  1783. Examples of using the above special macro operators follow in the
  1784. "Using Macros" section.
  1785. 7.4. Using Macros
  1786. This section section discusses several situations that arise
  1787. using macros and how to handle them. In general the discussion
  1788. uses examples to get the point across. First the macro
  1789. definition is listed, then the source line program that will
  1790. invoke the macro and finally how the macro was expanded by the
  1791. Cross Assembler.
  1792. 7.4.1. NESTING MACROS
  1793. The following shows a macro nested to a depth of three.
  1794. Remember, definitions cannot be nested. Macros must be defined
  1795. before they are used in other macro definitions.
  1796. ;MACRO DEFINITIONS
  1797. GET_EXT_BYTE MACRO EXT_ADDR
  1798. MOV R0,#EXT_ADDR
  1799. MOVX A,@R0
  1800. ENDM
  1801. 7-4
  1802. ADD_EXT_BYTES MACRO EXT_DEST,EXT_SRC
  1803. GET_EXT_BYTE EXT_DEST
  1804. MOV R1,A
  1805. GET_EXT_BYTE EXT_SRC
  1806. ADD A,R1
  1807. ENDM
  1808. ADD_DIRECT_BYTES MACRO DESTINATION,SOURCE
  1809. IF (SMALL_MODEL)
  1810. MOV A,SOURCE
  1811. ADD A,DESTINATION
  1812. MOV DESTINATION
  1813. ELSE
  1814. ADD_EXT_BYTES DESTINATION,SOURCE
  1815. MOVX @R0,A
  1816. ENDIF
  1817. ENDM
  1818. ;USAGE IN PROGRAM
  1819. ADD_DIRECT_BYTES 127,128
  1820. ;TRANSLATED MACRO
  1821. 30 +1 ADD_DIRECT_BYTES 127,128
  1822. 31 +1 IF (SMALL_MODEL)
  1823. 32 +1 MOV A,128
  1824. 33 +1 ADD A,127
  1825. 34 +1 MOV 127
  1826. 35 +1 ELSE
  1827. 36 +2 ADD_EXT_BYTES 127,128
  1828. 37 +3 GET_EXT_BYTE 127
  1829. 0100 787F 38 +3 MOV R0,#127
  1830. 0102 E2 39 +3 MOVX A,@R0
  1831. 0103 F9 40 +2 MOV R1,A
  1832. 41 +3 GET_EXT_BYTE 128
  1833. 0104 7880 42 +3 MOV R0,#128
  1834. 0106 E2 43 +3 MOVX A,@R0
  1835. 0107 29 44 +2 ADD A,R1
  1836. 0108 F2 45 +1 MOVX @R0,A
  1837. 46 +1 ENDIF
  1838. 48
  1839. Two things should be pointed out from the above example. First,
  1840. the order of the parameter list is important. You must maintain
  1841. the the order of parameters from the macro definition if the
  1842. Cross Assembler is to translate the macro correctly.
  1843. Secondly, in order to pass parameters to nested macros, simply
  1844. use the same parameter symbol in the parameter list of the
  1845. definition. For example, the parameter DESTINATION was passed
  1846. properly to the nested macros ADD_EXT_BYTES and GET_EXT_BYTE.
  1847. This occurred because in the macro definition of
  1848. ADD_DIRECT_BYTES, the parameter DESTINATION was specified in the
  1849. 7-5
  1850. parameter lists of both ADD_EXT_BYTES and GET_EXT_BYTE.
  1851. 7.4.2. LABELS IN MACROS
  1852. You have two choices for specifying labels in a macro body. A
  1853. label can either be passed to the body as a parameter or it can
  1854. be generated within the body. The following example shows both
  1855. ways.
  1856. ;MACRO DEFINITION
  1857. MULTIPLE_SHIFT MACRO LABEL,LABEL_SUFFIX,COUNTER,N
  1858. COUNTER SET COUNTER+1 ;INCREMENT SUFFIX FOR NEXT
  1859. USAGE
  1860. LABEL: MOV R0,#N
  1861. SHIFT&LABEL_SUFFIX: RL A
  1862. DJNZ R0,SHIFT&LABEL_SUFFIX
  1863. ENDM
  1864. ;USAGE IN PROGRAM
  1865. MULTIPLE_SHIFT LOOP_SHIFT,%COUNT,COUNT,4
  1866. ;TRANSLATED MACRO
  1867. 15 +1 MULTIPLE_SHIFT LOOP_SHIFT,%COUNT,COUNT,4
  1868. 0006 16 +1 COUNT SET COUNT+1
  1869. 17 +1
  1870. 0100 7804 18 +1 LOOP_SHIFT: MOV R0,#4
  1871. 0102 23 19 +1 SHIFT5: RL A
  1872. 0103 D8FD 20 +1 DJNZ R0,SHIFT5
  1873. 22
  1874. Points to note in the above example: 1) the double semi-colon
  1875. caused the comment not to be listed in the translated macro; 2)
  1876. the percent sign caused the value of COUNT (in this case the
  1877. value 5) to be passed to the macro body instead of the symbol;
  1878. and 3) the ampersand allowed two symbols to be concatenated to
  1879. form the label SHIFT5.
  1880. 7-6
  1881. CHAPTER 8
  1882. 8051 CROSS ASSEMBLER ERROR CODES
  1883. 8.1. Introduction
  1884. When the Cross Assembler encounters an error in the source
  1885. program, it will emit an error message in the listing file. If
  1886. the $NOPRINT control has been invoked, the error message will be
  1887. output to the screen.
  1888. There are basically two types of errors that are encountered by
  1889. the Cross Assembler, translation errors and I/O errors. I/O
  1890. errors are usually fatal errors. However, whenever an error is
  1891. detected, the Cross Assembler makes every effort possible to
  1892. continue with the assembly.
  1893. If it is possible to recover from the error and continue
  1894. assembling, the Cross Assembler will report the error, use a
  1895. default condition and continue on its way. However, when a fatal
  1896. error is encountered, it is impossible for the Cross Assembler to
  1897. proceed. In this case, the Cross Assembler reports the error and
  1898. then aborts the assembly process.
  1899. Fatal I/O error messages are displayed on the screen and are of
  1900. the form:
  1901. FATAL ERROR opening <filename>
  1902. where <filename> would be replaced with the file designator
  1903. initially entered or read from the source program. The cause of
  1904. this error is usually obvious, typically a typographical error or
  1905. the wrong drive specification.
  1906. Another fatal I/O error message is:
  1907. FATAL ERROR writing to <type> file
  1908. where <type> would be replaced with either "listing" or "object".
  1909. The cause of this error is usually either a write protected disk
  1910. or a full disk.
  1911. Translation error reports contain at least three lines. The
  1912. first line is the source line in which the error was detected,
  1913. the second line is a pointer to the character, symbol, expression
  1914. or line that caused the error. The final line is the error
  1915. message itself. There may be more than one error message,
  1916. depending on the number of errors in the source line. An example
  1917. of a source line with two errors in it follows:
  1918. 0100 2323 26 START: MOV AB,@35
  1919. 8-1
  1920. ****----------------------------------------^---^
  1921. ****ERROR #20: Illegal operand
  1922. ****ERROR #20: Illegal operand
  1923. The errors are pointed out by the up-arrows ( ^ ). For every up-
  1924. arrow there will be an error message. Errors are ordered left to
  1925. right, so the first error message corresponds to the left-most
  1926. up-arrow and so on. The error message includes an error number
  1927. and an description of the error. The error number can be used as
  1928. an index to the more detailed error explanations that follow in
  1929. this chapter.
  1930. After the Cross Assembler has completed its translation process,
  1931. it will print an assembly complete message:
  1932. ASSEMBLY COMPLETE, nn ERRORS FOUND
  1933. If it was an error free assembly, in place of the "nn" above the
  1934. word "NO" will be output. However, if errors were encountered
  1935. during the assembly process, the "nn" will be replaced with the
  1936. number of errors that were found (up to a maximum of 50). In this
  1937. case, an error summary will follow in the listing file with all
  1938. the errors that were reported during the assembly. An error
  1939. summary looks like the following:
  1940. ERROR SUMMARY:
  1941. Line #26, ERROR #20: Illegal operand
  1942. Line #26, ERROR #20: Illegal operand
  1943. The same error message that occurred after the source line
  1944. appears again prefaced by the source line number to aid in
  1945. tracking down the error in the source listing.
  1946. 8.2. Explanation of Error Messages
  1947. ERROR #1: Illegal character
  1948. This error occurs when the Cross Assembler encounters a
  1949. character that is not part of its legal character set. The
  1950. Cross Assembler character set can be found in Appendix D.
  1951. ERROR #2: Undefined symbol
  1952. This error occurs when the Cross Assembler tries to use a
  1953. symbol that hasn't been defined. The two most common reasons
  1954. for this error are typographical errors and forward
  1955. references.
  1956. ERROR #3: Duplicate symbol
  1957. This error occurs when a previously defined symbol or a
  1958. reserved symbol is attempted to be defined again. Refer to
  1959. Appendix C for the reserved words. Also inspect the symbol in
  1960. the symbol table listing. If the symbol doesn't appear there,
  1961. you are using a reserved word. If the symbol does appear, its
  1962. original definition will be listed.
  1963. ERROR #4: Illegal digit for radix
  1964. A digit was encountered that is not part of the legal digits
  1965. 8-2
  1966. for the radix specified. Chapter 2 lists the legal digits for
  1967. each radix available. Often this error occurs because a
  1968. symbol was started with a number instead of a letter, question
  1969. mark, or underscore.
  1970. ERROR #5: Number too large
  1971. The number specified, or the returned value of the expression,
  1972. exceeds 16-bit precision. The largest value allowed is
  1973. 65,535.
  1974. ERROR #6: Missing END directive
  1975. The source program must end with one and only one END
  1976. directive. The END is placed after all the assembly line
  1977. statements.
  1978. ERROR #7: Illegal opcode/directive after label
  1979. The symbol after a label is not an opcode nor a directive that
  1980. allows labels. The only thing permitted on a line after a
  1981. label is an instruction, the DS, DB or DW directives, or a
  1982. comment. If none of these are found, this error will be
  1983. reported.
  1984. ERROR #8: Illegal assembly line
  1985. The assembly line doesn't begin with a symbol, label,
  1986. instruction mnemonic, control, directive, comment or null
  1987. line. No attempt is made to translate such a line.
  1988. ERROR #9: Text beyond END directive
  1989. The END directive must be the last line of the source program.
  1990. Any text beyond the END line will cause this error. Any such
  1991. text is ignore. Text here is defined as any printable ASCII
  1992. characters.
  1993. ERROR #10: Illegal or missing expression
  1994. A number, symbol or arithmetic expression was expected, but it
  1995. was either found to be missing or the Cross Assembler was
  1996. unable to evaluate it properly.
  1997. ERROR #11: Illegal or missing expression operator
  1998. An arithmetic operator was expected but it is either missing
  1999. or it is not one of the legal operators specified in Chapter
  2000. 2.
  2001. ERROR #12: Unbalanced parentheses
  2002. In evaluating an expression, the parentheses in the expression
  2003. were found not to balance.
  2004. ERROR #13: Illegal or missing expression value
  2005. In evaluating an expression, the Cross Assembler expected to
  2006. find either a number or a symbol, but it was either missing or
  2007. illegal.
  2008. ERROR #14: Illegal literal expression
  2009. This error occurs when a null ASCII literal string is found.
  2010. A null ASCII literal is nothing more than two apostrophes
  2011. together ( '' ) and is illegal.
  2012. 8-3
  2013. ERROR #15: Expression stack overflow
  2014. The expression stack has a depth of 32 values. The expression
  2015. being evaluated exceeds this depth. This is a very rare
  2016. error. However, if you ever get it, divide the expression
  2017. into two or more expressions using the EQU directive.
  2018. ERROR #16: Division by zero
  2019. The expression being evaluated includes an attempt to divide
  2020. by zero.
  2021. ERROR #17: Illegal bit designator
  2022. A bit designator address was specified in the source program
  2023. and it points to an illegal bit address. A bit designator
  2024. contains a byte address, followed by a PERIOD, followed by the
  2025. bit index into the byte address (e.g., ACC.7) as discussed in
  2026. Chapter 2. This error can occur for one of two reasons.
  2027. First, if the number or a symbol that is used to specify the
  2028. byte address part of the bit designator is not a legal bit
  2029. addressable address, ERROR #17 will occur. Second, if the bit
  2030. index into the byte address exceeds the number 7, again ERROR
  2031. #17 will be output.
  2032. ERROR #18: Target address exceeds relative address range
  2033. A Program Counter relative jump instruction (e.g., SJMP, JZ,
  2034. JNC, etc.) was decoded with the target address of the jump
  2035. exceeding the maximum possible forward jump of 127 bytes or
  2036. the maximum possible backward jump of 128 bytes.
  2037. ERROR #20: Illegal operand
  2038. The operand specified is not a legal operand for the
  2039. instruction. Review the legal operands allowed for the
  2040. instruction.
  2041. ERROR #21: Illegal indirect register
  2042. R0 and R1 are the only primary legal indirect register. This
  2043. error occurs when the indirect addressing mode designator (@)
  2044. is not followed by either R0, R1 or symbols that were defined
  2045. to be equivalent to either R0 or R1. This error can also
  2046. occur in the MOVC A,@A+DPTR, MOVC A,@A+PC, MOVX A,@DPTR, MOVX
  2047. @DPTR,A and the JMP @A+DPTR instructions if the operands after
  2048. the indirect addressing mode designator ( @ ) aren't specified
  2049. properly.
  2050. ERROR #22: Missing operand delimiter
  2051. A COMMA operand delimiter is missing from the operand fields
  2052. of the instruction.
  2053. ERROR #23: Illegal or missing directive
  2054. This error occurs when the Cross Assembler cannot find a legal
  2055. directive. The most common cause of this error is due to
  2056. leaving the COLON off a label. As a result, the following
  2057. opcode mnemonic is attempted to be decoded as a directive.
  2058. ERROR #24: Attempting to EQUate a previously SET symbol
  2059. Once a symbol is defined using the SET directive, it cannot be
  2060. 8-4
  2061. later redefined using the EQU directive.
  2062. ERROR #25: Attempting to SET a previously EQUated symbol
  2063. Once a symbol is defined using the EQU directive, it cannot be
  2064. redefined. If you want the symbol to be redefineable, use the
  2065. SET directive.
  2066. ERROR #26: Illegal SET/EQU expression
  2067. The expression following the SET or EQU directive is illegal.
  2068. This typically occurs when an attempt is made to define a
  2069. symbol to be equivalent to an implicit register other than A,
  2070. R0, R1, R2, R3, R4, R5, R6 or R7.
  2071. ERROR #27: Illegal expression with forward reference
  2072. This error occurs when an expression contains a symbol that
  2073. hasn't been defined yet. Move the symbol definition earlier
  2074. in the source file.
  2075. ERROR #28: Address exceeds segment range
  2076. The address specified exceeds 255 and you are in the DSEG,
  2077. BSEG, or ISEG.
  2078. ERROR #29: Expecting an EOL or COMMENT
  2079. The Cross Assembler has completed processing a legal assembly
  2080. language line and expected the line to be terminated with
  2081. either a COMMENT or a carriage return/line feed pair.
  2082. ERROR #30: Illegal directive with current active segment
  2083. The specified directive is not legal in the active segment.
  2084. This can happen by trying to use the DBIT directive in other
  2085. than the BSEG, or using the DS directive in the BSEG.
  2086. ERROR #31: Only two character string allowed
  2087. This error occurs using the DW directive. The maximum ASCII
  2088. literal allowed in a DW specification is a two character
  2089. string.
  2090. ERROR #32: Byte definition exceeds 255
  2091. This error occurs using the DB directive. The value specified
  2092. in the DB specification cannot fit into a byte.
  2093. ERROR #33: Premature end of string
  2094. An ASCII literal string was not terminated properly with an
  2095. apostrophe.
  2096. ERROR #34: Illegal register bank number
  2097. This error occurs when the number specified with the USING
  2098. directive exceed 3. Legal register bank numbers are: 0, 1, 2,
  2099. 3.
  2100. ERROR #35: Include file nesting exceeds 8
  2101. The maximum number of nested include files is eight. You will
  2102. get this error if you exceed this limit.
  2103. ERROR #36: Illegal or missing argument
  2104. This error occurs when the syntax of a Cross Assembler control
  2105. 8-5
  2106. requires an argument and it was either incorrectly specified
  2107. or is missing all together.
  2108. ERROR #37: Illegal control statement
  2109. The Cross Assembler does not recognize the specified control.
  2110. The legal controls are detailed in Chapter 6.
  2111. ERROR #38: Unable to open file
  2112. The Cross Assembler is unable to open the file as specified.
  2113. This is a fatal error which will abort the assembly process.
  2114. ERROR #39: Illegal file specification
  2115. The file specification is not a legal file designator. Refer
  2116. to your DOS manual for a description of legal file
  2117. designators. This is a fatal error which will abort the
  2118. assembly process.
  2119. ERROR #40: Program synchronization error
  2120. This error occurs when the Cross Assembler is generating the
  2121. object hex file and finds that the code segment location
  2122. counter is not advancing properly. There are two cases where
  2123. this can happen. First, if the source program uses ORG
  2124. directives and they are not placed in ascending order. Second,
  2125. if a generic CALL or JMP is made to a forward reference that
  2126. is actually defined later in the program to be a backward
  2127. reference. For example, the following code sequence will cause
  2128. this error due to the second reason:
  2129. BACK_REF: NOP
  2130. CALL FORWARD_REF
  2131. FORWARD_REF EQU BACK_REF
  2132. During the first pass, the generic CALL will be replaced with
  2133. a 3-byte LCALL instruction. During the second pass, the
  2134. generic CALL will be replaced with a 2-byte ACALL instruction.
  2135. To prevent this kind of problem, use the generic CALLs and
  2136. JMPs with labeled targets, not EQU or SET defined symbols.
  2137. ERROR #41: Insufficient memory
  2138. This error occurs when there isn't enough memory to hold all
  2139. the symbols that have been generated by the source program.
  2140. If you have 96 Kbytes or more of RAM this will be a very rare
  2141. error. Only a massive source program or numerous large macros
  2142. could potentially cause this error. However, if this error
  2143. does occur, your best bet is to either buy more memory or to
  2144. break up your program into smaller pieces and share common
  2145. symbols with a common $INCLUDE file.
  2146. ERROR #42: More errors detected, not listed
  2147. The internal error buffer can hold 50 errors. If more than 50
  2148. errors occur, only the first 50 will be reported.
  2149. ERROR #43: ENDIF without IF
  2150. The terminator of a conditional assembly block (ENDIF) was
  2151. recognized without seeing a matching IF.
  2152. 8-6
  2153. ERROR #44: Missing ENDIF
  2154. A conditional assembly block was begun with an IF statement,
  2155. but no matching ENDIF was detected.
  2156. ERROR #45: Illegal or missing macro name
  2157. The MACRO keyword was recognized, but the symbol that is
  2158. supposed to precede the MACRO keyword was missing, an illegal
  2159. symbol or a duplicate symbol.
  2160. ERROR #46: Macro nesting too deep
  2161. Macros can be nested to a depth of 9 levels. Exceeding this
  2162. limit will cause this error.
  2163. ERROR #47: Number of parameters doesn't match definition
  2164. In attempting to use a macro, the number of parameters in the
  2165. parameter list does not equal the number of parameters
  2166. specified in the macro definition. They must match.
  2167. ERROR #48: Illegal parameter specification
  2168. This error typically occurs when a previously defined symbol
  2169. is used in the parameter list of the macro definition.
  2170. ERROR #49: Too many parameters
  2171. The maximum number of parameters in a macro parameter list is
  2172. sixteen. This error occurs when you exceed that limit.
  2173. ERROR #50: Line exceeds 255 characters
  2174. The maximum length of a source line is 255 characters. If a
  2175. carriage return/line feed pair is not detected in the first
  2176. 256 characters of a line, this error is reported and the line
  2177. is truncated at 255 characters.
  2178. 8-7
  2179. APPENDIX A
  2180. SAMPLE PROGRAM AND LISTING
  2181. A.1. Source File
  2182. ;
  2183. ; 8-bit by 8-bit signed multiply--byte signed multiply
  2184. ;
  2185. ; This routine takes the signed byte in multiplicand and
  2186. ; multiplies it by the signed byte in multiplier and places
  2187. ; the signed 16-bit product in product_high and product_low.
  2188. ;
  2189. ; This routine assumes 2s complement representation of signed
  2190. ; numbers. The maximum numbers possible are then -128 and
  2191. ; +127. Multiplying the possible maximum numbers together
  2192. ; easily fits into a 16-bit product, so no overflow test is
  2193. ; done on the answer.
  2194. ;
  2195. ; Registers altered by routine: A, B, PSW.
  2196. ;
  2197. ;
  2198. ; Primary controls
  2199. $MOD51
  2200. $TITLE(BYTE SIGNED MULTIPLY)
  2201. $DATE(JUL-30-84)
  2202. $PAGEWIDTH(132)
  2203. $OBJECT(B:BMULB.OBJ)
  2204. ;
  2205. ;
  2206. ; Variable declarations
  2207. ;
  2208. sign_flag BIT 0F0H ;sign of product
  2209. multiplier DATA 030H ;8-bit multiplier
  2210. multiplicand DATA 031H ;8-bit multiplicand
  2211. product_high DATA 032H ;high byte of 16-bit answer
  2212. product_low DATA 033H ;low byte of answer
  2213. ;
  2214. ;
  2215. ;
  2216. ORG 100H ;arbitrary start
  2217. ;
  2218. byte_signed_multiply:
  2219. CLR sign_flag ;reset sign
  2220. MOV A,multiplier ;put multiplier in accumulator
  2221. JNB ACC.7,positive ;test sign bit of multiplier
  2222. CPL A ;negative--complement and
  2223. INC A ;add 1 to convert to positive
  2224. SETB sign_flag ;and set sign flag
  2225. ;
  2226. A-1
  2227. positive: MOV B,multiplicand ;put multiplicand in B register
  2228. JNB B.7,multiply ;test sign bit of multiplicand
  2229. XRL B,#0FFh ;negative--complement and
  2230. INC B ;add 1 to convert to positive
  2231. CPL sign_flag ;complement sign flag
  2232. ;
  2233. multiply: MUL AB ;do unsigned multiplication
  2234. ;
  2235. sign_test: JNB sign_flag,byte_signed_exit ;if positive,done
  2236. XRL B,#0FFh ;else have to complement both
  2237. CPL A ;bytes of the product and inc
  2238. ADD A,#1 ;add here because inc doesn't
  2239. JNC byte_signed_exit ;set the carry flag
  2240. INC B ;if add overflowed A, inc the
  2241. ;high byte
  2242. byte_signed_exit:
  2243. MOV product_high,B ;save the answer
  2244. MOV product_low,A
  2245. ;
  2246. RET ;and return
  2247. END
  2248. A-2
  2249. A.2. Source File Listing
  2250. A-3
  2251. A-4
  2252. A-5
  2253. APPENDIX B
  2254. PRE-DEFINED BYTE AND BIT ADDRESSES
  2255. The following tables detail the pre-defined byte and bit addresses
  2256. for the 8051/8031 microcontrollers supported by the MetaLink family
  2257. of emulators. Proliferation parts are delimited from the standard
  2258. MCS-51 definitions by asterisk ("*") boxes.
  2259. This list covers these microcontrollers:
  2260. 8044 8031 8032 8051 8052 8053 80C154 80C321
  2261. 8344 80C31 80C32 8751 8752 8753 83C154 80C521
  2262. 8744 80C51 80C52 85C154 87C521
  2263. 87C51
  2264. 80C321 80C51FA(80C252) 80C452 80C152JA/JB/JC/JD 80C851
  2265. 80C541 83C51FA(83C252) 83C452 83C152JA/JC 83C851
  2266. 87C541 87C51FA(87C252) 87C452
  2267. 80C451 80C652 80C552 83C751 83C752 80512 80515 80C515 80C517
  2268. 83C451 83C652 83C552 87C751 87C752 80532 80535 80C535 80C537
  2269. 87C451 87C652 87C552
  2270. B.1. Pre-defined Byte Addresses
  2271. P0 DATA 080H ;PORT 0
  2272. SP DATA 081H ;STACK POINTER
  2273. DPL DATA 082H ;DATA POINTER - LOW BYTE
  2274. DPH DATA 083H ;DATA POINTER - HIGH BYTE
  2275. ************************************************************************
  2276. for the 80C321/80C521
  2277. DPL1 DATA 084H ;DATA POINTER LOW 1
  2278. DPH1 DATA 085H ;DATA POINTER HIGH 1
  2279. DPS DATA 086H ;DATA POINTER SELECTION
  2280. ************************************************************************
  2281. ************************************************************************
  2282. for the 83C152/80C152
  2283. GMOD DATA 084H ;GSC MODE
  2284. TFIFO DATA 085H ;GSC TRANSMIT BUFFER
  2285. ************************************************************************
  2286. ************************************************************************
  2287. for the 80C517/80C537
  2288. WDTREL DATA 086H ;WATCHDOG TIMER RELOAD REG
  2289. ************************************************************************
  2290. PCON DATA 087H ;POWER CONTROL
  2291. TCON DATA 088H ;TIMER CONTROL
  2292. TMOD DATA 089H ;TIMER MODE
  2293. TL0 DATA 08AH ;TIMER 0 - LOW BYTE
  2294. TL1 DATA 08BH ;TIMER 1 - LOW BYTE
  2295. B-1
  2296. ************************************************************************
  2297. for the 83C751/83C752
  2298. RTL DATA 08BH ;TIMER 0 - LOW BYTE RELOAD
  2299. ************************************************************************
  2300. TH0 DATA 08CH ;TIMER 0 - HIGH BYTE
  2301. TH1 DATA 08DH ;TIMER 1 - HIGH BYTE
  2302. ************************************************************************
  2303. for the 83C751/83C752
  2304. RTH DATA 08DH ;TIMER 0 - HIGH BYTE RELOAD
  2305. ************************************************************************
  2306. ************************************************************************
  2307. for the 83C752
  2308. PWM DATA 08EH ;PULSE WIDTH MODULATION
  2309. ************************************************************************
  2310. P1 DATA 090H ;PORT 1
  2311. ************************************************************************
  2312. for the 83C152/80C152
  2313. P5 DATA 091H ;PORT 5
  2314. DCON0 DATA 092H ;DMA CONTROL 0
  2315. DCON1 DATA 093H ;DMA CONTROL 1
  2316. BAUD DATA 094H ;GSC BAUD RATE
  2317. ADR0 DATA 095H ;GSC MATCH ADDRESS 0
  2318. ************************************************************************
  2319. ************************************************************************
  2320. for the 80C452/83C452
  2321. DCON0 DATA 092H ;DMA CONTROL 0
  2322. DCON1 DATA 093H ;DMA CONTROL 1
  2323. ************************************************************************
  2324. ************************************************************************
  2325. for the 80C517/80C537
  2326. DPSEL DATA 092H ;DATA POINTER SELECT REGISTER
  2327. ************************************************************************
  2328. SCON DATA 098H ;SERIAL PORT CONTROL
  2329. SBUF DATA 099H ;SERIAL PORT BUFFER
  2330. ************************************************************************
  2331. for the 83C751/83C752
  2332. I2CON DATA 098H ;I2C CONTROL
  2333. I2DAT DATA 099H ;I2C DATA
  2334. ************************************************************************
  2335. ************************************************************************
  2336. for the 80C517/80C537
  2337. IEN2 DATA 09AH ;INTERRUPT ENABLE REGISTER 2
  2338. S1CON DATA 09BH ;SERIAL PORT CONTROL 1
  2339. S1BUF DATA 09CH ;SERIAL PORT BUFFER 1
  2340. S1REL DATA 09DH ;SERIAL RELOAD REG 1
  2341. ************************************************************************
  2342. P2 DATA 0A0H ;PORT 2
  2343. IE DATA 0A8H ;INTERRUPT ENABLE
  2344. B-2
  2345. ************************************************************************
  2346. for the 80C51FA/83C51FA(83C252/80C252)
  2347. SADDR DATA 0A9H ;SLAVE INDIVIDUAL ADDRESS
  2348. ************************************************************************
  2349. ************************************************************************
  2350. for the 80515/80535 and 80C517/80C537
  2351. IP0 DATA 0A9H ;INTERRUPT PRIORITY REGISTER 0
  2352. ************************************************************************
  2353. ************************************************************************
  2354. for the 80C321/80C521
  2355. WDS DATA 0A9H ;WATCHDOG SELECTION
  2356. WDK DATA 0AAH ;WATCHDOG KEY
  2357. ************************************************************************
  2358. ************************************************************************
  2359. for the 83C152/80C152
  2360. P6 DATA 0A1H ;PORT 6
  2361. SARL0 DATA 0A2H ;DMA SOURCE ADDR. 0 (LOW)
  2362. SARH0 DATA 0A3H ;DMA SOURCE ADDR. 0 (HIGH)
  2363. IFS DATA 0A4H ;GSC INTERFRAME SPACING
  2364. ADR1 DATA 0A5H ;GSC MATCH ADDRESS 1
  2365. ************************************************************************
  2366. ************************************************************************
  2367. for the 80C452/83C452
  2368. SARL0 DATA 0A2H ;DMA SOURCE ADDR. 0 (LOW)
  2369. SARH0 DATA 0A3H ;DMA SOURCE ADDR. 0 (HIGH)
  2370. ************************************************************************
  2371. ************************************************************************
  2372. for the 80C552/83C552
  2373. CML0 DATA 0A9H ;COMPARE 0 - LOW BYTE
  2374. CML1 DATA 0AAH ;COMPARE 1 - LOW BYTE
  2375. CML2 DATA 0ABH ;COMPARE 2 - LOW BYTE
  2376. CTL0 DATA 0ACH ;CAPTURE 0 - LOW BYTE
  2377. CTL1 DATA 0ADH ;CAPTURE 1 - LOW BYTE
  2378. CTL2 DATA 0AEH ;CAPTURE 2 - LOW BYTE
  2379. CTL3 DATA 0AFH ;CAPTURE 3 - LOW BYTE
  2380. ************************************************************************
  2381. P3 DATA 0B0H ;PORT 3
  2382. ************************************************************************
  2383. for the 83C152/80C152
  2384. SARL1 DATA 0B2H ;DMA SOURCE ADDR. 1 (LOW)
  2385. SARH1 DATA 0B3H ;DMA SOURCE ADDR. 1 (HIGH)
  2386. SLOTTM DATA 0B4H ;GSC SLOT TIME
  2387. ADR2 DATA 0B5H ;GSC MATCH ADDRESS 2
  2388. ************************************************************************
  2389. ************************************************************************
  2390. for the 80C452/83C452
  2391. SARL1 DATA 0B2H ;DMA SOURCE ADDR. 1 (LOW)
  2392. SARH1 DATA 0B3H ;DMA SOURCE ADDR. 1 (HIGH)
  2393. ************************************************************************
  2394. IP DATA 0B8H ;INTERRUPT PRIORITY
  2395. ************************************************************************
  2396. for the 80C51FA/83C51FA(83C252/80C252)
  2397. B-3
  2398. SADEN DATA 0B9H ;SLAVE ADDRESS ENABLE
  2399. ************************************************************************
  2400. ************************************************************************
  2401. for the 80515/80535 and 80C517/80C537
  2402. IP1 DATA 0B9H ;INTERRUPT PRIORITY REGISTER 1
  2403. IRCON DATA 0C0H ;INTERRUPT REQUEST CONTROL
  2404. CCEN DATA 0C1H ;COMPARE/CAPTURE ENABLE
  2405. CCL1 DATA 0C2H ;COMPARE/CAPTURE REGISTER 1 - LOW BYTE
  2406. CCH1 DATA 0C3H ;COMPARE/CAPTURE REGISTER 1 - HIGH BYTE
  2407. CCL2 DATA 0C4H ;COMPARE/CAPTURE REGISTER 2 - LOW BYTE
  2408. CCH2 DATA 0C5H ;COMPARE/CAPTURE REGISTER 2 - HIGH BYTE
  2409. CCL3 DATA 0C6H ;COMPARE/CAPTURE REGISTER 3 - LOW BYTE
  2410. CCH3 DATA 0C7H ;COMPARE/CAPTURE REGISTER 3 - HIGH BYTE
  2411. T2CON DATA 0C8H ;TIMER 2 CONTROL
  2412. CRCL DATA 0CAH ;COMPARE/RELOAD/CAPTURE - LOW BYTE
  2413. CRCH DATA 0CBH ;COMPARE/RELOAD/CAPTURE - HIGH BYTE
  2414. TL2 DATA 0CCH ;TIMER 2 - LOW BYTE
  2415. TH2 DATA 0CDH ;TIMER 2 - HIGH BYTE
  2416. ************************************************************************
  2417. ************************************************************************
  2418. for the 80C517/80C537
  2419. CC4EN DATA 0C9H ;COMPARE/CAPTURE 4 ENABLE
  2420. CCL4 DATA 0CEH ;COMPARE/CAPTURE REGISTER 4 - LOW BYTE
  2421. CCH4 DATA 0CFH ;COMPARE/CAPTURE REGISTER 4 - HIGH BYTE
  2422. ************************************************************************
  2423. ************************************************************************
  2424. for the RUPI-44
  2425. STS DATA 0C8H ;SIU STATUS REGISTER
  2426. SMD DATA 0C9H ;SERIAL MODE
  2427. RCB DATA 0CAH ;RECEIVE CONTROL BYTE
  2428. RBL DATA 0CBH ;RECEIVE BUFFER LENGTH
  2429. RBS DATA 0CCH ;RECEIVE BUFFER START
  2430. RFL DATA 0CDH ;RECEIVE FIELD LENGTH
  2431. STAD DATA 0CEH ;STATION ADDRESS
  2432. DMA_CNT DATA 0CFH ;DMA COUNT
  2433. ************************************************************************
  2434. ************************************************************************
  2435. for the 8052/8032, 80C51FA/83C51FA(83C252/80C252), 80C154/83C154
  2436. T2CON DATA 0C8H ;TIMER 2 CONTROL
  2437. ************************************************************************
  2438. ************************************************************************
  2439. for the 80C51FA/83C51FA(83C252/80C252)
  2440. T2MOD DATA 0C9H ;TIMER 2 MODE CONTROL
  2441. ************************************************************************
  2442. ************************************************************************
  2443. for the 8052/8032, 80C51FA/83C51FA(83C252/80C252), 80C154/83C154
  2444. RCAP2L DATA 0CAH ;TIMER 2 CAPTURE REGISTER, LOW BYTE
  2445. RCAP2H DATA 0CBH ;TIMER 2 CAPTURE REGISTER, HIGH BYTE
  2446. TL2 DATA 0CCH ;TIMER 2 - LOW BYTE
  2447. TH2 DATA 0CDH ;TIMER 2 - HIGH BYTE
  2448. ************************************************************************
  2449. B-4
  2450. ************************************************************************
  2451. for the 83C152/80C152
  2452. P4 DATA 0C0H ;PORT 4
  2453. DARL0 DATA 0C2H ;DMA DESTINATION ADDR. 0 (LOW)
  2454. DARH0 DATA 0C3H ;DMA DESTINATION ADDR. 0 (HIGH)
  2455. BKOFF DATA 0C4H ;GSC BACKOFF TIMER
  2456. ADR3 DATA 0C5H ;GSC MATCH ADDRESS 3
  2457. IEN1 DATA 0C8H ;INTERRUPT ENABLE REGISTER 1
  2458. ************************************************************************
  2459. ************************************************************************
  2460. for the 80C452/83C452
  2461. P4 DATA 0C0H ;PORT 4
  2462. DARL0 DATA 0C2H ;DMA DESTINATION ADDR. 0 (LOW)
  2463. DARH0 DATA 0C3H ;DMA DESTINATION ADDR. 0 (HIGH)
  2464. ************************************************************************
  2465. ************************************************************************
  2466. for the 80C451/83C451
  2467. P4 DATA 0C0H ;PORT 4
  2468. P5 DATA 0C8H ;PORT 5
  2469. ************************************************************************
  2470. ************************************************************************
  2471. for the 80512/80532
  2472. IRCON DATA 0C0H ;INTERRUPT REQUEST CONTROL
  2473. ************************************************************************
  2474. ************************************************************************
  2475. for the 80C552/83C552
  2476. P4 DATA 0C0H ;PORT 4
  2477. P5 DATA 0C4H ;PORT 5
  2478. ADCON DATA 0C5H ;A/D CONVERTER CONTROL
  2479. ADCH DATA 0C6H ;A/D CONVERTER HIGH BYTE
  2480. TM2IR DATA 0C8H ;T2 INTERRUPT FLAGS
  2481. CMH0 DATA 0C9H ;COMPARE 0 - HIGH BYTE
  2482. CMH1 DATA 0CAH ;COMPARE 1 - HIGH BYTE
  2483. CMH2 DATA 0CBH ;COMPARE 2 - HIGH BYTE
  2484. CTH0 DATA 0CCH ;CAPTURE 0 - HIGH BYTE
  2485. CTH1 DATA 0CDH ;CAPTURE 1 - HIGH BYTE
  2486. CTH2 DATA 0CEH ;CAPTURE 2 - HIGH BYTE
  2487. CTH3 DATA 0CFH ;CAPTURE 3 - HIGH BYTE
  2488. ************************************************************************
  2489. PSW DATA 0D0H ;PROGRAM STATUS WORD
  2490. ************************************************************************
  2491. for the RUPI-44
  2492. NSNR DATA 0D8H ;SEND COUNT/RECEIVE COUNT
  2493. SIUST DATA 0D9H ;SIU STATE COUNTER
  2494. TCB DATA 0DAH ;TRANSMIT CONTROL BYTE
  2495. TBL DATA 0DBH ;TRANSMIT BUFFER LENGTH
  2496. TBS DATA 0DCH ;TRANSMIT BUFFER START
  2497. FIFO0 DATA 0DDH ;THREE BYTE FIFO
  2498. FIFO1 DATA 0DEH
  2499. FIFO2 DATA 0DFH
  2500. ************************************************************************
  2501. B-5
  2502. ************************************************************************
  2503. for the 80C51FA/83C51FA(83C252/80C252)
  2504. CCON DATA 0D8H ;CONTROL COUNTER
  2505. CMOD DATA 0D9H ;COUNTER MODE
  2506. CCAPM0 DATA 0DAH ;COMPARE/CAPTURE MODE FOR PCA MODULE 0
  2507. CCAPM1 DATA 0DBH ;COMPARE/CAPTURE MODE FOR PCA MODULE 1
  2508. CCAPM2 DATA 0DCH ;COMPARE/CAPTURE MODE FOR PCA MODULE 2
  2509. CCAPM3 DATA 0DDH ;COMPARE/CAPTURE MODE FOR PCA MODULE 3
  2510. CCAPM4 DATA 0DEH ;COMPARE/CAPTURE MODE FOR PCA MODULE 4
  2511. ************************************************************************
  2512. ************************************************************************
  2513. for the 80515/80535
  2514. ADCON DATA 0D8H ;A/D CONVERTER CONTROL
  2515. ADDAT DATA 0D9H ;A/D CONVERTER DATA
  2516. DAPR DATA 0DAH ;D/A CONVERTER PROGRAM REGISTER
  2517. ************************************************************************
  2518. ************************************************************************
  2519. for the 83C152/80C152
  2520. DARL1 DATA 0D2H ;DMA DESTINATION ADDR. 1 (LOW)
  2521. DARH1 DATA 0D3H ;DMA DESTINATION ADDR. 1 (HIGH)
  2522. TCDCNT DATA 0D4H ;GSC TRANSMIT COLLISION COUNTER
  2523. AMSK0 DATA 0D5H ;GSC ADDRESS MASK 0
  2524. TSTAT DATA 0D8H ;TRANSMIT STATUS (DMA & GSC)
  2525. ************************************************************************
  2526. ************************************************************************
  2527. for the 80C452/83C452
  2528. DARL1 DATA 0D2H ;DMA DESTINATION ADDR. 1 (LOW)
  2529. DARH1 DATA 0D3H ;DMA DESTINATION ADDR. 1 (HIGH)
  2530. ************************************************************************
  2531. ************************************************************************
  2532. for the 80C451/83C451
  2533. P6 DATA 0D8H ;PORT 6
  2534. ************************************************************************
  2535. ************************************************************************
  2536. for the 80512/80532
  2537. ADCON DATA 0D8H ;A/D CONVERTER CONTROL
  2538. ADDAT DATA 0D9H ;A/D CONVERTER DATA
  2539. DAPR DATA 0DAH ;D/A CONVERTER PROGRAM REGISTER
  2540. P6 DATA 0DBH ;PORT 6
  2541. ************************************************************************
  2542. ************************************************************************
  2543. for the 83C751/83C752
  2544. I2CFG DATA 0D8H ;I2C CONFIGURATION
  2545. ************************************************************************
  2546. ************************************************************************
  2547. for the 80C552/83C552 and 80C652/83C652
  2548. S1CON DATA 0D8H ;SERIAL 1 CONTROL
  2549. S1STA DATA 0D9H ;SERIAL 1 STATUS
  2550. S1DAT DATA 0DAH ;SERIAL 1 DATA
  2551. S1ADR DATA 0DBH ;SERIAL 1 SLAVE ADDRESS
  2552. ************************************************************************
  2553. B-6
  2554. ************************************************************************
  2555. for the 80C517/80C537
  2556. CML0 DATA 0D2H ;COMPARE REGISTER 0 - LOW BYTE
  2557. CMH0 DATA 0D3H ;COMPARE REGISTER 0 - HIGH BYTE
  2558. CML1 DATA 0D4H ;COMPARE REGISTER 1 - LOW BYTE
  2559. CMH1 DATA 0D5H ;COMPARE REGISTER 1 - HIGH BYTE
  2560. CML2 DATA 0D6H ;COMPARE REGISTER 2 - LOW BYTE
  2561. CMH2 DATA 0D7H ;COMPARE REGISTER 2 - HIGH BYTE
  2562. ADCON0 DATA 0D8H ;A/D CONVERTER CONTROL 0
  2563. ADDAT DATA 0D9H ;A/D CONVERTER DATA
  2564. DAPR DATA 0DAH ;D/A CONVERTER PROGRAM REGISTER
  2565. P7 DATA 0DBH ;PORT 7
  2566. ADCON1 DATA 0DCH ;A/D CONVERTER CONTROL 1
  2567. P8 DATA 0DDH ;PORT 8
  2568. CTRELL DATA 0DEH ;COM TIMER REL REG - LOW BYTE
  2569. CTRELH DATA 0DFH ;COM TIMER REL REG - HIGH BYTE
  2570. ************************************************************************
  2571. ACC DATA 0E0H ;ACCUMULATOR
  2572. ************************************************************************
  2573. for the 83C152/80C152
  2574. BCRL0 DATA 0E2H ;DMA BYTE COUNT 0 (LOW)
  2575. BCRH0 DATA 0E3H ;DMA BYTE COUNT 0 (HIGH)
  2576. PRBS DATA 0E4H ;GSC PSEUDO-RANDOM SEQUENCE
  2577. AMSK1 DATA 0E5H ;GSC ADDRESS MASK 1
  2578. RSTAT DATA 0E8H ;RECEIVE STATUS (DMA & GSC)
  2579. ************************************************************************
  2580. ************************************************************************
  2581. for the 80C452/83C452
  2582. BCRL0 DATA 0E2H ;DMA BYTE COUNT 0 (LOW)
  2583. BCRH0 DATA 0E3H ;DMA BYTE COUNT 0 (HIGH)
  2584. HSTAT DATA 0E6H ;HOST STATUS
  2585. HCON DATA 0E7H ;HOST CONTROL
  2586. SLCON DATA 0E8H ;SLAVE CONTROL
  2587. SSTAT DATA 0E9H ;SLAVE STATUS
  2588. IWPR DATA 0EAH ;INPUT WRITE POINTER
  2589. IRPR DATA 0EBH ;INPUT READ POINTER
  2590. CBP DATA 0ECH ;CHANNEL BOUNDARY POINTER
  2591. FIN DATA 0EEH ;FIFO IN
  2592. CIN DATA 0EFH ;COMMAND IN
  2593. ************************************************************************
  2594. ************************************************************************
  2595. for the 80515/80535
  2596. P4 DATA 0E8H ;PORT 4
  2597. ************************************************************************
  2598. ************************************************************************
  2599. for the 80C451/83C451
  2600. CSR DATA 0E8H ;CONTROL STATUS
  2601. ************************************************************************
  2602. ************************************************************************
  2603. for the 80512/80532
  2604. P4 DATA 0E8H ;PORT 4
  2605. ************************************************************************
  2606. B-7
  2607. ************************************************************************
  2608. for the 80C552/83C552
  2609. IEN1 DATA 0E8H ;INTERRUPT ENABLE REGISTER 1
  2610. TM2CON DATA 0EAH ;T2 COUNTER CONTROL
  2611. CTCON DATA 0EBH ;CAPTURE CONTROL
  2612. TML2 DATA 0ECH ;TIMER 2 - LOW BYTE
  2613. TMH2 DATA 0EDH ;TIMER 2 - HIGH BYTE
  2614. STE DATA 0EEH ;SET ENABLE
  2615. RTE DATA 0EFH ;RESET/TOGGLE ENABLE
  2616. ************************************************************************
  2617. ************************************************************************
  2618. for the 80C51FA/83C51FA(83C252/80C252)
  2619. CL DATA 0E9H ;CAPTURE BYTE LOW
  2620. CCAP0L DATA 0EAH ;COMPARE/CAPTURE 0 LOW BYTE
  2621. CCAP1L DATA 0EBH ;COMPARE/CAPTURE 1 LOW BYTE
  2622. CCAP2L DATA 0ECH ;COMPARE/CAPTURE 2 LOW BYTE
  2623. CCAP3L DATA 0EDH ;COMPARE/CAPTURE 3 LOW BYTE
  2624. CCAP4L DATA 0EEH ;COMPARE/CAPTURE 4 LOW BYTE
  2625. ************************************************************************
  2626. ************************************************************************
  2627. for the 80C517/80C537
  2628. CTCON DATA 0E1H ;COM TIMER CONTROL REG
  2629. CML3 DATA 0E2H ;COMPARE REGISTER 3 - LOW BYTE
  2630. CMH3 DATA 0E3H ;COMPARE REGISTER 3 - HIGH BYTE
  2631. CML4 DATA 0E4H ;COMPARE REGISTER 4 - LOW BYTE
  2632. CMH4 DATA 0E5H ;COMPARE REGISTER 4 - HIGH BYTE
  2633. CML5 DATA 0E6H ;COMPARE REGISTER 5 - LOW BYTE
  2634. CMH5 DATA 0E7H ;COMPARE REGISTER 5 - HIGH BYTE
  2635. P4 DATA 0E8H ;PORT 4
  2636. MD0 DATA 0E9H ;MUL/DIV REG 0
  2637. MD1 DATA 0EAH ;MUL/DIV REG 1
  2638. MD2 DATA 0EBH ;MUL/DIV REG 2
  2639. MD3 DATA 0ECH ;MUL/DIV REG 3
  2640. MD4 DATA 0EDH ;MUL/DIV REG 4
  2641. MD5 DATA 0EEH ;MUL/DIV REG 5
  2642. ARCON DATA 0EFH ;ARITHMETIC CONTROL REG
  2643. ************************************************************************
  2644. B DATA 0F0H ;MULTIPLICATION REGISTER
  2645. ************************************************************************
  2646. for the 80C154/83C154
  2647. IOCON DATA 0F8H ;I/O CONTROL REGISTER
  2648. ************************************************************************
  2649. ************************************************************************
  2650. for the 83C152/80C152
  2651. BCRL1 DATA 0F2H ;DMA BYTE COUNT 1 (LOW)
  2652. BCRH1 DATA 0F3H ;DMA BYTE COUNT 1 (HIGH)
  2653. RFIFO DATA 0F4H ;GSC RECEIVE BUFFER
  2654. MYSLOT DATA 0F5H ;GSC SLOT ADDRESS
  2655. IPN1 DATA 0F8H ;INTERRUPT PRIORITY REGISTER 1
  2656. ************************************************************************
  2657. B-8
  2658. ************************************************************************
  2659. for the 83C851/80C851
  2660. EADRL DATA 0F2H ;EEPROM Address Register - Low Byte
  2661. EADRH DATA 0F3H ;EEPROM Address Register - High Byte
  2662. EDAT DATA 0F4H ;EEPROM Data Register
  2663. ETIM DATA 0F5H ;EEPROM Timer Register
  2664. ECNTRL DATA 0F6H ;EEPROM Control Register
  2665. ************************************************************************
  2666. ************************************************************************
  2667. for the 80C452/83C452
  2668. BCRL1 DATA 0F2H ;DMA BYTE COUNT 1 (LOW)
  2669. BCRH1 DATA 0F3H ;DMA BYTE COUNT 1 (HIGH)
  2670. ITHR DATA 0F6H ;INPUT FIFO THRESHOLD
  2671. OTHR DATA 0F7H ;OUTPUT FIFO THRESHOLD
  2672. IEP DATA 0F8H ;INTERRUPT PRIORITY
  2673. MODE DATA 0F9H ;MODE
  2674. ORPR DATA 0FAH ;OUTPUT READ POINTER
  2675. OWPR DATA 0FBH ;OUTPUT WRITE POINTER
  2676. IMIN DATA 0FCH ;IMMEDIATE COMMAND IN
  2677. IMOUT DATA 0FDH ;IMMEDIATE COMMAND OUT
  2678. FOUT DATA 0FEH ;FIFO OUT
  2679. COUT DATA 0FFH ;COMMAND OUT
  2680. ************************************************************************
  2681. ************************************************************************
  2682. for the 80515/80535
  2683. P5 DATA 0F8H ;PORT 5
  2684. ************************************************************************
  2685. ************************************************************************
  2686. for the 80512/80532
  2687. P5 DATA 0F8H ;PORT 5
  2688. ************************************************************************
  2689. ************************************************************************
  2690. for the 83C751/83C752
  2691. I2STA DATA 0F8H ;I2C STATUS
  2692. ************************************************************************
  2693. ************************************************************************
  2694. for the 80C552/83C552
  2695. IP1 DATA 0F8H ;INTERRUPT PRIORITY REGISTER 1
  2696. PWM0 DATA 0FCH ;PULSE WIDTH REGISTER 0
  2697. PWM1 DATA 0FDH ;PULSE WIDTH REGISTER 1
  2698. PWMP DATA 0FEH ;PRESCALER FREQUENCY CONTROL
  2699. T3 DATA 0FFH ;T3 - WATCHDOG TIMER
  2700. ************************************************************************
  2701. ************************************************************************
  2702. for the 80C517/80C537
  2703. CMEN DATA 0F6H ;COMPARE ENABLE
  2704. CML6 DATA 0F2H ;COMPARE REGISTER 6 - LOW BYTE
  2705. CMH6 DATA 0F3H ;COMPARE REGISTER 6 - HIGH BYTE
  2706. CML7 DATA 0F4H ;COMPARE REGISTER 7 - LOW BYTE
  2707. CMH7 DATA 0F5H ;COMPARE REGISTER 7 - HIGH BYTE
  2708. CMSEL DATA 0F7H ;COMPARE INPUT REGISTER
  2709. P5 DATA 0F8H ;PORT 5
  2710. P6 DATA 0FAH ;PORT 6
  2711. ************************************************************************
  2712. B-9
  2713. ************************************************************************
  2714. for the 80C51FA/83C51FA(83C252/80C252)
  2715. CH DATA 0F9H ;CAPTURE HIGH BYTE
  2716. CCAP0H DATA 0FAH ;COMPARE/CAPTURE 0 HIGH BYTE
  2717. CCAP1H DATA 0FBH ;COMPARE/CAPTURE 1 HIGH BYTE
  2718. CCAP2H DATA 0FCH ;COMPARE/CAPTURE 2 HIGH BYTE
  2719. CCAP3H DATA 0FDH ;COMPARE/CAPTURE 3 HIGH BYTE
  2720. CCAP4H DATA 0FEH ;COMPARE/CAPTURE 4 HIGH BYTE
  2721. ************************************************************************
  2722. ************************************************************************
  2723. for the 83C752
  2724. PWENA DATA 0FEH ;PULSE WIDTH ENABLE
  2725. ************************************************************************
  2726. B-10
  2727. B.2. Pre-defined Bit Addresses
  2728. ************************************************************************
  2729. for the 83C751/83C752
  2730. SCL BIT 080H ;P0.0 - I2C SERIAL CLOCK
  2731. SDA BIT 081H ;P0.1 - I2C SERIAL DATA
  2732. ************************************************************************
  2733. IT0 BIT 088H ;TCON.0 - EXT. INTERRUPT 0 TYPE
  2734. IE0 BIT 089H ;TCON.1 - EXT. INTERRUPT 0 EDGE FLAG
  2735. IT1 BIT 08AH ;TCON.2 - EXT. INTERRUPT 1 TYPE
  2736. IE1 BIT 08BH ;TCON.3 - EXT. INTERRUPT 1 EDGE FLAG
  2737. TR0 BIT 08CH ;TCON.4 - TIMER 0 ON/OFF CONTROL
  2738. TF0 BIT 08DH ;TCON.5 - TIMER 0 OVERFLOW FLAG
  2739. TR1 BIT 08EH ;TCON.6 - TIMER 1 ON/OFF CONTROL
  2740. TF1 BIT 08FH ;TCON.7 - TIMER 1 OVERFLOW FLAG
  2741. ************************************************************************
  2742. for the 83C751/83C752
  2743. C/T BIT 08EH ;TCON.6 - COUNTER OR TIMER OPERATION
  2744. GATE BIT 08FH ;TCON.7 - GATE TIMER
  2745. ************************************************************************
  2746. ************************************************************************
  2747. for the 80515/80535
  2748. INT3 BIT 090H ;P1.0 - EXT. INTERRUPT 3/CAPT & COMP 0
  2749. INT4 BIT 091H ;P1.1 - EXT. INTERRUPT 4/CAPT & COMP 1
  2750. INT5 BIT 092H ;P1.2 - EXT. INTERRUPT 5/CAPT & COMP 2
  2751. INT6 BIT 093H ;P1.3 - EXT. INTERRUPT 6/CAPT & COMP 3
  2752. INT2 BIT 094H ;P1.4 - EXT. INTERRUPT 2
  2753. T2EX BIT 095H ;P1.5 - TIMER 2 EXT. RELOAD TRIGGER INP
  2754. CLKOUT BIT 096H ;P1.6 - SYSTEM CLOCK OUTPUT
  2755. T2 BIT 097H ;P1.7 - TIMER 2 INPUT
  2756. ************************************************************************
  2757. ************************************************************************
  2758. for the 83C152/80C152
  2759. GRXD BIT 090H ;P1.0 - GSC RECEIVER DATA INPUT
  2760. GTXD BIT 091H ;P1.1 - GSC TRANSMITTER DATA OUTPUT
  2761. DEN BIT 092H ;P1.2 - DRIVE ENABLE TO ENABLE EXT DRIVE
  2762. TXC BIT 093H ;P1.3 - GSC EXTERNAL TRANSMIT CLOCK INPU
  2763. RXC BIT 094H ;P1.4 - GSC EXTERNAL RECEIVER CLOCK INPU
  2764. ************************************************************************
  2765. ************************************************************************
  2766. for the 83C552/80C552
  2767. CT0I BIT 090H ;P1.0 - CAPTURE/TIMER INPUT 0
  2768. CT1I BIT 091H ;P1.1 - CAPTURE/TIMER INPUT 1
  2769. CT2I BIT 092H ;P1.2 - CAPTURE/TIMER INPUT 2
  2770. CT3I BIT 093H ;P1.3 - CAPTURE/TIMER INPUT 3
  2771. T2 BIT 094H ;P1.4 - T2 EVENT INPUT
  2772. RT2 BIT 095H ;P1.5 - T2 TIMER RESET SIGNAL
  2773. SCL BIT 096H ;P1.6 - SERIAL PORT CLOCK LINE I2C
  2774. SDA BIT 097H ;P1.7 - SERIAL PORT DATA LINE I2C
  2775. ************************************************************************
  2776. B-11
  2777. ************************************************************************
  2778. for the 80C517/80C537
  2779. INT3 BIT 090H ;P1.0 - EXT. INTERRUPT 3/CAPT & COMP 0
  2780. INT4 BIT 091H ;P1.1 - EXT. INTERRUPT 4/CAPT & COMP 1
  2781. INT5 BIT 092H ;P1.2 - EXT. INTERRUPT 5/CAPT & COMP 2
  2782. INT6 BIT 093H ;P1.3 - EXT. INTERRUPT 6/CAPT & COMP 3
  2783. INT2 BIT 094H ;P1.4 - EXT. INTERRUPT 2
  2784. T2EX BIT 095H ;P1.5 - TIMER 2 EXT. RELOAD TRIGGER INPU
  2785. CLKOUT BIT 096H ;P1.6 - SYSTEM CLOCK OUTPUT
  2786. T2 BIT 097H ;P1.7 - TIMER 2 INPUT
  2787. ************************************************************************
  2788. ************************************************************************
  2789. for the 80C452/83C452 and 80C152/83C152
  2790. HLD BIT 095H ;P1.5 - DMA HOLD REQUEST I/O
  2791. HLDA BIT 096H ;P1.6 - DMA HOLD ACKNOWLEDGE OUTPUT
  2792. ************************************************************************
  2793. ************************************************************************
  2794. for the 83C751/83C752
  2795. INT0 BIT 095H ;P1.5 - EXTERNAL INTERRUPT 0 INPUT
  2796. INT1 BIT 096H ;P1.6 - EXTERNAL INTERRUPT 1 INPUT
  2797. T0 BIT 096H ;P1.7 - TIMER 0 COUNT INPUT
  2798. ************************************************************************
  2799. RI BIT 098H ;SCON.0 - RECEIVE INTERRUPT FLAG
  2800. TI BIT 099H ;SCON.1 - TRANSMIT INTERRUPT FLAG
  2801. RB8 BIT 09AH ;SCON.2 - RECEIVE BIT 8
  2802. TB8 BIT 09BH ;SCON.3 - TRANSMIT BIT 8
  2803. REN BIT 09CH ;SCON.4 - RECEIVE ENABLE
  2804. SM2 BIT 09DH ;SCON.5 - SERIAL MODE CONTROL BIT 2
  2805. SM1 BIT 09EH ;SCON.6 - SERIAL MODE CONTROL BIT 1
  2806. SM0 BIT 09FH ;SCON.7 - SERIAL MODE CONTROL BIT 0
  2807. ************************************************************************
  2808. for the 83C751/83C752
  2809. MASTER BIT(READ) 099H ;I2CON.1 - MASTER
  2810. STP BIT(READ) 09AH ;I2CON.2 - STOP
  2811. STR BIT(READ) 09BH ;I2CON.3 - START
  2812. ARL BIT(READ) 09CH ;I2CON.4 - ARBITRATION LOSS
  2813. DRDY BIT(READ) 09DH ;I2CON.5 - DATA READY
  2814. ATN BIT(READ) 09EH ;I2CON.6 - ATTENTION
  2815. RDAT BIT(READ) 09FH ;I2CON.7 - RECEIVE DATA
  2816. XSTP BIT(WRITE)098H ;I2CON.0 - TRANSMIT STOP
  2817. XSTR BIT(WRITE)099H ;I2CON.1 - TRANSMIT REPEATED START
  2818. CSTP BIT(WRITE)09AH ;I2CON.2 - CLEAR STOP
  2819. CSTR BIT(WRITE)09BH ;I2CON.3 - CLEAR START
  2820. CARL BIT(WRITE)09CH ;I2CON.4 - CLEAR ARBITRATION LOSS
  2821. CDR BIT(WRITE)09DH ;I2CON.5 - CLEAR DATA READY
  2822. IDLE BIT(WRITE)09EH ;I2CON.6 - GO IDLE
  2823. CXA BIT(WRITE)09FH ;I2CON.7 - CLEAR TRANSMIT ACTIVE
  2824. ************************************************************************
  2825. EX0 BIT 0A8H ;IE.0 - EXTERNAL INTERRUPT 0 ENABLE
  2826. ET0 BIT 0A9H ;IE.1 - TIMER 0 INTERRUPT ENABLE
  2827. EX1 BIT 0AAH ;IE.2 - EXTERNAL INTERRUPT 1 ENABLE
  2828. ET1 BIT 0ABH ;IE.3 - TIMER 1 INTERRUPT ENABLE
  2829. ES BIT 0ACH ;IE.4 - SERIAL PORT INTERRUPT ENABLE
  2830. B-12
  2831. ************************************************************************
  2832. for the 83C751/83C752
  2833. EI2 BIT 0ACH ;IE.4 - SERIAL PORT INTERRUPT ENABLE
  2834. ************************************************************************
  2835. ************************************************************************
  2836. for the 8052/8032, 80C154/83C154, 80C252(80C51FA), 80515/80535
  2837. ET2 BIT 0ADH ;TIMER 2 INTERRUPT ENABLE
  2838. ************************************************************************
  2839. ************************************************************************
  2840. for the 80C652/83C652
  2841. ES1 BIT 0ADH ;IE.5 - SERIAL PORT 1 INTERRUPT ENABLE
  2842. ************************************************************************
  2843. ************************************************************************
  2844. for the 80C252(80C51FA)
  2845. EC BIT 0AEH ;IE.6 - ENABLE PCA INTERRUPT
  2846. ************************************************************************
  2847. ************************************************************************
  2848. for the 80515/80535
  2849. WDT BIT 0AEH ;IEN0.6 - WATCHDOG TIMER RESET
  2850. ************************************************************************
  2851. ************************************************************************
  2852. for the 83C552/80C552
  2853. ES1 BIT 0ADH ;IEN0.5 - SERIAL PORT 1 INTERRUPT ENABLE
  2854. EAD BIT 0AEH ;IEN0.6 - ENABLE A/D INTERRUPT
  2855. ************************************************************************
  2856. ************************************************************************
  2857. for the 80C517/80C537
  2858. ET2 BIT 0ADH ;IEN0.5 - TIMER 2 INTERRUPT ENABLE
  2859. WDT BIT 0AEH ;IEN0.6 - WATCHDOG TIMER RESET
  2860. ************************************************************************
  2861. EA BIT 0AFH ;IE.7 - GLOBAL INTERRUPT ENABLE
  2862. RXD BIT 0B0H ;P3.0 - SERIAL PORT RECEIVE INPUT
  2863. TXD BIT 0B1H ;P3.1 - SERIAL PORT TRANSMIT OUTPUT
  2864. INT0 BIT 0B2H ;P3.2 - EXTERNAL INTERRUPT 0 INPUT
  2865. INT1 BIT 0B3H ;P3.3 - EXTERNAL INTERRUPT 1 INPUT
  2866. T0 BIT 0B4H ;P3.4 - TIMER 0 COUNT INPUT
  2867. T1 BIT 0B5H ;P3.5 - TIMER 1 COUNT INPUT
  2868. WR BIT 0B6H ;P3.6 - WRITE CONTROL FOR EXT. MEMORY
  2869. RD BIT 0B7H ;P3.7 - READ CONTROL FOR EXT. MEMORY
  2870. PX0 BIT 0B8H ;IP.0 - EXTERNAL INTERRUPT 0 PRIORITY
  2871. PT0 BIT 0B9H ;IP.1 - TIMER 0 PRIORITY
  2872. PX1 BIT 0BAH ;IP.2 - EXTERNAL INTERRUPT 1 PRIORITY
  2873. PT1 BIT 0BBH ;IP.3 - TIMER 1 PRIORITY
  2874. PS BIT 0BCH ;IP.4 - SERIAL PORT PRIORITY
  2875. ************************************************************************
  2876. for the 80C154/83C154
  2877. PT2 BIT 0BCH ;IP.5 - TIMER 2 PRIORITY
  2878. PCT BIT 0BFH ;IP.7 - INTERRUPT PRIORITY DISABLE
  2879. ************************************************************************
  2880. B-13
  2881. ************************************************************************
  2882. for the 80C652/83C652
  2883. PS1 BIT 0BDH ;IP.5 - SERIAL PORT 1 PRIORITY
  2884. ************************************************************************
  2885. ************************************************************************
  2886. for the 80C51FA/83C51FA(83C252/80C252)
  2887. PT2 BIT 0BDH ;IP.5 - TIMER 2 PRIORITY
  2888. PPC BIT 0BEH ;IP.6 - PCA PRIORITY
  2889. ************************************************************************
  2890. ************************************************************************
  2891. for the 80515/80535 and 80C517/80C537
  2892. EADC BIT 0B8H ;IEN1.0 - A/D CONVERTER INTERRUPT EN
  2893. EX2 BIT 0B9H ;IEN1.1 - EXT. INTERRUPT 2 ENABLE
  2894. EX3 BIT 0BAH ;IEN1.2 - EXT. INT 3/CAPT/COMP INT 0 EN
  2895. EX4 BIT 0BBH ;IEN1.3 - EXT. INT 4/CAPT/COMP INT 1 EN
  2896. EX5 BIT 0BCH ;IEN1.4 - EXT. INT 5/CAPT/COMP INT 2 EN
  2897. EX6 BIT 0BDH ;IEN1.5 - EXT. INT 6/CAPT/COMP INT 3 EN
  2898. SWDT BIT 0BEH ;IEN1.6 - WATCHDOG TIMER START
  2899. EXEN2 BIT 0BFH ;IEN1.7 - T2 EXT. RELOAD INTER START
  2900. IADC BIT 0C0H ;IRCON.0 - A/D CONVERTER INTER REQUEST
  2901. IEX2 BIT 0C1H ;IRCON.1 - EXT. INTERRUPT 2 EDGE FLAG
  2902. IEX3 BIT 0C2H ;IRCON.2 - EXT. INTERRUPT 3 EDGE FLAG
  2903. IEX4 BIT 0C3H ;IRCON.3 - EXT. INTERRUPT 4 EDGE FLAG
  2904. IEX5 BIT 0C4H ;IRCON.4 - EXT. INTERRUPT 5 EDGE FLAG
  2905. IEX6 BIT 0C5H ;IRCON.5 - EXT. INTERRUPT 6 EDGE FLAG
  2906. TF2 BIT 0C6H ;IRCON.6 - TIMER 2 OVERFLOW FLAG
  2907. EXF2 BIT 0C7H ;IRCON.7 - TIMER 2 EXT. RELOAD FLAG
  2908. T2IO BIT 0C8H ;T2CON.0 - TIMER 2 INPUT SELECT BIT 0
  2909. T2I1 BIT 0C9H ;T2CON.1 - TIMER 2 INPUT SELECT BIT 1
  2910. T2CM BIT 0CAH ;T2CON.2 - COMPARE MODE
  2911. T2R0 BIT 0CBH ;T2CON.3 - TIMER 2 RELOAD MODE SEL BIT 0
  2912. T2R1 BIT 0CCH ;T2CON.4 - TIMER 2 RELOAD MODE SEL BIT 1
  2913. I2FR BIT 0CDH ;T2CON.5 - EXT. INT 2 F/R EDGE FLAG
  2914. I3FR BIT 0CEH ;T2CON.6 - EXT. INT 3 F/R EDGE FLAG
  2915. T2PS BIT 0CFH ;T2CON.7 - PRESCALER SELECT BIT
  2916. ************************************************************************
  2917. ************************************************************************
  2918. for the 83C552/80C552
  2919. PS1 BIT 0BDH ;IP0.5 - SIO1
  2920. PAD BIT 0BEH ;IP0.6 - A/D CONVERTER
  2921. CMSR0 BIT 0C0H ;P4.0 - T2 COMPARE AND SET/RESET OUTPUTS
  2922. CMSR1 BIT 0C1H ;P4.1 - T2 COMPARE AND SET/RESET OUTPUTS
  2923. CMSR2 BIT 0C2H ;P4.2 - T2 COMPARE AND SET/RESET OUTPUTS
  2924. CMSR3 BIT 0C3H ;P4.3 - T2 COMPARE AND SET/RESET OUTPUTS
  2925. CMSR4 BIT 0C4H ;P4.4 - T2 COMPARE AND SET/RESET OUTPUTS
  2926. CMSR5 BIT 0C5H ;P4.5 - T2 COMPARE AND SET/RESET OUTPUTS
  2927. CMT0 BIT 0C6H ;P4.6 - T2 COMPARE AND TOGGLE OUTPUTS
  2928. CMT1 BIT 0C7H ;P4.7 - T2 COMPARE AND TOGGLE OUTPUTS
  2929. CTI0 BIT 0C8H ;TM2IR.0 - T2 CAPTURE 0
  2930. CTI1 BIT 0C9H ;TM2IR.1 - T2 CAPTURE 1
  2931. CTI2 BIT 0CAH ;TM2IR.2 - T2 CAPTURE 2
  2932. CTI3 BIT 0CBH ;TM2IR.3 - T2 CAPTURE 3
  2933. CMI0 BIT 0CCH ;TM2IR.4 - T2 COMPARATOR 0
  2934. CMI1 BIT 0CDH ;TM2IR.5 - T2 COMPARATOR 1
  2935. CMI2 BIT 0CEH ;TM2IR.6 - T2 COMPARATOR 2
  2936. T2OV BIT 0CFH ;TM2IR.7 - T2 OVERFLOW
  2937. B-14
  2938. ************************************************************************
  2939. ************************************************************************
  2940. for the RUPI-44
  2941. RBP BIT 0C8H ;STS.0 - RECEIVE BUFFER PROTECT
  2942. AM BIT 0C9H ;STS.1 - AUTO/ADDRESSED MODE SELECT
  2943. OPB BIT 0CAH ;STS.2 - OPTIONAL POLL BIT
  2944. BOV BIT 0CBH ;STS.3 - RECEIVE BUFFER OVERRUN
  2945. SI BIT 0CCH ;STS.4 - SIU INTERRUPT FLAG
  2946. RTS BIT 0CDH ;STS.5 - REQUEST TO SEND
  2947. RBE BIT 0CEH ;STS.6 - RECEIVE BUFFER EMPTY
  2948. TBF BIT 0CFH ;STS.7 - TRANSMIT BUFFER FULL
  2949. ************************************************************************
  2950. ************************************************************************
  2951. for the 8052/8032, 80C154/83C154, 80C51FA/83C51FA(83C252/80C252)
  2952. CAP2 BIT 0C8H ;T2CON.0 - CAPTURE OR RELOAD SELECT
  2953. CNT2 BIT 0C9H ;T2CON.1 - TIMER OR COUNTER SELECT
  2954. TR2 BIT 0CAH ;T2CON.2 - TIMER 2 ON/OFF CONTROL
  2955. EXEN2 BIT 0CBH ;T2CON.3 - TIMER 2 EXTERNAL ENABLE FLAG
  2956. TCLK BIT 0CCH ;T2CON.4 - TRANSMIT CLOCK SELECT
  2957. RCLK BIT 0CDH ;T2CON.5 - RECEIVE CLOCK SELECT
  2958. EXF2 BIT 0CEH ;T2CON.6 - EXTERNAL TRANSITION FLAG
  2959. TF2 BIT 0CFH ;T2CON.7 - TIMER 2 OVERFLOW FLAG
  2960. ************************************************************************
  2961. ************************************************************************
  2962. for the 83C152/80C152
  2963. EGSRV BIT 0C8H ;IEN1.0 - GSC RECEIVE VALID
  2964. EGSRE BIT 0C9H ;IEN1.1 - GSC RECEIVE ERROR
  2965. EDMA0 BIT 0CAH ;IEN1.2 - DMA CHANNEL REQUEST 0
  2966. EGSTV BIT 0CBH ;IEN1.3 - GSC TRANSMIT VALID
  2967. EDMA1 BIT 0CCH ;IEN1.4 - DMA CHANNEL REQUEST 1
  2968. EGSTE BIT 0CDH ;IEN1.5 - GSC TRANSMIT ERROR
  2969. ************************************************************************
  2970. ************************************************************************
  2971. for the 80512/80532
  2972. IADC BIT 0C0H ;IRCON.0 - A/D CONVERTER INTERRUPT REQ
  2973. ************************************************************************
  2974. P BIT 0D0H ;PSW.0 - ACCUMULATOR PARITY FLAG
  2975. ************************************************************************
  2976. for the 83C552/80C552
  2977. F1 BIT 0D1H ;PSW.1 - FLAG 1
  2978. ************************************************************************
  2979. ************************************************************************
  2980. for the 80512/80532
  2981. F1 BIT 0D1H ;PSW.1 - FLAG 1
  2982. MX0 BIT 0D8H ;ADCON.0 - ANALOG INPUT CH SELECT BIT 0
  2983. MX1 BIT 0D9H ;ADCON.1 - ANALOG INPUT CH SELECT BIT 1
  2984. MX2 BIT 0DAH ;ADCON.2 - ANALOG INPUT CH SELECT BIT 2
  2985. ADM BIT 0DBH ;ADCON.3 - A/D CONVERSION MODE
  2986. BSY BIT 0DCH ;ADCON.4 - BUSY FLAG
  2987. BD BIT 0DFH ;ADCON.7 - BAUD RATE ENABLE
  2988. ************************************************************************
  2989. OV BIT 0D2H ;PSW.2 - OVERFLOW FLAG
  2990. RS0 BIT 0D3H ;PSW.3 - REGISTER BANK SELECT 0
  2991. B-15
  2992. RS1 BIT 0D4H ;PSW.4 - REGISTER BANK SELECT 1
  2993. F0 BIT 0D5H ;PSW.5 - FLAG 0
  2994. AC BIT 0D6H ;PSW.6 - AUXILIARY CARRY FLAG
  2995. CY BIT 0D7H ;PSW.7 - CARRY FLAG
  2996. ************************************************************************
  2997. for the 80C51FA/83C51FA(83C252/80C252)
  2998. CCF0 BIT 0D8H ;CCON.0 -PCA MODULE 0 INTERRUPT FLAG
  2999. CCF1 BIT 0D9H ;CCON.1 -PCA MODULE 1 INTERRUPT FLAG
  3000. CCF2 BIT 0DAH ;CCON.2 -PCA MODULE 2 INTERRUPT FLAG
  3001. CCF3 BIT 0DBH ;CCON.3 -PCA MODULE 3 INTERRUPT FLAG
  3002. CCF4 BIT 0DCH ;CCON.4 -PCA MODULE 4 INTERRUPT FLAG
  3003. CR BIT 0DEH ;CCON.6 - COUNTER RUN
  3004. CF BIT 0DFH ;PCA COUNTER OVERFLOW FLAG
  3005. ************************************************************************
  3006. ************************************************************************
  3007. for the RUPI-44
  3008. SER BIT 0D8H ;NSNR.0 - RECEIVE SEQUENCE ERROR
  3009. NR0 BIT 0D9H ;NSNR.1 - RECEIVE SEQUENCE COUNTER-BIT 0
  3010. NR1 BIT 0DAH ;NSNR.2 - RECEIVE SEQUENCE COUNTER-BIT 1
  3011. NR2 BIT 0DBH ;NSNR.3 - RECEIVE SEQUENCE COUNTER-BIT 2
  3012. SES BIT 0DCH ;NSNR.4 - SEND SEQUENCE ERROR
  3013. NS0 BIT 0DDH ;NSNR.5 - SEND SEQUENCE COUNTER-BIT 0
  3014. NS1 BIT 0DEH ;NSNR.6 - SEND SEQUENCE COUNTER-BIT 1
  3015. NS2 BIT 0DFH ;NSNR.7 - SEND SEQUENCE COUNTER-BIT 2
  3016. ************************************************************************
  3017. ************************************************************************
  3018. for the 80515/80535
  3019. MX0 BIT 0D8H ;ADCON.0 - ANALOG INPUT CH SELECT BIT 0
  3020. MX1 BIT 0D9H ;ADCON.1 - ANALOG INPUT CH SELECT BIT 1
  3021. MX2 BIT 0DAH ;ADCON.2 - ANALOG INPUT CH SELECT BIT 2
  3022. ADM BIT 0DBH ;ADCON.3 - A/D CONVERSION MODE
  3023. BSY BIT 0DCH ;ADCON.4 - BUSY FLAG
  3024. CLK BIT 0DEH ;ADCON.5 - SYSTEM CLOCK ENABLE
  3025. BD BIT 0DFH ;ADCON.7 - BAUD RATE ENABLE
  3026. ************************************************************************
  3027. ************************************************************************
  3028. for the 80C652/83C652
  3029. CR0 BIT 0D8H ;S1CON.0 - CLOCK RATE 0
  3030. CR1 BIT 0D9H ;S1CON.1 - CLOCK RATE 1
  3031. AA BIT 0DAH ;S1CON.2 - ASSERT ACKNOWLEDGE
  3032. SI BIT 0DBH ;S1CON.3 - SIO1 INTERRUPT BIT
  3033. STO BIT 0DCH ;S1CON.4 - STOP FLAG
  3034. STA BIT 0DDH ;S1CON.5 - START FLAG
  3035. ENS1 BIT 0DEH ;S1CON.6 - ENABLE SIO1
  3036. ************************************************************************
  3037. B-16
  3038. ************************************************************************
  3039. for the 83C152/80C152
  3040. DMA BIT 0D8H ;TSTAT.0 - DMA SELECT
  3041. TEN BIT 0D9H ;TSTAT.1 - TRANSMIT ENABLE
  3042. TFNF BIT 0DAH ;TSTAT.2 - TRANSMIT FIFO NOT FULL
  3043. TDN BIT 0DBH ;TSTAT.3 - TRANSMIT DONE
  3044. TCDT BIT 0DCH ;TSTAT.4 - TRANSMIT COLLISION DETECT
  3045. UR BIT 0DDH ;TSTAT.5 - UNDERRUN
  3046. NOACK BIT 0DEH ;TSTAT.6 - NO ACKNOWLEDGE
  3047. LNI BIT 0DFH ;TSTAT.7 - LINE IDLE
  3048. HBAEN BIT 0E8H ;RSTAT.0 - HARDWARE BASED ACKNOWLEDGE EN
  3049. GREN BIT 0E9H ;RSTAT.1 - RECEIVER ENABLE
  3050. RFNE BIT 0EAH ;RSTAT.2 - RECEIVER FIFO NOT EMPTY
  3051. RDN BIT 0EBH ;RSTAT.3 - RECEIVER DONE
  3052. CRCE BIT 0ECH ;RSTAT.4 - CRC ERROR
  3053. AE BIT 0EDH ;RSTAT.5 - ALIGNMENT ERROR
  3054. RCABT BIT 0EEH ;RSTAT.6 - RCVR COLLISION/ABORT DETECT
  3055. OR BIT 0EFH ;RSTAT.7 - OVERRUN
  3056. PGSRV BIT 0F8H ;IPN1.0 - GSC RECEIVE VALID
  3057. PGSRE BIT 0F9H ;IPN1.1 - GSC RECEIVE ERROR
  3058. PDMA0 BIT 0FAH ;IPN1.2 - DMA CHANNEL REQUEST 0
  3059. PGSTV BIT 0FBH ;IPN1.3 - GSC TRANSMIT VALID
  3060. PDMA1 BIT 0FCH ;IPN1.4 - DMA CHANNEL REQUEST 1
  3061. PGSTE BIT 0FDH ;IPN1.5 - GSC TRANSMIT ERROR
  3062. ************************************************************************
  3063. ************************************************************************
  3064. for the 80C452/83C452
  3065. OFRS BIT 0E8H ;SLCON.0 - OUTPUT FIFO CH REQ SERVICE
  3066. IFRS BIT 0E9H ;SLCON.1 - INPUT FIFO CH REQ SERVICE
  3067. FRZ BIT 0EBH ;SLCON.3 - ENABLE FIFO DMA FREEZE MODE
  3068. ICOI BIT 0ECH ;SLCON.4 - GEN INT WHEN IMMEDIATE COMMAN
  3069. OUT REGISTER IS AVAILABLE
  3070. ICII BIT 0EDH ;SLCON.5 - GEN INT WHEN A COMMAND IS
  3071. WRITTEN TO IMMEDIATE COMMAND IN REG
  3072. OFI BIT 0EEH ;SLCON.6 - ENABLE OUTPUT FIFO INTERRUPT
  3073. IFI BIT 0EFH ;SLCON.7 - ENABLE INPUT FIFO INTERRUPT
  3074. EFIFO BIT 0F8H ;IEP.0 - FIFO SLAVE BUS I/F INT EN
  3075. PDMA1 BIT 0F9H ;IEP.1 - DMA CHANNEL REQUEST 1
  3076. PDMA0 BIT 0FAH ;IEP.2 - DMA CHANNEL REQUEST 0
  3077. EDMA1 BIT 0FBH ;IEP.3 - DMA CHANNEL 1 INTERRUPT ENABLE
  3078. EDMA0 BIT 0FCH ;IEP.4 - DMA CHANNEL 0 INTERRUPT ENABLE
  3079. PFIFO BIT 0FDH ;IEP.5 - FIFO SLAVE BUS I/F INT PRIORITY
  3080. ************************************************************************
  3081. ************************************************************************
  3082. for the 80C451/83C451
  3083. IBF BIT 0E8H ;CSR.0 - INPUT BUFFER FULL
  3084. OBF BIT 0E9H ;CSR.1 - OUTPUT BUFFER FULL
  3085. IDSM BIT 0EAH ;CSR.2 - INPUT DATA STROBE
  3086. OBFC BIT 0EBH ;CSR.3 - OUTPUT BUFFER FLAG CLEAR
  3087. MA0 BIT 0ECH ;CSR.4 - AFLAG MODE SELECT
  3088. MA1 BIT 0EDH ;CSR.5 - AFLAG MODE SELECT
  3089. MB0 BIT 0EEH ;CSR.6 - BFLAG MODE SELECT
  3090. MB1 BIT 0EFH ;CSR.7 - BFLAG MODE SELECT
  3091. ************************************************************************
  3092. ************************************************************************
  3093. B-17
  3094. for the 83C751/83C752
  3095. CTO BIT(READ) 0D8H ;I2CFG.0 - CLOCK TIMING 0
  3096. CT1 BIT(READ) 0D9H ;I2CFG.1 - CLOCK TIMING 1
  3097. T1RUN BIT(READ) 0DCH ;I2CFG.4 - START/STOP TIMER 1
  3098. MASTRQ BIT(READ) 0DEH ;I2CFG.6 - MASTER I2C
  3099. SLAVEN BIT(READ) 0DFH ;I2CFG.7 - SLAVE I2C
  3100. CT0 BIT(WRITE)0D8H ;I2CFG.0 - CLOCK TIMING 0
  3101. CT1 BIT(WRITE)0D9H ;I2CFG.1 - CLOCK TIMING 1
  3102. TIRUN BIT(WRITE)0DCH ;I2CFG.4 - START/STOP TIMER 1
  3103. CLRTI BIT(WRITE)0DDH ;I2CFG.5 - CLEAR TIMER 1 INTERRUPT FLAG
  3104. MASTRQ BIT(WRITE)0DEH ;I2CFG.6 - MASTER I2C
  3105. SLAVEN BIT(WRITE)0DFH ;I2CFG.7 - SLAVE I2C
  3106. RSTP BIT(READ) 0F8H ;I2STA.0 - XMIT STOP CONDITION
  3107. RSTR BIT(READ) 0F9H ;I2STA.1 - XMIT REPEAT STOP COND.
  3108. MAKSTP BIT(READ) 0FAH ;I2STA.2 - STOP CONDITION
  3109. MAKSTR BIT(READ) 0FBH ;I2STA.3 - START CONDITION
  3110. XACTV BIT(READ) 0FCH ;I2STA.4 - XMIT ACTIVE
  3111. XDATA BIT(READ) 0FDH ;I2STA.5 - CONTENT OF XMIT BUFFER
  3112. RIDLE BIT(READ) 0FEH ;I2STA.6 - SLAVE IDLE FLAG
  3113. ************************************************************************
  3114. ************************************************************************
  3115. for the 83C552/80C552
  3116. CR0 BIT 0D8H ;S1CON.0 - CLOCK RATE 0
  3117. CR1 BIT 0D9H ;S1CON.1 - CLOCK RATE 1
  3118. AA BIT 0DAH ;S1CON.2 - ASSERT ACKNOWLEDGE
  3119. SI BIT 0DBH ;S1CON.3 - SERIAL I/O INTERRUPT
  3120. STO BIT 0DCH ;S1CON.4 - STOP FLAG
  3121. STA BIT 0DDH ;S1CON.5 - START FLAG
  3122. ENS1 BIT 0DEH ;S1CON.6 - ENABLE SERIAL I/O
  3123. ECT0 BIT 0E8H ;IEN1.0 - ENABLE T2 CAPTURE 0
  3124. ECT1 BIT 0E9H ;IEN1.1 - ENABLE T2 CAPTURE 1
  3125. ECT2 BIT 0EAH ;IEN1.2 - ENABLE T2 CAPTURE 2
  3126. ECT3 BIT 0EBH ;IEN1.3 - ENABLE T2 CAPTURE 3
  3127. ECM0 BIT 0ECH ;IEN1.4 - ENABLE T2 COMPARATOR 0
  3128. ECM1 BIT 0EDH ;IEN1.5 - ENABLE T2 COMPARATOR 1
  3129. ECM2 BIT 0EEH ;IEN1.6 - ENABLE T2 COMPARATOR 2
  3130. ET2 BIT 0EFH ;IEN1.7 - ENABLE T2 OVERFLOW
  3131. PCT0 BIT 0F8H ;IP1.0 - T2 CAPTURE REGISTER 0
  3132. PCT1 BIT 0F9H ;IP1.1 - T2 CAPTURE REGISTER 1
  3133. PCT2 BIT 0FAH ;IP1.2 - T2 CAPTURE REGISTER 2
  3134. PCT3 BIT 0FBH ;IP1.3 - T2 CAPTURE REGISTER 3
  3135. PCM0 BIT 0FCH ;IP1.4 - T2 COMPARATOR 0
  3136. PCM1 BIT 0FDH ;IP1.5 - T2 COMPARATOR 1
  3137. PCM2 BIT 0FEH ;IP1.6 - T2 COMPARATOR 2
  3138. PT2 BIT 0FFH ;IP1.7 - T2 OVERFLOW
  3139. ************************************************************************
  3140. B-18
  3141. ************************************************************************
  3142. for the 80C517/80C537
  3143. F1 BIT 0D1H ;PSW.1 - FLAG 1
  3144. MX0 BIT 0D8H ;ADCON0.0 - ANALOG INPUT CH SELECT BIT 0
  3145. MX1 BIT 0D9H ;ADCON0.1 - ANALOG INPUT CH SELECT BIT 1
  3146. MX2 BIT 0DAH ;ADCON0.2 - ANALOG INPUT CH SELECT BIT 2
  3147. ADM BIT 0DBH ;ADCON0.3 - A/D CONVERSION MODE
  3148. BSY BIT 0DCH ;ADCON0.4 - BUSY FLAG
  3149. CLK BIT 0DEH ;ADCON0.5 - SYSTEM CLOCK ENABLE
  3150. BD BIT 0DFH ;ADCON0.7 - BAUD RATE ENABLE
  3151. ************************************************************************
  3152. ************************************************************************
  3153. for the 80C154/83C154
  3154. ALF BIT 0F8H ;IOCON.0 - CPU POWER DOWN MODE CONTROL
  3155. P1F BIT 0F9H ;IOCON.1 - PORT 1 HIGH IMPEDANCE
  3156. P2F BIT 0FAH ;IOCON.2 - PORT 2 HIGH IMPEDANCE
  3157. P3F BIT 0FBH ;IOCON.3 - PORT 3 HIGH IMPEDANCE
  3158. IZC BIT 0FCH ;IOCON.4 - 10K TO 100 K OHM SWITCH (P1-3)
  3159. SERR BIT 0FDH ;IOCON.5 - SERIAL PORT RCV ERROR FLAG
  3160. T32 BIT 0FEH ;IOCON.6 - 32 BIT TIMER SWITCH
  3161. WDT BIT 0FFH ;IOCON.7 - WATCHDOG TIMER CONTROL
  3162. *************************************************************************
  3163. B-19
  3164. APPENDIX C
  3165. RESERVED SYMBOLS
  3166. The following is a list of reserved symbols used by the Cross
  3167. Assembler. These symbols cannot be redefined.
  3168. A AB ACALL ADD
  3169. ADDC AJMP AND ANL
  3170. AR0 AR1 AR2 AR3
  3171. AR4 AR5 AR6 AR7
  3172. BIT BSEG C CALL
  3173. CJNE CLR CODE CPL
  3174. CSEG DA DATA DB
  3175. DBIT DEC DIV DJNZ
  3176. DPTR DS DSEG DW
  3177. END EQ EQU GE
  3178. GT HIGH IDATA INC
  3179. ISEG JB JBC JC
  3180. JMP JNB JNC JNZ
  3181. JZ LCALL LE LJMP
  3182. LOW LT MOD MOV
  3183. MOVC MOVX MUL NE
  3184. NOP NOT OR ORG
  3185. ORL PC POP PUSH
  3186. R0 R1 R2 R3
  3187. R4 R5 R6 R7
  3188. RET RETI RL RLC
  3189. RR RRC SET SETB
  3190. SHL SHR SJMP SUBB
  3191. SWAP USING XCH XCHD
  3192. XDATA XOR XRL XSEG
  3193. C-1
  3194. APPENDIX D
  3195. CROSS ASSEMBLER CHARACTER SET
  3196. ---------------------------+----------------+-------------------
  3197. | PRINTABLE | ASCII CODE
  3198. CHARACTER NAME | FORM | HEX | DECIMAL
  3199. ---------------------------+----------------+---------+----------
  3200. Horizontal Tab | | 09 | 9
  3201. Line Feed | | 0A | 10
  3202. Carriage Return | | 0D | 13
  3203. Space | | 20 | 32
  3204. Exclamation Point | ! | 21 | 33
  3205. Pound Sign | # | 23 | 35
  3206. Dollar Sign | $ | 24 | 36
  3207. Percent Sign | % | 25 | 37
  3208. Ampersand | & | 26 | 38
  3209. Apostrophe | ' | 27 | 39
  3210. Left Parenthesis | ( | 28 | 40
  3211. Right Parenthesis | ) | 29 | 41
  3212. Asterisk | * | 2A | 42
  3213. Plus sign | + | 2B | 43
  3214. Comma | , | 2C | 44
  3215. Hyphen | - | 2D | 45
  3216. Period | . | 2E | 46
  3217. Slash | / | 2F | 47
  3218. Number 0 | 0 | 30 | 48
  3219. " 1 | 1 | 31 | 49
  3220. " 2 | 2 | 32 | 50
  3221. " 3 | 3 | 33 | 51
  3222. " 4 | 4 | 34 | 52
  3223. " 5 | 5 | 35 | 53
  3224. " 6 | 6 | 36 | 54
  3225. " 7 | 7 | 37 | 55
  3226. " 8 | 8 | 38 | 56
  3227. " 9 | 9 | 39 | 57
  3228. Colon | : | 3A | 58
  3229. Semi-colon | ; | 3B | 59
  3230. Left Angle Bracket | < | 3C | 60
  3231. Equal Sign | = | 3D | 61
  3232. Right Angle Bracket | > | 3E | 62
  3233. Question Mark | ? | 3F | 63
  3234. At Sign | @ | 40 | 64
  3235. Upper Case A | A | 41 | 65
  3236. " " B | B | 42 | 66
  3237. " " C | C | 43 | 67
  3238. " " D | D | 44 | 68
  3239. " " E | E | 45 | 69
  3240. " " F | F | 46 | 70
  3241. " " G | G | 47 | 71
  3242. " " H | H | 48 | 72
  3243. D-1
  3244. ---------------------------+----------------+-------------------
  3245. | PRINTABLE | ASCII CODE
  3246. CHARACTER NAME | FORM | HEX | DECIMAL
  3247. ---------------------------+----------------+---------+----------
  3248. Upper Case I | I | 49 | 73
  3249. " " J | J | 4A | 74
  3250. " " K | K | 4B | 75
  3251. " " L | L | 4C | 76
  3252. " " M | M | 4D | 77
  3253. " " N | N | 4E | 78
  3254. " " O | O | 4F | 79
  3255. " " P | P | 50 | 80
  3256. " " Q | Q | 51 | 81
  3257. " " R | R | 52 | 82
  3258. " " S | S | 53 | 83
  3259. " " T | T | 54 | 84
  3260. " " U | U | 55 | 85
  3261. " " V | V | 56 | 86
  3262. " " W | W | 57 | 87
  3263. " " X | X | 58 | 88
  3264. " " Y | Y | 59 | 89
  3265. " " Z | Z | 5A | 90
  3266. Underscore | _ | 5F | 95
  3267. Lower Case A | a | 61 | 97
  3268. " " B | b | 62 | 98
  3269. " " C | c | 63 | 99
  3270. " " D | d | 64 | 100
  3271. " " E | e | 65 | 101
  3272. " " F | f | 66 | 102
  3273. " " G | g | 67 | 103
  3274. " " H | h | 68 | 104
  3275. " " I | i | 69 | 105
  3276. " " J | j | 6A | 106
  3277. " " K | k | 6B | 107
  3278. " " L | l | 6C | 108
  3279. " " M | m | 6D | 109
  3280. " " N | n | 6E | 110
  3281. " " O | o | 6F | 111
  3282. " " P | p | 70 | 112
  3283. " " Q | q | 71 | 113
  3284. " " R | r | 72 | 114
  3285. " " S | s | 73 | 115
  3286. " " T | t | 74 | 116
  3287. " " U | u | 75 | 117
  3288. " " V | v | 76 | 118
  3289. " " W | w | 77 | 119
  3290. " " X | x | 78 | 120
  3291. " " Y | y | 79 | 121
  3292. " " Z | z | 7A | 122
  3293. D-2
  3294. INDEX
  3295. A
  3296. ASCII Literals, 2-6
  3297. Assembler
  3298. Comments, 2-6
  3299. Control Description ($), 6-1
  3300. Controls, 2-3
  3301. Directives, 2-3
  3302. Error codes/messages, 8-1
  3303. Labels, 2-2
  3304. Location Counter, 2-7
  3305. Numbers, 2-7
  3306. Operators, 2-7
  3307. Running it, 3-1
  3308. Symbols, 2-1
  3309. Syntax Summary, 2-7
  3310. B
  3311. Bit Addressing, 2-6
  3312. C
  3313. Character Set, D-1
  3314. Comments, 2-6
  3315. Control Description ($)
  3316. DATE, 6-1
  3317. DEBUG, 6-2
  3318. EJECT, 6-2
  3319. INCLUDE, 6-2
  3320. LIST, 6-3
  3321. MOD152, 6-3
  3322. MOD154, 6-3
  3323. MOD252, 6-3
  3324. MOD44, 6-3
  3325. MOD451, 6-3
  3326. MOD452, 6-3
  3327. MOD51, 6-3
  3328. MOD512, 6-3
  3329. MOD515, 6-3
  3330. MOD517, 6-3
  3331. MOD52, 6-3
  3332. MOD521, 6-3
  3333. MOD552, 6-3
  3334. MOD652, 6-3
  3335. MOD751, 6-3
  3336. MOD752, 6-3
  3337. MOD851, 6-3
  3338. NODEBUG, 6-2
  3339. NOLIST, 6-3
  3340. NOMOD, 6-3
  3341. NOOBJECT, 6-5
  3342. NOPAGING, 6-5
  3343. NOPRINT, 6-6
  3344. NOSYMBOLS, 6-6
  3345. OBJECT, 6-5
  3346. 1
  3347. PAGELENGTH, 6-5
  3348. PAGEWIDTH, 6-6
  3349. PAGING, 6-5
  3350. PRINT, 6-6
  3351. SYMBOLS, 6-6
  3352. TITLE, 6-7
  3353. Controls
  3354. Description, 6-1
  3355. Introduction, 2-3, 6-1
  3356. D
  3357. Directive
  3358. Assembler, 2-3
  3359. Conditional Assembly, 5-8
  3360. Introduction, 5-1
  3361. Memory Reservation, 5-5
  3362. Miscellaneous, 5-7
  3363. Segment Selection, 5-4
  3364. Storage, 5-5
  3365. Symbol, 5-1
  3366. Directives
  3367. BIT, 5-2
  3368. BSEG, 5-4
  3369. CODE, 5-2
  3370. CSEG, 5-4
  3371. DATA, 5-3
  3372. DB, 5-5
  3373. DBIT, 5-5
  3374. DS, 5-5
  3375. DSEG, 5-4
  3376. DW, 5-6
  3377. ELSE, 5-8
  3378. END, 5-8
  3379. ENDIF, 5-8
  3380. EQU, 5-1
  3381. IDATA, 5-3
  3382. IF, 5-8
  3383. ISEG, 5-4
  3384. ORG, 5-7
  3385. SET, 5-1
  3386. XDATA, 5-3
  3387. XSEG, 5-4
  3388. E
  3389. Error Codes
  3390. Explainations, 8-2
  3391. Introduction, 8-1
  3392. Numerical Listing, 8-2
  3393. Executing
  3394. Assembler, 3-1
  3395. Assembler Example, 3-3
  3396. 2
  3397. F
  3398. File
  3399. ASM51 Cross Assembler Diskette, 3-1
  3400. Object, 2-11
  3401. Source Listing, 2-10
  3402. Source Listing Sample, A-4
  3403. H
  3404. Hardware
  3405. Requirements, 3-1
  3406. I
  3407. Instruction
  3408. BYT, 4-3
  3409. CYC, 4-3
  3410. Dest/Source ADDR Mode, 4-2
  3411. HEX Opcode, 4-3
  3412. Language Form, 4-2
  3413. Mnemonics, 2-4, 4-1
  3414. Notation, 4-1
  3415. Operation, 4-1
  3416. PSW, 4-3
  3417. Set, 4-4
  3418. Introduction
  3419. Controls, 6-1
  3420. Cross Assembler, 2-1
  3421. Directives, 5-1
  3422. Error codes/messages, 8-1
  3423. Macro Processor, 7-1
  3424. L
  3425. Labels, 2-2
  3426. Location Counter, 2-7
  3427. M
  3428. Macro
  3429. Definition, 7-1
  3430. Special Operators, 7-4
  3431. Using, Labels, 7-6
  3432. Using, Nesting, 7-4
  3433. Using them, 7-4
  3434. Macro Processor
  3435. Introduction, 7-1
  3436. Microcontroller
  3437. Architecture MCS-51, 1-2
  3438. Background MCS-51, 1-1
  3439. Supported, 1-4
  3440. Mnemonics
  3441. MCS-51, 2-4
  3442. Notations, 4-1
  3443. Summary, 4-4
  3444. 3
  3445. N
  3446. Numbers, 2-7
  3447. O
  3448. Operators, 2-7
  3449. Overview
  3450. Cross Assembler, 2-1
  3451. Symbols, 2-1
  3452. P
  3453. Program Sample, A-1
  3454. R
  3455. Reserved Symbols, 2-2
  3456. S
  3457. Sample program, A-1
  3458. Symbols
  3459. Directive Definition, 5-1
  3460. Labels, 2-2
  3461. Overview, 2-1
  3462. Reserved, 2-2
  3463. Reserved list, C-1
  3464. Syntax Summary, 2-7
  3465. System
  3466. DOS hints, 3-3
  3467. 4