board_f.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <bootstage.h>
  14. #include <clock_legacy.h>
  15. #include <console.h>
  16. #include <cpu.h>
  17. #include <cpu_func.h>
  18. #include <dm.h>
  19. #include <env.h>
  20. #include <env_internal.h>
  21. #include <fdtdec.h>
  22. #include <fs.h>
  23. #include <hang.h>
  24. #include <i2c.h>
  25. #include <init.h>
  26. #include <initcall.h>
  27. #include <lcd.h>
  28. #include <log.h>
  29. #include <malloc.h>
  30. #include <mapmem.h>
  31. #include <os.h>
  32. #include <post.h>
  33. #include <relocate.h>
  34. #include <serial.h>
  35. #ifdef CONFIG_SPL
  36. #include <spl.h>
  37. #endif
  38. #include <status_led.h>
  39. #include <sysreset.h>
  40. #include <timer.h>
  41. #include <trace.h>
  42. #include <video.h>
  43. #include <watchdog.h>
  44. #include <asm/cache.h>
  45. #ifdef CONFIG_MACH_TYPE
  46. #include <asm/mach-types.h>
  47. #endif
  48. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  49. #include <asm/mp.h>
  50. #endif
  51. #include <asm/io.h>
  52. #include <asm/sections.h>
  53. #include <dm/root.h>
  54. #include <linux/errno.h>
  55. /*
  56. * Pointer to initial global data area
  57. *
  58. * Here we initialize it if needed.
  59. */
  60. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  61. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  62. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  63. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  64. #else
  65. DECLARE_GLOBAL_DATA_PTR;
  66. #endif
  67. /*
  68. * TODO(sjg@chromium.org): IMO this code should be
  69. * refactored to a single function, something like:
  70. *
  71. * void led_set_state(enum led_colour_t colour, int on);
  72. */
  73. /************************************************************************
  74. * Coloured LED functionality
  75. ************************************************************************
  76. * May be supplied by boards if desired
  77. */
  78. __weak void coloured_LED_init(void) {}
  79. __weak void red_led_on(void) {}
  80. __weak void red_led_off(void) {}
  81. __weak void green_led_on(void) {}
  82. __weak void green_led_off(void) {}
  83. __weak void yellow_led_on(void) {}
  84. __weak void yellow_led_off(void) {}
  85. __weak void blue_led_on(void) {}
  86. __weak void blue_led_off(void) {}
  87. /*
  88. * Why is gd allocated a register? Prior to reloc it might be better to
  89. * just pass it around to each function in this file?
  90. *
  91. * After reloc one could argue that it is hardly used and doesn't need
  92. * to be in a register. Or if it is it should perhaps hold pointers to all
  93. * global data for all modules, so that post-reloc we can avoid the massive
  94. * literal pool we get on ARM. Or perhaps just encourage each module to use
  95. * a structure...
  96. */
  97. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  98. static int init_func_watchdog_init(void)
  99. {
  100. # if defined(CONFIG_HW_WATCHDOG) && \
  101. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  102. defined(CONFIG_SH) || \
  103. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  104. defined(CONFIG_IMX_WATCHDOG))
  105. hw_watchdog_init();
  106. puts(" Watchdog enabled\n");
  107. # endif
  108. WATCHDOG_RESET();
  109. return 0;
  110. }
  111. int init_func_watchdog_reset(void)
  112. {
  113. WATCHDOG_RESET();
  114. return 0;
  115. }
  116. #endif /* CONFIG_WATCHDOG */
  117. __weak void board_add_ram_info(int use_default)
  118. {
  119. /* please define platform specific board_add_ram_info() */
  120. }
  121. static int init_baud_rate(void)
  122. {
  123. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  124. return 0;
  125. }
  126. static int display_text_info(void)
  127. {
  128. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  129. ulong bss_start, bss_end, text_base;
  130. bss_start = (ulong)&__bss_start;
  131. bss_end = (ulong)&__bss_end;
  132. #ifdef CONFIG_SYS_TEXT_BASE
  133. text_base = CONFIG_SYS_TEXT_BASE;
  134. #else
  135. text_base = CONFIG_SYS_MONITOR_BASE;
  136. #endif
  137. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  138. text_base, bss_start, bss_end);
  139. #endif
  140. return 0;
  141. }
  142. #ifdef CONFIG_SYSRESET
  143. static int print_resetinfo(void)
  144. {
  145. struct udevice *dev;
  146. char status[256];
  147. int ret;
  148. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  149. if (ret) {
  150. debug("%s: No sysreset device found (error: %d)\n",
  151. __func__, ret);
  152. /* Not all boards have sysreset drivers available during early
  153. * boot, so don't fail if one can't be found.
  154. */
  155. return 0;
  156. }
  157. if (!sysreset_get_status(dev, status, sizeof(status)))
  158. printf("%s", status);
  159. return 0;
  160. }
  161. #endif
  162. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  163. static int print_cpuinfo(void)
  164. {
  165. struct udevice *dev;
  166. char desc[512];
  167. int ret;
  168. dev = cpu_get_current_dev();
  169. if (!dev) {
  170. debug("%s: Could not get CPU device\n",
  171. __func__);
  172. return -ENODEV;
  173. }
  174. ret = cpu_get_desc(dev, desc, sizeof(desc));
  175. if (ret) {
  176. debug("%s: Could not get CPU description (err = %d)\n",
  177. dev->name, ret);
  178. return ret;
  179. }
  180. printf("CPU: %s\n", desc);
  181. return 0;
  182. }
  183. #endif
  184. static int announce_dram_init(void)
  185. {
  186. puts("DRAM: ");
  187. return 0;
  188. }
  189. static int show_dram_config(void)
  190. {
  191. unsigned long long size;
  192. #ifdef CONFIG_NR_DRAM_BANKS
  193. int i;
  194. debug("\nRAM Configuration:\n");
  195. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  196. size += gd->bd->bi_dram[i].size;
  197. debug("Bank #%d: %llx ", i,
  198. (unsigned long long)(gd->bd->bi_dram[i].start));
  199. #ifdef DEBUG
  200. print_size(gd->bd->bi_dram[i].size, "\n");
  201. #endif
  202. }
  203. debug("\nDRAM: ");
  204. #else
  205. size = gd->ram_size;
  206. #endif
  207. print_size(size, "");
  208. board_add_ram_info(0);
  209. putc('\n');
  210. return 0;
  211. }
  212. __weak int dram_init_banksize(void)
  213. {
  214. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  215. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  216. gd->bd->bi_dram[0].size = get_effective_memsize();
  217. #endif
  218. return 0;
  219. }
  220. #if defined(CONFIG_SYS_I2C)
  221. static int init_func_i2c(void)
  222. {
  223. puts("I2C: ");
  224. i2c_init_all();
  225. puts("ready\n");
  226. return 0;
  227. }
  228. #endif
  229. #if defined(CONFIG_VID)
  230. __weak int init_func_vid(void)
  231. {
  232. return 0;
  233. }
  234. #endif
  235. static int setup_mon_len(void)
  236. {
  237. #if defined(__ARM__) || defined(__MICROBLAZE__)
  238. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  239. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  240. gd->mon_len = (ulong)&_end - (ulong)_init;
  241. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  242. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  243. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  244. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  245. #elif defined(CONFIG_SYS_MONITOR_BASE)
  246. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  247. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  248. #endif
  249. return 0;
  250. }
  251. static int setup_spl_handoff(void)
  252. {
  253. #if CONFIG_IS_ENABLED(HANDOFF)
  254. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  255. sizeof(struct spl_handoff));
  256. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  257. #endif
  258. return 0;
  259. }
  260. __weak int arch_cpu_init(void)
  261. {
  262. return 0;
  263. }
  264. __weak int mach_cpu_init(void)
  265. {
  266. return 0;
  267. }
  268. /* Get the top of usable RAM */
  269. __weak ulong board_get_usable_ram_top(ulong total_size)
  270. {
  271. #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
  272. /*
  273. * Detect whether we have so much RAM that it goes past the end of our
  274. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  275. */
  276. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  277. /*
  278. * Will wrap back to top of 32-bit space when reservations
  279. * are made.
  280. */
  281. return 0;
  282. #endif
  283. return gd->ram_top;
  284. }
  285. static int setup_dest_addr(void)
  286. {
  287. debug("Monitor len: %08lX\n", gd->mon_len);
  288. /*
  289. * Ram is setup, size stored in gd !!
  290. */
  291. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  292. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  293. /*
  294. * Subtract specified amount of memory to hide so that it won't
  295. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  296. * the Linux kernel should now get passed the now "corrected"
  297. * memory size and won't touch it either. This should work
  298. * for arch/ppc and arch/powerpc. Only Linux board ports in
  299. * arch/powerpc with bootwrapper support, that recalculate the
  300. * memory size from the SDRAM controller setup will have to
  301. * get fixed.
  302. */
  303. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  304. #endif
  305. #ifdef CONFIG_SYS_SDRAM_BASE
  306. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  307. #endif
  308. gd->ram_top = gd->ram_base + get_effective_memsize();
  309. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  310. gd->relocaddr = gd->ram_top;
  311. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  312. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  313. /*
  314. * We need to make sure the location we intend to put secondary core
  315. * boot code is reserved and not used by any part of u-boot
  316. */
  317. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  318. gd->relocaddr = determine_mp_bootpg(NULL);
  319. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  320. }
  321. #endif
  322. return 0;
  323. }
  324. #ifdef CONFIG_PRAM
  325. /* reserve protected RAM */
  326. static int reserve_pram(void)
  327. {
  328. ulong reg;
  329. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  330. gd->relocaddr -= (reg << 10); /* size is in kB */
  331. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  332. gd->relocaddr);
  333. return 0;
  334. }
  335. #endif /* CONFIG_PRAM */
  336. /* Round memory pointer down to next 4 kB limit */
  337. static int reserve_round_4k(void)
  338. {
  339. gd->relocaddr &= ~(4096 - 1);
  340. return 0;
  341. }
  342. __weak int arch_reserve_mmu(void)
  343. {
  344. return 0;
  345. }
  346. static int reserve_video(void)
  347. {
  348. #ifdef CONFIG_DM_VIDEO
  349. ulong addr;
  350. int ret;
  351. addr = gd->relocaddr;
  352. ret = video_reserve(&addr);
  353. if (ret)
  354. return ret;
  355. gd->relocaddr = addr;
  356. #elif defined(CONFIG_LCD)
  357. # ifdef CONFIG_FB_ADDR
  358. gd->fb_base = CONFIG_FB_ADDR;
  359. # else
  360. /* reserve memory for LCD display (always full pages) */
  361. gd->relocaddr = lcd_setmem(gd->relocaddr);
  362. gd->fb_base = gd->relocaddr;
  363. # endif /* CONFIG_FB_ADDR */
  364. #endif
  365. return 0;
  366. }
  367. static int reserve_trace(void)
  368. {
  369. #ifdef CONFIG_TRACE
  370. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  371. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  372. debug("Reserving %luk for trace data at: %08lx\n",
  373. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  374. #endif
  375. return 0;
  376. }
  377. static int reserve_uboot(void)
  378. {
  379. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  380. /*
  381. * reserve memory for U-Boot code, data & bss
  382. * round down to next 4 kB limit
  383. */
  384. gd->relocaddr -= gd->mon_len;
  385. gd->relocaddr &= ~(4096 - 1);
  386. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  387. /* round down to next 64 kB limit so that IVPR stays aligned */
  388. gd->relocaddr &= ~(65536 - 1);
  389. #endif
  390. debug("Reserving %ldk for U-Boot at: %08lx\n",
  391. gd->mon_len >> 10, gd->relocaddr);
  392. }
  393. gd->start_addr_sp = gd->relocaddr;
  394. return 0;
  395. }
  396. /*
  397. * reserve after start_addr_sp the requested size and make the stack pointer
  398. * 16-byte aligned, this alignment is needed for cast on the reserved memory
  399. * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
  400. * = ARMv8 Instruction Set Overview: quad word, 16 bytes
  401. */
  402. static unsigned long reserve_stack_aligned(size_t size)
  403. {
  404. return ALIGN_DOWN(gd->start_addr_sp - size, 16);
  405. }
  406. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  407. static int reserve_noncached(void)
  408. {
  409. /*
  410. * The value of gd->start_addr_sp must match the value of malloc_start
  411. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  412. * board_r.c:mem_malloc_init() and then used by
  413. * cache.c:noncached_init()
  414. *
  415. * These calculations must match the code in cache.c:noncached_init()
  416. */
  417. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  418. MMU_SECTION_SIZE;
  419. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  420. MMU_SECTION_SIZE);
  421. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  422. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  423. return 0;
  424. }
  425. #endif
  426. /* reserve memory for malloc() area */
  427. static int reserve_malloc(void)
  428. {
  429. gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
  430. debug("Reserving %dk for malloc() at: %08lx\n",
  431. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  432. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  433. reserve_noncached();
  434. #endif
  435. return 0;
  436. }
  437. /* (permanently) allocate a Board Info struct */
  438. static int reserve_board(void)
  439. {
  440. if (!gd->bd) {
  441. gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
  442. gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
  443. sizeof(struct bd_info));
  444. memset(gd->bd, '\0', sizeof(struct bd_info));
  445. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  446. sizeof(struct bd_info), gd->start_addr_sp);
  447. }
  448. return 0;
  449. }
  450. static int setup_machine(void)
  451. {
  452. #ifdef CONFIG_MACH_TYPE
  453. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  454. #endif
  455. return 0;
  456. }
  457. static int reserve_global_data(void)
  458. {
  459. gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
  460. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  461. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  462. sizeof(gd_t), gd->start_addr_sp);
  463. return 0;
  464. }
  465. static int reserve_fdt(void)
  466. {
  467. #ifndef CONFIG_OF_EMBED
  468. /*
  469. * If the device tree is sitting immediately above our image then we
  470. * must relocate it. If it is embedded in the data section, then it
  471. * will be relocated with other data.
  472. */
  473. if (gd->fdt_blob) {
  474. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
  475. gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
  476. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  477. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  478. gd->fdt_size, gd->start_addr_sp);
  479. }
  480. #endif
  481. return 0;
  482. }
  483. static int reserve_bootstage(void)
  484. {
  485. #ifdef CONFIG_BOOTSTAGE
  486. int size = bootstage_get_size();
  487. gd->start_addr_sp = reserve_stack_aligned(size);
  488. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  489. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  490. gd->start_addr_sp);
  491. #endif
  492. return 0;
  493. }
  494. __weak int arch_reserve_stacks(void)
  495. {
  496. return 0;
  497. }
  498. static int reserve_stacks(void)
  499. {
  500. /* make stack pointer 16-byte aligned */
  501. gd->start_addr_sp = reserve_stack_aligned(16);
  502. /*
  503. * let the architecture-specific code tailor gd->start_addr_sp and
  504. * gd->irq_sp
  505. */
  506. return arch_reserve_stacks();
  507. }
  508. static int reserve_bloblist(void)
  509. {
  510. #ifdef CONFIG_BLOBLIST
  511. gd->start_addr_sp = reserve_stack_aligned(CONFIG_BLOBLIST_SIZE);
  512. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  513. #endif
  514. return 0;
  515. }
  516. static int display_new_sp(void)
  517. {
  518. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  519. return 0;
  520. }
  521. __weak int arch_setup_bdinfo(void)
  522. {
  523. return 0;
  524. }
  525. int setup_bdinfo(void)
  526. {
  527. struct bd_info *bd = gd->bd;
  528. bd->bi_memstart = gd->ram_base; /* start of memory */
  529. bd->bi_memsize = gd->ram_size; /* size in bytes */
  530. if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
  531. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  532. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  533. }
  534. return arch_setup_bdinfo();
  535. }
  536. #ifdef CONFIG_POST
  537. static int init_post(void)
  538. {
  539. post_bootmode_init();
  540. post_run(NULL, POST_ROM | post_bootmode_get(0));
  541. return 0;
  542. }
  543. #endif
  544. static int reloc_fdt(void)
  545. {
  546. #ifndef CONFIG_OF_EMBED
  547. if (gd->flags & GD_FLG_SKIP_RELOC)
  548. return 0;
  549. if (gd->new_fdt) {
  550. memcpy(gd->new_fdt, gd->fdt_blob, fdt_totalsize(gd->fdt_blob));
  551. gd->fdt_blob = gd->new_fdt;
  552. }
  553. #endif
  554. return 0;
  555. }
  556. static int reloc_bootstage(void)
  557. {
  558. #ifdef CONFIG_BOOTSTAGE
  559. if (gd->flags & GD_FLG_SKIP_RELOC)
  560. return 0;
  561. if (gd->new_bootstage) {
  562. int size = bootstage_get_size();
  563. debug("Copying bootstage from %p to %p, size %x\n",
  564. gd->bootstage, gd->new_bootstage, size);
  565. memcpy(gd->new_bootstage, gd->bootstage, size);
  566. gd->bootstage = gd->new_bootstage;
  567. bootstage_relocate();
  568. }
  569. #endif
  570. return 0;
  571. }
  572. static int reloc_bloblist(void)
  573. {
  574. #ifdef CONFIG_BLOBLIST
  575. if (gd->flags & GD_FLG_SKIP_RELOC)
  576. return 0;
  577. if (gd->new_bloblist) {
  578. int size = CONFIG_BLOBLIST_SIZE;
  579. debug("Copying bloblist from %p to %p, size %x\n",
  580. gd->bloblist, gd->new_bloblist, size);
  581. memcpy(gd->new_bloblist, gd->bloblist, size);
  582. gd->bloblist = gd->new_bloblist;
  583. }
  584. #endif
  585. return 0;
  586. }
  587. static int setup_reloc(void)
  588. {
  589. if (gd->flags & GD_FLG_SKIP_RELOC) {
  590. debug("Skipping relocation due to flag\n");
  591. return 0;
  592. }
  593. #ifdef CONFIG_SYS_TEXT_BASE
  594. #ifdef ARM
  595. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  596. #elif defined(CONFIG_M68K)
  597. /*
  598. * On all ColdFire arch cpu, monitor code starts always
  599. * just after the default vector table location, so at 0x400
  600. */
  601. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  602. #elif !defined(CONFIG_SANDBOX)
  603. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  604. #endif
  605. #endif
  606. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  607. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  608. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  609. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  610. gd->start_addr_sp);
  611. return 0;
  612. }
  613. #ifdef CONFIG_OF_BOARD_FIXUP
  614. static int fix_fdt(void)
  615. {
  616. return board_fix_fdt((void *)gd->fdt_blob);
  617. }
  618. #endif
  619. /* ARM calls relocate_code from its crt0.S */
  620. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  621. !CONFIG_IS_ENABLED(X86_64)
  622. static int jump_to_copy(void)
  623. {
  624. if (gd->flags & GD_FLG_SKIP_RELOC)
  625. return 0;
  626. /*
  627. * x86 is special, but in a nice way. It uses a trampoline which
  628. * enables the dcache if possible.
  629. *
  630. * For now, other archs use relocate_code(), which is implemented
  631. * similarly for all archs. When we do generic relocation, hopefully
  632. * we can make all archs enable the dcache prior to relocation.
  633. */
  634. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  635. /*
  636. * SDRAM and console are now initialised. The final stack can now
  637. * be setup in SDRAM. Code execution will continue in Flash, but
  638. * with the stack in SDRAM and Global Data in temporary memory
  639. * (CPU cache)
  640. */
  641. arch_setup_gd(gd->new_gd);
  642. board_init_f_r_trampoline(gd->start_addr_sp);
  643. #else
  644. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  645. #endif
  646. return 0;
  647. }
  648. #endif
  649. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  650. static int initf_bootstage(void)
  651. {
  652. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  653. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  654. int ret;
  655. ret = bootstage_init(!from_spl);
  656. if (ret)
  657. return ret;
  658. if (from_spl) {
  659. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  660. CONFIG_BOOTSTAGE_STASH_SIZE);
  661. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  662. if (ret && ret != -ENOENT) {
  663. debug("Failed to unstash bootstage: err=%d\n", ret);
  664. return ret;
  665. }
  666. }
  667. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  668. return 0;
  669. }
  670. static int initf_console_record(void)
  671. {
  672. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  673. return console_record_init();
  674. #else
  675. return 0;
  676. #endif
  677. }
  678. static int initf_dm(void)
  679. {
  680. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  681. int ret;
  682. bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
  683. ret = dm_init_and_scan(true);
  684. bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
  685. if (ret)
  686. return ret;
  687. #endif
  688. #ifdef CONFIG_TIMER_EARLY
  689. ret = dm_timer_init();
  690. if (ret)
  691. return ret;
  692. #endif
  693. return 0;
  694. }
  695. /* Architecture-specific memory reservation */
  696. __weak int reserve_arch(void)
  697. {
  698. return 0;
  699. }
  700. __weak int arch_cpu_init_dm(void)
  701. {
  702. return 0;
  703. }
  704. __weak int checkcpu(void)
  705. {
  706. return 0;
  707. }
  708. __weak int clear_bss(void)
  709. {
  710. return 0;
  711. }
  712. static const init_fnc_t init_sequence_f[] = {
  713. setup_mon_len,
  714. #ifdef CONFIG_OF_CONTROL
  715. fdtdec_setup,
  716. #endif
  717. #ifdef CONFIG_TRACE_EARLY
  718. trace_early_init,
  719. #endif
  720. initf_malloc,
  721. log_init,
  722. initf_bootstage, /* uses its own timer, so does not need DM */
  723. #ifdef CONFIG_BLOBLIST
  724. bloblist_init,
  725. #endif
  726. setup_spl_handoff,
  727. initf_console_record,
  728. #if defined(CONFIG_HAVE_FSP)
  729. arch_fsp_init,
  730. #endif
  731. arch_cpu_init, /* basic arch cpu dependent setup */
  732. mach_cpu_init, /* SoC/machine dependent CPU setup */
  733. initf_dm,
  734. arch_cpu_init_dm,
  735. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  736. board_early_init_f,
  737. #endif
  738. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  739. /* get CPU and bus clocks according to the environment variable */
  740. get_clocks, /* get CPU and bus clocks (etc.) */
  741. #endif
  742. #if !defined(CONFIG_M68K)
  743. timer_init, /* initialize timer */
  744. #endif
  745. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  746. board_postclk_init,
  747. #endif
  748. env_init, /* initialize environment */
  749. init_baud_rate, /* initialze baudrate settings */
  750. serial_init, /* serial communications setup */
  751. console_init_f, /* stage 1 init of console */
  752. display_options, /* say that we are here */
  753. display_text_info, /* show debugging info if required */
  754. checkcpu,
  755. #if defined(CONFIG_SYSRESET)
  756. print_resetinfo,
  757. #endif
  758. #if defined(CONFIG_DISPLAY_CPUINFO)
  759. print_cpuinfo, /* display cpu info (and speed) */
  760. #endif
  761. #if defined(CONFIG_DTB_RESELECT)
  762. embedded_dtb_select,
  763. #endif
  764. #if defined(CONFIG_DISPLAY_BOARDINFO)
  765. show_board_info,
  766. #endif
  767. INIT_FUNC_WATCHDOG_INIT
  768. #if defined(CONFIG_MISC_INIT_F)
  769. misc_init_f,
  770. #endif
  771. INIT_FUNC_WATCHDOG_RESET
  772. #if defined(CONFIG_SYS_I2C)
  773. init_func_i2c,
  774. #endif
  775. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  776. init_func_vid,
  777. #endif
  778. announce_dram_init,
  779. dram_init, /* configure available RAM banks */
  780. #ifdef CONFIG_POST
  781. post_init_f,
  782. #endif
  783. INIT_FUNC_WATCHDOG_RESET
  784. #if defined(CONFIG_SYS_DRAM_TEST)
  785. testdram,
  786. #endif /* CONFIG_SYS_DRAM_TEST */
  787. INIT_FUNC_WATCHDOG_RESET
  788. #ifdef CONFIG_POST
  789. init_post,
  790. #endif
  791. INIT_FUNC_WATCHDOG_RESET
  792. /*
  793. * Now that we have DRAM mapped and working, we can
  794. * relocate the code and continue running from DRAM.
  795. *
  796. * Reserve memory at end of RAM for (top down in that order):
  797. * - area that won't get touched by U-Boot and Linux (optional)
  798. * - kernel log buffer
  799. * - protected RAM
  800. * - LCD framebuffer
  801. * - monitor code
  802. * - board info struct
  803. */
  804. setup_dest_addr,
  805. #ifdef CONFIG_OF_BOARD_FIXUP
  806. fix_fdt,
  807. #endif
  808. #ifdef CONFIG_PRAM
  809. reserve_pram,
  810. #endif
  811. reserve_round_4k,
  812. arch_reserve_mmu,
  813. reserve_video,
  814. reserve_trace,
  815. reserve_uboot,
  816. reserve_malloc,
  817. reserve_board,
  818. setup_machine,
  819. reserve_global_data,
  820. reserve_fdt,
  821. reserve_bootstage,
  822. reserve_bloblist,
  823. reserve_arch,
  824. reserve_stacks,
  825. dram_init_banksize,
  826. show_dram_config,
  827. INIT_FUNC_WATCHDOG_RESET
  828. setup_bdinfo,
  829. display_new_sp,
  830. INIT_FUNC_WATCHDOG_RESET
  831. reloc_fdt,
  832. reloc_bootstage,
  833. reloc_bloblist,
  834. setup_reloc,
  835. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  836. copy_uboot_to_ram,
  837. do_elf_reloc_fixups,
  838. #endif
  839. clear_bss,
  840. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  841. !CONFIG_IS_ENABLED(X86_64)
  842. jump_to_copy,
  843. #endif
  844. NULL,
  845. };
  846. void board_init_f(ulong boot_flags)
  847. {
  848. gd->flags = boot_flags;
  849. gd->have_console = 0;
  850. if (initcall_run_list(init_sequence_f))
  851. hang();
  852. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  853. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  854. !defined(CONFIG_ARC)
  855. /* NOTREACHED - jump_to_copy() does not return */
  856. hang();
  857. #endif
  858. }
  859. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  860. /*
  861. * For now this code is only used on x86.
  862. *
  863. * init_sequence_f_r is the list of init functions which are run when
  864. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  865. * The following limitations must be considered when implementing an
  866. * '_f_r' function:
  867. * - 'static' variables are read-only
  868. * - Global Data (gd->xxx) is read/write
  869. *
  870. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  871. * supported). It _should_, if possible, copy global data to RAM and
  872. * initialise the CPU caches (to speed up the relocation process)
  873. *
  874. * NOTE: At present only x86 uses this route, but it is intended that
  875. * all archs will move to this when generic relocation is implemented.
  876. */
  877. static const init_fnc_t init_sequence_f_r[] = {
  878. #if !CONFIG_IS_ENABLED(X86_64)
  879. init_cache_f_r,
  880. #endif
  881. NULL,
  882. };
  883. void board_init_f_r(void)
  884. {
  885. if (initcall_run_list(init_sequence_f_r))
  886. hang();
  887. /*
  888. * The pre-relocation drivers may be using memory that has now gone
  889. * away. Mark serial as unavailable - this will fall back to the debug
  890. * UART if available.
  891. *
  892. * Do the same with log drivers since the memory may not be available.
  893. */
  894. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  895. #ifdef CONFIG_TIMER
  896. gd->timer = NULL;
  897. #endif
  898. /*
  899. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  900. * Transfer execution from Flash to RAM by calculating the address
  901. * of the in-RAM copy of board_init_r() and calling it
  902. */
  903. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  904. /* NOTREACHED - board_init_r() does not return */
  905. hang();
  906. }
  907. #endif /* CONFIG_X86 */