i2c.h 27 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  4. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001
  8. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  9. *
  10. * The original I2C interface was
  11. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  13. * but has been changed substantially.
  14. */
  15. #ifndef _I2C_H_
  16. #define _I2C_H_
  17. #include <linker_lists.h>
  18. /*
  19. * For now there are essentially two parts to this file - driver model
  20. * here at the top, and the older code below (with CONFIG_SYS_I2C being
  21. * most recent). The plan is to migrate everything to driver model.
  22. * The driver model structures and API are separate as they are different
  23. * enough as to be incompatible for compilation purposes.
  24. */
  25. enum dm_i2c_chip_flags {
  26. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  27. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  28. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  29. };
  30. /** enum i2c_speed_mode - standard I2C speed modes */
  31. enum i2c_speed_mode {
  32. IC_SPEED_MODE_STANDARD,
  33. IC_SPEED_MODE_FAST,
  34. IC_SPEED_MODE_FAST_PLUS,
  35. IC_SPEED_MODE_HIGH,
  36. IC_SPEED_MODE_FAST_ULTRA,
  37. IC_SPEED_MODE_COUNT,
  38. };
  39. /** enum i2c_speed_rate - standard I2C speeds in Hz */
  40. enum i2c_speed_rate {
  41. I2C_SPEED_STANDARD_RATE = 100000,
  42. I2C_SPEED_FAST_RATE = 400000,
  43. I2C_SPEED_FAST_PLUS_RATE = 1000000,
  44. I2C_SPEED_HIGH_RATE = 3400000,
  45. I2C_SPEED_FAST_ULTRA_RATE = 5000000,
  46. };
  47. /** enum i2c_address_mode - available address modes */
  48. enum i2c_address_mode {
  49. I2C_MODE_7_BIT,
  50. I2C_MODE_10_BIT
  51. };
  52. struct udevice;
  53. /**
  54. * struct dm_i2c_chip - information about an i2c chip
  55. *
  56. * An I2C chip is a device on the I2C bus. It sits at a particular address
  57. * and normally supports 7-bit or 10-bit addressing.
  58. *
  59. * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
  60. * the chip to examine.
  61. *
  62. * @chip_addr: Chip address on bus
  63. * @offset_len: Length of offset in bytes. A single byte offset can
  64. * represent up to 256 bytes. A value larger than 1 may be
  65. * needed for larger devices.
  66. * @flags: Flags for this chip (dm_i2c_chip_flags)
  67. * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
  68. * devices which steal addresses as part of offset.
  69. * If offset_len is zero, then the offset is encoded
  70. * completely within the chip address itself.
  71. * e.g. a devce with chip address of 0x2c with 512
  72. * registers might use the bottom bit of the address
  73. * to indicate which half of the address space is being
  74. * accessed while still only using 1 byte offset.
  75. * This means it will respond to chip address 0x2c and
  76. * 0x2d.
  77. * A real world example is the Atmel AT24C04. It's
  78. * datasheet explains it's usage of this addressing
  79. * mode.
  80. * @emul: Emulator for this chip address (only used for emulation)
  81. */
  82. struct dm_i2c_chip {
  83. uint chip_addr;
  84. uint offset_len;
  85. uint flags;
  86. uint chip_addr_offset_mask;
  87. #ifdef CONFIG_SANDBOX
  88. struct udevice *emul;
  89. bool test_mode;
  90. #endif
  91. };
  92. /**
  93. * struct dm_i2c_bus- information about an i2c bus
  94. *
  95. * An I2C bus contains 0 or more chips on it, each at its own address. The
  96. * bus can operate at different speeds (measured in Hz, typically 100KHz
  97. * or 400KHz).
  98. *
  99. * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
  100. * I2C bus udevice.
  101. *
  102. * @speed_hz: Bus speed in hertz (typically 100000)
  103. * @max_transaction_bytes: Maximal size of single I2C transfer
  104. */
  105. struct dm_i2c_bus {
  106. int speed_hz;
  107. int max_transaction_bytes;
  108. };
  109. /*
  110. * Not all of these flags are implemented in the U-Boot API
  111. */
  112. enum dm_i2c_msg_flags {
  113. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  114. I2C_M_RD = 0x0001, /* read data, from slave to master */
  115. I2C_M_STOP = 0x8000, /* send stop after this message */
  116. I2C_M_NOSTART = 0x4000, /* no start before this message */
  117. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  118. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  119. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  120. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  121. };
  122. /**
  123. * struct i2c_msg - an I2C message
  124. *
  125. * @addr: Slave address
  126. * @flags: Flags (see enum dm_i2c_msg_flags)
  127. * @len: Length of buffer in bytes, may be 0 for a probe
  128. * @buf: Buffer to send/receive, or NULL if no data
  129. */
  130. struct i2c_msg {
  131. uint addr;
  132. uint flags;
  133. uint len;
  134. u8 *buf;
  135. };
  136. /**
  137. * struct i2c_msg_list - a list of I2C messages
  138. *
  139. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  140. * appropriate in U-Boot.
  141. *
  142. * @msg: Pointer to i2c_msg array
  143. * @nmsgs: Number of elements in the array
  144. */
  145. struct i2c_msg_list {
  146. struct i2c_msg *msgs;
  147. uint nmsgs;
  148. };
  149. /**
  150. * dm_i2c_read() - read bytes from an I2C chip
  151. *
  152. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  153. * can use i2c_get_chip(). To obtain a bus by bus number use
  154. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  155. *
  156. * To set the address length of a devce use i2c_set_addr_len(). It
  157. * defaults to 1.
  158. *
  159. * @dev: Chip to read from
  160. * @offset: Offset within chip to start reading
  161. * @buffer: Place to put data
  162. * @len: Number of bytes to read
  163. *
  164. * @return 0 on success, -ve on failure
  165. */
  166. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  167. /**
  168. * dm_i2c_write() - write bytes to an I2C chip
  169. *
  170. * See notes for dm_i2c_read() above.
  171. *
  172. * @dev: Chip to write to
  173. * @offset: Offset within chip to start writing
  174. * @buffer: Buffer containing data to write
  175. * @len: Number of bytes to write
  176. *
  177. * @return 0 on success, -ve on failure
  178. */
  179. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  180. int len);
  181. /**
  182. * dm_i2c_probe() - probe a particular chip address
  183. *
  184. * This can be useful to check for the existence of a chip on the bus.
  185. * It is typically implemented by writing the chip address to the bus
  186. * and checking that the chip replies with an ACK.
  187. *
  188. * @bus: Bus to probe
  189. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  190. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  191. * @devp: Returns the device found, or NULL if none
  192. * @return 0 if a chip was found at that address, -ve if not
  193. */
  194. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  195. struct udevice **devp);
  196. /**
  197. * dm_i2c_reg_read() - Read a value from an I2C register
  198. *
  199. * This reads a single value from the given address in an I2C chip
  200. *
  201. * @dev: Device to use for transfer
  202. * @addr: Address to read from
  203. * @return value read, or -ve on error
  204. */
  205. int dm_i2c_reg_read(struct udevice *dev, uint offset);
  206. /**
  207. * dm_i2c_reg_write() - Write a value to an I2C register
  208. *
  209. * This writes a single value to the given address in an I2C chip
  210. *
  211. * @dev: Device to use for transfer
  212. * @addr: Address to write to
  213. * @val: Value to write (normally a byte)
  214. * @return 0 on success, -ve on error
  215. */
  216. int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
  217. /**
  218. * dm_i2c_xfer() - Transfer messages over I2C
  219. *
  220. * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
  221. * instead.
  222. *
  223. * @dev: Device to use for transfer
  224. * @msg: List of messages to transfer
  225. * @nmsgs: Number of messages to transfer
  226. * @return 0 on success, -ve on error
  227. */
  228. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
  229. /**
  230. * dm_i2c_set_bus_speed() - set the speed of a bus
  231. *
  232. * @bus: Bus to adjust
  233. * @speed: Requested speed in Hz
  234. * @return 0 if OK, -EINVAL for invalid values
  235. */
  236. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  237. /**
  238. * dm_i2c_get_bus_speed() - get the speed of a bus
  239. *
  240. * @bus: Bus to check
  241. * @return speed of selected I2C bus in Hz, -ve on error
  242. */
  243. int dm_i2c_get_bus_speed(struct udevice *bus);
  244. /**
  245. * i2c_set_chip_flags() - set flags for a chip
  246. *
  247. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  248. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  249. *
  250. * @dev: Chip to adjust
  251. * @flags: New flags
  252. * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  253. */
  254. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  255. /**
  256. * i2c_get_chip_flags() - get flags for a chip
  257. *
  258. * @dev: Chip to check
  259. * @flagsp: Place to put flags
  260. * @return 0 if OK, other -ve value on error
  261. */
  262. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  263. /**
  264. * i2c_set_offset_len() - set the offset length for a chip
  265. *
  266. * The offset used to access a chip may be up to 4 bytes long. Typically it
  267. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  268. * registers. The default value is 1, but you can call this function to
  269. * change it.
  270. *
  271. * @offset_len: New offset length value (typically 1 or 2)
  272. */
  273. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  274. /**
  275. * i2c_get_offset_len() - get the offset length for a chip
  276. *
  277. * @return: Current offset length value (typically 1 or 2)
  278. */
  279. int i2c_get_chip_offset_len(struct udevice *dev);
  280. /**
  281. * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
  282. *
  283. * Some devices listen on multiple chip addresses to achieve larger offsets
  284. * than their single or multiple byte offsets would allow for. You can use this
  285. * function to set the bits that are valid to be used for offset overflow.
  286. *
  287. * @mask: The mask to be used for high offset bits within address
  288. * @return 0 if OK, other -ve value on error
  289. */
  290. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
  291. /*
  292. * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
  293. *
  294. * @return current chip addr offset mask
  295. */
  296. uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
  297. /**
  298. * i2c_deblock() - recover a bus that is in an unknown state
  299. *
  300. * See the deblock() method in 'struct dm_i2c_ops' for full information
  301. *
  302. * @bus: Bus to recover
  303. * @return 0 if OK, -ve on error
  304. */
  305. int i2c_deblock(struct udevice *bus);
  306. /**
  307. * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
  308. *
  309. * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
  310. * for deblocking the I2C bus.
  311. *
  312. * @sda_pin: SDA GPIO
  313. * @scl_pin: SCL GPIO
  314. * @scl_count: Number of SCL clock cycles generated to deblock SDA
  315. * @start_count:Number of I2C start conditions sent after deblocking SDA
  316. * @delay: Delay between SCL clock line changes
  317. * @return 0 if OK, -ve on error
  318. */
  319. struct gpio_desc;
  320. int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
  321. unsigned int scl_count, unsigned int start_count,
  322. unsigned int delay);
  323. /**
  324. * struct dm_i2c_ops - driver operations for I2C uclass
  325. *
  326. * Drivers should support these operations unless otherwise noted. These
  327. * operations are intended to be used by uclass code, not directly from
  328. * other code.
  329. */
  330. struct dm_i2c_ops {
  331. /**
  332. * xfer() - transfer a list of I2C messages
  333. *
  334. * @bus: Bus to read from
  335. * @msg: List of messages to transfer
  336. * @nmsgs: Number of messages in the list
  337. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  338. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  339. * flags cannot be supported, other -ve value on some other error
  340. */
  341. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  342. /**
  343. * probe_chip() - probe for the presense of a chip address
  344. *
  345. * This function is optional. If omitted, the uclass will send a zero
  346. * length message instead.
  347. *
  348. * @bus: Bus to probe
  349. * @chip_addr: Chip address to probe
  350. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  351. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  352. * to default probem other -ve value on error
  353. */
  354. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  355. /**
  356. * set_bus_speed() - set the speed of a bus (optional)
  357. *
  358. * The bus speed value will be updated by the uclass if this function
  359. * does not return an error. This method is optional - if it is not
  360. * provided then the driver can read the speed from
  361. * dev_get_uclass_priv(bus)->speed_hz
  362. *
  363. * @bus: Bus to adjust
  364. * @speed: Requested speed in Hz
  365. * @return 0 if OK, -EINVAL for invalid values
  366. */
  367. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  368. /**
  369. * get_bus_speed() - get the speed of a bus (optional)
  370. *
  371. * Normally this can be provided by the uclass, but if you want your
  372. * driver to check the bus speed by looking at the hardware, you can
  373. * implement that here. This method is optional. This method would
  374. * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
  375. *
  376. * @bus: Bus to check
  377. * @return speed of selected I2C bus in Hz, -ve on error
  378. */
  379. int (*get_bus_speed)(struct udevice *bus);
  380. /**
  381. * set_flags() - set the flags for a chip (optional)
  382. *
  383. * This is generally implemented by the uclass, but drivers can
  384. * check the value to ensure that unsupported options are not used.
  385. * This method is optional. If provided, this method will always be
  386. * called when the flags change.
  387. *
  388. * @dev: Chip to adjust
  389. * @flags: New flags value
  390. * @return 0 if OK, -EINVAL if value is unsupported
  391. */
  392. int (*set_flags)(struct udevice *dev, uint flags);
  393. /**
  394. * deblock() - recover a bus that is in an unknown state
  395. *
  396. * I2C is a synchronous protocol and resets of the processor in the
  397. * middle of an access can block the I2C Bus until a powerdown of
  398. * the full unit is done. This is because slaves can be stuck
  399. * waiting for addition bus transitions for a transaction that will
  400. * never complete. Resetting the I2C master does not help. The only
  401. * way is to force the bus through a series of transitions to make
  402. * sure that all slaves are done with the transaction. This method
  403. * performs this 'deblocking' if support by the driver.
  404. *
  405. * This method is optional.
  406. */
  407. int (*deblock)(struct udevice *bus);
  408. };
  409. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  410. /**
  411. * struct i2c_mux_ops - operations for an I2C mux
  412. *
  413. * The current mux state is expected to be stored in the mux itself since
  414. * it is the only thing that knows how to make things work. The mux can
  415. * record the current state and then avoid switching unless it is necessary.
  416. * So select() can be skipped if the mux is already in the correct state.
  417. * Also deselect() can be made a nop if required.
  418. */
  419. struct i2c_mux_ops {
  420. /**
  421. * select() - select one of of I2C buses attached to a mux
  422. *
  423. * This will be called when there is no bus currently selected by the
  424. * mux. This method does not need to deselect the old bus since
  425. * deselect() will be already have been called if necessary.
  426. *
  427. * @mux: Mux device
  428. * @bus: I2C bus to select
  429. * @channel: Channel number correponding to the bus to select
  430. * @return 0 if OK, -ve on error
  431. */
  432. int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
  433. /**
  434. * deselect() - select one of of I2C buses attached to a mux
  435. *
  436. * This is used to deselect the currently selected I2C bus.
  437. *
  438. * @mux: Mux device
  439. * @bus: I2C bus to deselect
  440. * @channel: Channel number correponding to the bus to deselect
  441. * @return 0 if OK, -ve on error
  442. */
  443. int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
  444. };
  445. #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
  446. /**
  447. * i2c_get_chip() - get a device to use to access a chip on a bus
  448. *
  449. * This returns the device for the given chip address. The device can then
  450. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  451. *
  452. * @bus: Bus to examine
  453. * @chip_addr: Chip address for the new device
  454. * @offset_len: Length of a register offset in bytes (normally 1)
  455. * @devp: Returns pointer to new device if found or -ENODEV if not
  456. * found
  457. */
  458. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  459. struct udevice **devp);
  460. /**
  461. * i2c_get_chip_for_busnum() - get a device to use to access a chip on
  462. * a bus number
  463. *
  464. * This returns the device for the given chip address on a particular bus
  465. * number.
  466. *
  467. * @busnum: Bus number to examine
  468. * @chip_addr: Chip address for the new device
  469. * @offset_len: Length of a register offset in bytes (normally 1)
  470. * @devp: Returns pointer to new device if found or -ENODEV if not
  471. * found
  472. */
  473. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  474. struct udevice **devp);
  475. /**
  476. * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
  477. *
  478. * This decodes the chip address from a device tree node and puts it into
  479. * its dm_i2c_chip structure. This should be called in your driver's
  480. * ofdata_to_platdata() method.
  481. *
  482. * @blob: Device tree blob
  483. * @node: Node offset to read from
  484. * @spi: Place to put the decoded information
  485. */
  486. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
  487. /**
  488. * i2c_dump_msgs() - Dump a list of I2C messages
  489. *
  490. * This may be useful for debugging.
  491. *
  492. * @msg: Message list to dump
  493. * @nmsgs: Number of messages
  494. */
  495. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
  496. /**
  497. * i2c_emul_find() - Find an emulator for an i2c sandbox device
  498. *
  499. * This looks at the device's 'emul' phandle
  500. *
  501. * @dev: Device to find an emulator for
  502. * @emulp: Returns the associated emulator, if found *
  503. * @return 0 if OK, -ENOENT or -ENODEV if not found
  504. */
  505. int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
  506. /**
  507. * i2c_emul_get_device() - Find the device being emulated
  508. *
  509. * Given an emulator this returns the associated device
  510. *
  511. * @emul: Emulator for the device
  512. * @return device that @emul is emulating
  513. */
  514. struct udevice *i2c_emul_get_device(struct udevice *emul);
  515. #ifndef CONFIG_DM_I2C
  516. /*
  517. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  518. *
  519. * The implementation MUST NOT use static or global variables if the
  520. * I2C routines are used to read SDRAM configuration information
  521. * because this is done before the memories are initialized. Limited
  522. * use of stack-based variables are OK (the initial stack size is
  523. * limited).
  524. *
  525. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  526. */
  527. /*
  528. * Configuration items.
  529. */
  530. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  531. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  532. /* no muxes used bus = i2c adapters */
  533. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  534. #define CONFIG_SYS_I2C_MAX_HOPS 0
  535. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  536. #else
  537. /* we use i2c muxes */
  538. #undef CONFIG_SYS_I2C_DIRECT_BUS
  539. #endif
  540. /* define the I2C bus number for RTC and DTT if not already done */
  541. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  542. #define CONFIG_SYS_RTC_BUS_NUM 0
  543. #endif
  544. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  545. #define CONFIG_SYS_SPD_BUS_NUM 0
  546. #endif
  547. struct i2c_adapter {
  548. void (*init)(struct i2c_adapter *adap, int speed,
  549. int slaveaddr);
  550. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  551. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  552. uint addr, int alen, uint8_t *buffer,
  553. int len);
  554. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  555. uint addr, int alen, uint8_t *buffer,
  556. int len);
  557. uint (*set_bus_speed)(struct i2c_adapter *adap,
  558. uint speed);
  559. int speed;
  560. int waitdelay;
  561. int slaveaddr;
  562. int init_done;
  563. int hwadapnr;
  564. char *name;
  565. };
  566. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  567. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  568. { \
  569. .init = _init, \
  570. .probe = _probe, \
  571. .read = _read, \
  572. .write = _write, \
  573. .set_bus_speed = _set_speed, \
  574. .speed = _speed, \
  575. .slaveaddr = _slaveaddr, \
  576. .init_done = 0, \
  577. .hwadapnr = _hwadapnr, \
  578. .name = #_name \
  579. };
  580. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  581. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  582. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  583. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  584. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  585. struct i2c_adapter *i2c_get_adapter(int index);
  586. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  587. struct i2c_mux {
  588. int id;
  589. char name[16];
  590. };
  591. struct i2c_next_hop {
  592. struct i2c_mux mux;
  593. uint8_t chip;
  594. uint8_t channel;
  595. };
  596. struct i2c_bus_hose {
  597. int adapter;
  598. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  599. };
  600. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  601. extern struct i2c_bus_hose i2c_bus[];
  602. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  603. #else
  604. #define I2C_ADAPTER(bus) bus
  605. #endif
  606. #define I2C_BUS gd->cur_i2c_bus
  607. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  608. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  609. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  610. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  611. #define I2C_MUX_PCA9540_ID 1
  612. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  613. #define I2C_MUX_PCA9542_ID 2
  614. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  615. #define I2C_MUX_PCA9544_ID 3
  616. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  617. #define I2C_MUX_PCA9547_ID 4
  618. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  619. #define I2C_MUX_PCA9548_ID 5
  620. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  621. #endif
  622. #ifndef I2C_SOFT_DECLARATIONS
  623. # if (defined(CONFIG_AT91RM9200) || \
  624. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  625. defined(CONFIG_AT91SAM9263))
  626. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  627. # else
  628. # define I2C_SOFT_DECLARATIONS
  629. # endif
  630. #endif
  631. /*
  632. * Many boards/controllers/drivers don't support an I2C slave interface so
  633. * provide a default slave address for them for use in common code. A real
  634. * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
  635. * support a slave interface.
  636. */
  637. #ifndef CONFIG_SYS_I2C_SLAVE
  638. #define CONFIG_SYS_I2C_SLAVE 0xfe
  639. #endif
  640. /*
  641. * Initialization, must be called once on start up, may be called
  642. * repeatedly to change the speed and slave addresses.
  643. */
  644. #ifdef CONFIG_SYS_I2C_EARLY_INIT
  645. void i2c_early_init_f(void);
  646. #endif
  647. void i2c_init(int speed, int slaveaddr);
  648. void i2c_init_board(void);
  649. #ifdef CONFIG_SYS_I2C
  650. /*
  651. * i2c_get_bus_num:
  652. *
  653. * Returns index of currently active I2C bus. Zero-based.
  654. */
  655. unsigned int i2c_get_bus_num(void);
  656. /*
  657. * i2c_set_bus_num:
  658. *
  659. * Change the active I2C bus. Subsequent read/write calls will
  660. * go to this one.
  661. *
  662. * bus - bus index, zero based
  663. *
  664. * Returns: 0 on success, not 0 on failure
  665. *
  666. */
  667. int i2c_set_bus_num(unsigned int bus);
  668. /*
  669. * i2c_init_all():
  670. *
  671. * Initializes all I2C adapters in the system. All i2c_adap structures must
  672. * be initialized beforehead with function pointers and data, including
  673. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  674. */
  675. void i2c_init_all(void);
  676. /*
  677. * Probe the given I2C chip address. Returns 0 if a chip responded,
  678. * not 0 on failure.
  679. */
  680. int i2c_probe(uint8_t chip);
  681. /*
  682. * Read/Write interface:
  683. * chip: I2C chip address, range 0..127
  684. * addr: Memory (register) address within the chip
  685. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  686. * memories, 0 for register type devices with only one
  687. * register)
  688. * buffer: Where to read/write the data
  689. * len: How many bytes to read/write
  690. *
  691. * Returns: 0 on success, not 0 on failure
  692. */
  693. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  694. uint8_t *buffer, int len);
  695. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  696. uint8_t *buffer, int len);
  697. /*
  698. * Utility routines to read/write registers.
  699. */
  700. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  701. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  702. /*
  703. * i2c_set_bus_speed:
  704. *
  705. * Change the speed of the active I2C bus
  706. *
  707. * speed - bus speed in Hz
  708. *
  709. * Returns: new bus speed
  710. *
  711. */
  712. unsigned int i2c_set_bus_speed(unsigned int speed);
  713. /*
  714. * i2c_get_bus_speed:
  715. *
  716. * Returns speed of currently active I2C bus in Hz
  717. */
  718. unsigned int i2c_get_bus_speed(void);
  719. #else
  720. /*
  721. * Probe the given I2C chip address. Returns 0 if a chip responded,
  722. * not 0 on failure.
  723. */
  724. int i2c_probe(uchar chip);
  725. /*
  726. * Read/Write interface:
  727. * chip: I2C chip address, range 0..127
  728. * addr: Memory (register) address within the chip
  729. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  730. * memories, 0 for register type devices with only one
  731. * register)
  732. * buffer: Where to read/write the data
  733. * len: How many bytes to read/write
  734. *
  735. * Returns: 0 on success, not 0 on failure
  736. */
  737. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  738. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  739. /*
  740. * Utility routines to read/write registers.
  741. */
  742. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  743. {
  744. u8 buf;
  745. #ifdef DEBUG
  746. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  747. #endif
  748. i2c_read(addr, reg, 1, &buf, 1);
  749. return buf;
  750. }
  751. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  752. {
  753. #ifdef DEBUG
  754. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  755. __func__, addr, reg, val);
  756. #endif
  757. i2c_write(addr, reg, 1, &val, 1);
  758. }
  759. /*
  760. * Functions for setting the current I2C bus and its speed
  761. */
  762. /*
  763. * i2c_set_bus_num:
  764. *
  765. * Change the active I2C bus. Subsequent read/write calls will
  766. * go to this one.
  767. *
  768. * bus - bus index, zero based
  769. *
  770. * Returns: 0 on success, not 0 on failure
  771. *
  772. */
  773. int i2c_set_bus_num(unsigned int bus);
  774. /*
  775. * i2c_get_bus_num:
  776. *
  777. * Returns index of currently active I2C bus. Zero-based.
  778. */
  779. unsigned int i2c_get_bus_num(void);
  780. /*
  781. * i2c_set_bus_speed:
  782. *
  783. * Change the speed of the active I2C bus
  784. *
  785. * speed - bus speed in Hz
  786. *
  787. * Returns: 0 on success, not 0 on failure
  788. *
  789. */
  790. int i2c_set_bus_speed(unsigned int);
  791. /*
  792. * i2c_get_bus_speed:
  793. *
  794. * Returns speed of currently active I2C bus in Hz
  795. */
  796. unsigned int i2c_get_bus_speed(void);
  797. #endif /* CONFIG_SYS_I2C */
  798. /*
  799. * only for backwardcompatibility, should go away if we switched
  800. * completely to new multibus support.
  801. */
  802. #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
  803. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  804. # define CONFIG_SYS_MAX_I2C_BUS 2
  805. # endif
  806. # define I2C_MULTI_BUS 1
  807. #else
  808. # define CONFIG_SYS_MAX_I2C_BUS 1
  809. # define I2C_MULTI_BUS 0
  810. #endif
  811. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  812. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  813. static inline unsigned int I2C_GET_BUS(void)
  814. {
  815. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  816. }
  817. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  818. static inline void I2C_SET_BUS(unsigned int bus)
  819. {
  820. if (I2C_MULTI_BUS)
  821. i2c_set_bus_num(bus);
  822. }
  823. /* Multi I2C definitions */
  824. enum {
  825. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  826. I2C_8, I2C_9, I2C_10,
  827. };
  828. /**
  829. * Get FDT values for i2c bus.
  830. *
  831. * @param blob Device tree blbo
  832. * @return the number of I2C bus
  833. */
  834. void board_i2c_init(const void *blob);
  835. /**
  836. * Find the I2C bus number by given a FDT I2C node.
  837. *
  838. * @param blob Device tree blbo
  839. * @param node FDT I2C node to find
  840. * @return the number of I2C bus (zero based), or -1 on error
  841. */
  842. int i2c_get_bus_num_fdt(int node);
  843. /**
  844. * Reset the I2C bus represented by the given a FDT I2C node.
  845. *
  846. * @param blob Device tree blbo
  847. * @param node FDT I2C node to find
  848. * @return 0 if port was reset, -1 if not found
  849. */
  850. int i2c_reset_port_fdt(const void *blob, int node);
  851. #endif /* !CONFIG_DM_I2C */
  852. #endif /* _I2C_H_ */