123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606 |
- #include <dt-bindings/clock/tegra124-car.h>
- #include <dt-bindings/gpio/tegra-gpio.h>
- #include <dt-bindings/pinctrl/pinctrl-tegra.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
- #include "skeleton.dtsi"
- / {
- compatible = "nvidia,tegra124";
- interrupt-parent = <&gic>;
- pcie-controller@01003000 {
- compatible = "nvidia,tegra124-pcie";
- device_type = "pci";
- reg = <0x01003000 0x00000800 /* PADS registers */
- 0x01003800 0x00000800 /* AFI registers */
- 0x02000000 0x10000000>; /* configuration space */
- reg-names = "pads", "afi", "cs";
- interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
- <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
- interrupt-names = "intr", "msi";
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
- bus-range = <0x00 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges = <0x82000000 0 0x01000000 0x01000000 0 0x00001000 /* port 0 configuration space */
- 0x82000000 0 0x01001000 0x01001000 0 0x00001000 /* port 1 configuration space */
- 0x81000000 0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */
- 0x82000000 0 0x13000000 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */
- 0xc2000000 0 0x20000000 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */
- clocks = <&tegra_car TEGRA124_CLK_PCIE>,
- <&tegra_car TEGRA124_CLK_AFI>,
- <&tegra_car TEGRA124_CLK_PLL_E>,
- <&tegra_car TEGRA124_CLK_CML0>;
- clock-names = "pex", "afi", "pll_e", "cml";
- resets = <&tegra_car 70>,
- <&tegra_car 72>,
- <&tegra_car 74>;
- reset-names = "pex", "afi", "pcie_x";
- status = "disabled";
- phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
- phy-names = "pcie";
- pci@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
- reg = <0x000800 0 0 0 0>;
- status = "disabled";
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- nvidia,num-lanes = <2>;
- };
- pci@2,0 {
- device_type = "pci";
- assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
- reg = <0x001000 0 0 0 0>;
- status = "disabled";
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- nvidia,num-lanes = <1>;
- };
- };
- host1x@50000000 {
- compatible = "nvidia,tegra124-host1x", "simple-bus";
- reg = <0x50000000 0x00034000>;
- interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
- <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
- clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
- resets = <&tegra_car 28>;
- reset-names = "host1x";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x54000000 0x54000000 0x01000000>;
- dc@54200000 {
- compatible = "nvidia,tegra124-dc";
- reg = <0x54200000 0x00040000>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_DISP1>,
- <&tegra_car TEGRA124_CLK_PLL_P>;
- clock-names = "dc", "parent";
- resets = <&tegra_car 27>;
- reset-names = "dc";
- nvidia,head = <0>;
- };
- dc@54240000 {
- compatible = "nvidia,tegra124-dc";
- reg = <0x54240000 0x00040000>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_DISP2>,
- <&tegra_car TEGRA124_CLK_PLL_P>;
- clock-names = "dc", "parent";
- resets = <&tegra_car 26>;
- reset-names = "dc";
- nvidia,head = <1>;
- };
- hdmi@54280000 {
- compatible = "nvidia,tegra124-hdmi";
- reg = <0x54280000 0x00040000>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_HDMI>,
- <&tegra_car TEGRA124_CLK_PLL_D2_OUT0>;
- clock-names = "hdmi", "parent";
- resets = <&tegra_car 51>;
- reset-names = "hdmi";
- status = "disabled";
- };
- sor@54540000 {
- compatible = "nvidia,tegra124-sor";
- reg = <0x54540000 0x00040000>;
- interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_SOR0>,
- <&tegra_car TEGRA124_CLK_PLL_D_OUT0>,
- <&tegra_car TEGRA124_CLK_PLL_DP>,
- <&tegra_car TEGRA124_CLK_CLK_M>;
- clock-names = "sor", "parent", "dp", "safe";
- resets = <&tegra_car 182>;
- reset-names = "sor";
- status = "disabled";
- };
- dpaux: dpaux@545c0000 {
- compatible = "nvidia,tegra124-dpaux";
- reg = <0x545c0000 0x00040000>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_DPAUX>,
- <&tegra_car TEGRA124_CLK_PLL_DP>;
- clock-names = "dpaux", "parent";
- resets = <&tegra_car 181>;
- reset-names = "dpaux";
- status = "disabled";
- };
- };
- gic: interrupt-controller@50041000 {
- compatible = "arm,cortex-a15-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0x50041000 0x1000>,
- <0x50042000 0x2000>,
- <0x50044000 0x2000>,
- <0x50046000 0x2000>;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- };
- tegra_car: clock@60006000 {
- compatible = "nvidia,tegra124-car";
- reg = <0x60006000 0x1000>;
- #clock-cells = <1>;
- };
- apbdma: dma@60020000 {
- compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
- reg = <0x60020000 0x1400>;
- interrupts = <0 104 0x04
- 0 105 0x04
- 0 106 0x04
- 0 107 0x04
- 0 108 0x04
- 0 109 0x04
- 0 110 0x04
- 0 111 0x04
- 0 112 0x04
- 0 113 0x04
- 0 114 0x04
- 0 115 0x04
- 0 116 0x04
- 0 117 0x04
- 0 118 0x04
- 0 119 0x04
- 0 128 0x04
- 0 129 0x04
- 0 130 0x04
- 0 131 0x04
- 0 132 0x04
- 0 133 0x04
- 0 134 0x04
- 0 135 0x04
- 0 136 0x04
- 0 137 0x04
- 0 138 0x04
- 0 139 0x04
- 0 140 0x04
- 0 141 0x04
- 0 142 0x04
- 0 143 0x04>;
- };
- gpio: gpio@6000d000 {
- compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
- reg = <0x6000d000 0x1000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- #interrupt-cells = <2>;
- interrupt-controller;
- };
- i2c@7000c000 {
- compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
- reg = <0x7000c000 0x100>;
- interrupts = <0 38 0x04>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 12>;
- status = "disabled";
- };
- i2c@7000c400 {
- compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
- reg = <0x7000c400 0x100>;
- interrupts = <0 84 0x04>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 54>;
- status = "disabled";
- };
- i2c@7000c500 {
- compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
- reg = <0x7000c500 0x100>;
- interrupts = <0 92 0x04>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 67>;
- status = "disabled";
- };
- i2c@7000c700 {
- compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
- reg = <0x7000c700 0x100>;
- interrupts = <0 120 0x04>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 103>;
- status = "disabled";
- };
- i2c@7000d000 {
- compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
- reg = <0x7000d000 0x100>;
- interrupts = <0 53 0x04>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 47>;
- status = "disabled";
- };
- i2c@7000d100 {
- compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
- reg = <0x7000d100 0x100>;
- interrupts = <0 53 0x04>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&tegra_car 47>;
- status = "disabled";
- };
- uarta: serial@70006000 {
- compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
- reg = <0x70006000 0x40>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_UARTA>;
- resets = <&tegra_car 6>;
- reset-names = "serial";
- dmas = <&apbdma 8>, <&apbdma 8>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- uartb: serial@70006040 {
- compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
- reg = <0x70006040 0x40>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_UARTB>;
- resets = <&tegra_car 7>;
- reset-names = "serial";
- dmas = <&apbdma 9>, <&apbdma 9>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- uartc: serial@70006200 {
- compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
- reg = <0x70006200 0x40>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_UARTC>;
- resets = <&tegra_car 55>;
- reset-names = "serial";
- dmas = <&apbdma 10>, <&apbdma 10>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- uartd: serial@70006300 {
- compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
- reg = <0x70006300 0x40>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_UARTD>;
- resets = <&tegra_car 65>;
- reset-names = "serial";
- dmas = <&apbdma 19>, <&apbdma 19>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- uarte: serial@70006400 {
- compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
- reg = <0x70006400 0x40>;
- reg-shift = <2>;
- interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_UARTE>;
- resets = <&tegra_car 66>;
- reset-names = "serial";
- dmas = <&apbdma 20>, <&apbdma 20>;
- dma-names = "rx", "tx";
- status = "disabled";
- };
- pwm: pwm@7000a000 {
- compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
- reg = <0x7000a000 0x100>;
- #pwm-cells = <2>;
- clocks = <&tegra_car TEGRA124_CLK_PWM>;
- resets = <&tegra_car 17>;
- reset-names = "pwm";
- status = "disabled";
- };
- spi@7000d400 {
- compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
- reg = <0x7000d400 0x200>;
- interrupts = <0 59 0x04>;
- nvidia,dma-request-selector = <&apbdma 15>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- clocks = <&tegra_car 41>;
- };
- spi@7000d600 {
- compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
- reg = <0x7000d600 0x200>;
- interrupts = <0 82 0x04>;
- nvidia,dma-request-selector = <&apbdma 16>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- clocks = <&tegra_car 44>;
- };
- spi@7000d800 {
- compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
- reg = <0x7000d800 0x200>;
- interrupts = <0 83 0x04>;
- nvidia,dma-request-selector = <&apbdma 17>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- clocks = <&tegra_car 46>;
- };
- spi@7000da00 {
- compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
- reg = <0x7000da00 0x200>;
- interrupts = <0 93 0x04>;
- nvidia,dma-request-selector = <&apbdma 18>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- clocks = <&tegra_car 68>;
- };
- spi@7000dc00 {
- compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
- reg = <0x7000dc00 0x200>;
- interrupts = <0 94 0x04>;
- nvidia,dma-request-selector = <&apbdma 27>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- clocks = <&tegra_car 104>;
- };
- spi@7000de00 {
- compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
- reg = <0x7000de00 0x200>;
- interrupts = <0 79 0x04>;
- nvidia,dma-request-selector = <&apbdma 28>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- clocks = <&tegra_car 105>;
- };
- pmc@7000e400 {
- compatible = "nvidia,tegra124-pmc";
- reg = <0x7000e400 0x400>;
- };
- padctl: padctl@7009f000 {
- compatible = "nvidia,tegra124-xusb-padctl";
- reg = <0x7009f000 0x1000>;
- resets = <&tegra_car 142>;
- reset-names = "padctl";
- #phy-cells = <1>;
- };
- sdhci@700b0000 {
- compatible = "nvidia,tegra124-sdhci";
- reg = <0x700b0000 0x200>;
- interrupts = <0 14 0x04>;
- clocks = <&tegra_car 14>;
- status = "disabled";
- };
- sdhci@700b0200 {
- compatible = "nvidia,tegra124-sdhci";
- reg = <0x700b0200 0x200>;
- interrupts = <0 15 0x04>;
- clocks = <&tegra_car 9>;
- status = "disabled";
- };
- sdhci@700b0400 {
- compatible = "nvidia,tegra124-sdhci";
- reg = <0x700b0400 0x200>;
- interrupts = <0 19 0x04>;
- clocks = <&tegra_car 69>;
- status = "disabled";
- };
- sdhci@700b0600 {
- compatible = "nvidia,tegra124-sdhci";
- reg = <0x700b0600 0x200>;
- interrupts = <0 31 0x04>;
- clocks = <&tegra_car 15>;
- status = "disabled";
- };
- ahub@70300000 {
- compatible = "nvidia,tegra124-ahub";
- reg = <0x70300000 0x200>,
- <0x70300800 0x800>,
- <0x70300200 0x600>;
- interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_D_AUDIO>,
- <&tegra_car TEGRA124_CLK_APBIF>;
- clock-names = "d_audio", "apbif";
- resets = <&tegra_car 106>, /* d_audio */
- <&tegra_car 107>, /* apbif */
- <&tegra_car 30>, /* i2s0 */
- <&tegra_car 11>, /* i2s1 */
- <&tegra_car 18>, /* i2s2 */
- <&tegra_car 101>, /* i2s3 */
- <&tegra_car 102>, /* i2s4 */
- <&tegra_car 108>, /* dam0 */
- <&tegra_car 109>, /* dam1 */
- <&tegra_car 110>, /* dam2 */
- <&tegra_car 10>, /* spdif */
- <&tegra_car 153>, /* amx */
- <&tegra_car 185>, /* amx1 */
- <&tegra_car 154>, /* adx */
- <&tegra_car 180>, /* adx1 */
- <&tegra_car 186>, /* afc0 */
- <&tegra_car 187>, /* afc1 */
- <&tegra_car 188>, /* afc2 */
- <&tegra_car 189>, /* afc3 */
- <&tegra_car 190>, /* afc4 */
- <&tegra_car 191>; /* afc5 */
- reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
- "i2s3", "i2s4", "dam0", "dam1", "dam2",
- "spdif", "amx", "amx1", "adx", "adx1",
- "afc0", "afc1", "afc2", "afc3", "afc4", "afc5";
- dmas = <&apbdma 1>, <&apbdma 1>,
- <&apbdma 2>, <&apbdma 2>,
- <&apbdma 3>, <&apbdma 3>,
- <&apbdma 4>, <&apbdma 4>,
- <&apbdma 6>, <&apbdma 6>,
- <&apbdma 7>, <&apbdma 7>,
- <&apbdma 12>, <&apbdma 12>,
- <&apbdma 13>, <&apbdma 13>,
- <&apbdma 14>, <&apbdma 14>,
- <&apbdma 29>, <&apbdma 29>;
- dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
- "rx3", "tx3", "rx4", "tx4", "rx5", "tx5",
- "rx6", "tx6", "rx7", "tx7", "rx8", "tx8",
- "rx9", "tx9";
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
- tegra_i2s0: i2s@70301000 {
- compatible = "nvidia,tegra124-i2s";
- reg = <0x70301000 0x100>;
- nvidia,ahub-cif-ids = <4 4>;
- clocks = <&tegra_car TEGRA124_CLK_I2S0>;
- resets = <&tegra_car 30>;
- reset-names = "i2s";
- status = "disabled";
- };
- tegra_i2s1: i2s@70301100 {
- compatible = "nvidia,tegra124-i2s";
- reg = <0x70301100 0x100>;
- nvidia,ahub-cif-ids = <5 5>;
- clocks = <&tegra_car TEGRA124_CLK_I2S1>;
- resets = <&tegra_car 11>;
- reset-names = "i2s";
- status = "disabled";
- };
- tegra_i2s2: i2s@70301200 {
- compatible = "nvidia,tegra124-i2s";
- reg = <0x70301200 0x100>;
- nvidia,ahub-cif-ids = <6 6>;
- clocks = <&tegra_car TEGRA124_CLK_I2S2>;
- resets = <&tegra_car 18>;
- reset-names = "i2s";
- status = "disabled";
- };
- tegra_i2s3: i2s@70301300 {
- compatible = "nvidia,tegra124-i2s";
- reg = <0x70301300 0x100>;
- nvidia,ahub-cif-ids = <7 7>;
- clocks = <&tegra_car TEGRA124_CLK_I2S3>;
- resets = <&tegra_car 101>;
- reset-names = "i2s";
- status = "disabled";
- };
- tegra_i2s4: i2s@70301400 {
- compatible = "nvidia,tegra124-i2s";
- reg = <0x70301400 0x100>;
- nvidia,ahub-cif-ids = <8 8>;
- clocks = <&tegra_car TEGRA124_CLK_I2S4>;
- resets = <&tegra_car 102>;
- reset-names = "i2s";
- status = "disabled";
- };
- };
- usb@7d000000 {
- compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
- reg = <0x7d000000 0x4000>;
- interrupts = < 52 >;
- phy_type = "utmi";
- clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */
- status = "disabled";
- };
- usb@7d004000 {
- compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
- reg = <0x7d004000 0x4000>;
- interrupts = < 53 >;
- phy_type = "hsic";
- clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */
- status = "disabled";
- };
- usb@7d008000 {
- compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
- reg = <0x7d008000 0x4000>;
- interrupts = < 129 >;
- phy_type = "utmi";
- clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */
- status = "disabled";
- };
- };
|