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- STMicroelectronics STM32 ADC device
- STM32 ADC is a successive approximation analog-to-digital converter.
- It has several multiplexed input channels. Conversions can be performed
- in single, continuous, scan or discontinuous mode. Result of the ADC is
- stored in a left-aligned or right-aligned 32-bit data register.
- Conversions can be launched in software or using hardware triggers.
- The analog watchdog feature allows the application to detect if the input
- voltage goes beyond the user-defined, higher or lower thresholds.
- Each STM32 ADC block can have up to 3 ADC instances.
- Each instance supports two contexts to manage conversions, each one has its
- own configurable sequence and trigger:
- - regular conversion can be done in sequence, running in background
- - injected conversions have higher priority, and so have the ability to
- interrupt regular conversion sequence (either triggered in SW or HW).
- Regular sequence is resumed, in case it has been interrupted.
- Contents of a stm32 adc root node:
- -----------------------------------
- Required properties:
- - compatible: Should be one of:
- "st,stm32f4-adc-core"
- "st,stm32h7-adc-core"
- "st,stm32mp1-adc-core"
- - reg: Offset and length of the ADC block register set.
- - interrupts: One or more interrupts for ADC block. Some parts like stm32f4
- and stm32h7 share a common ADC interrupt line. stm32mp1 has two separate
- interrupt lines, one for each ADC within ADC block.
- - clocks: Core can use up to two clocks, depending on part used:
- - "adc" clock: for the analog circuitry, common to all ADCs.
- It's required on stm32f4.
- It's optional on stm32h7.
- - "bus" clock: for registers access, common to all ADCs.
- It's not present on stm32f4.
- It's required on stm32h7.
- - clock-names: Must be "adc" and/or "bus" depending on part used.
- - interrupt-controller: Identifies the controller node as interrupt-parent
- - vref-supply: Phandle to the vref input analog reference voltage.
- - #interrupt-cells = <1>;
- - #address-cells = <1>;
- - #size-cells = <0>;
- Optional properties:
- - A pinctrl state named "default" for each ADC channel may be defined to set
- inX ADC pins in mode of operation for analog input on external pin.
- Contents of a stm32 adc child node:
- -----------------------------------
- An ADC block node should contain at least one subnode, representing an
- ADC instance available on the machine.
- Required properties:
- - compatible: Should be one of:
- "st,stm32f4-adc"
- "st,stm32h7-adc"
- "st,stm32mp1-adc"
- - reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200).
- - clocks: Input clock private to this ADC instance. It's required only on
- stm32f4, that has per instance clock input for registers access.
- - interrupt-parent: Phandle to the parent interrupt controller.
- - interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or
- 2 for adc@200).
- - st,adc-channels: List of single-ended channels muxed for this ADC.
- It can have up to 16 channels on stm32f4 or 20 channels on stm32h7, numbered
- from 0 to 15 or 19 (resp. for in0..in15 or in0..in19).
- - st,adc-diff-channels: List of differential channels muxed for this ADC.
- Depending on part used, some channels can be configured as differential
- instead of single-ended (e.g. stm32h7). List here positive and negative
- inputs pairs as <vinp vinn>, <vinp vinn>,... vinp and vinn are numbered
- from 0 to 19 on stm32h7)
- Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is required.
- Both properties can be used together. Some channels can be used as
- single-ended and some other ones as differential (mixed). But channels
- can't be configured both as single-ended and differential (invalid).
- - #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in
- Documentation/devicetree/bindings/iio/iio-bindings.txt
- Optional properties:
- - dmas: Phandle to dma channel for this ADC instance.
- See ../../dma/dma.txt for details.
- - dma-names: Must be "rx" when dmas property is being used.
- - assigned-resolution-bits: Resolution (bits) to use for conversions. Must
- match device available resolutions:
- * can be 6, 8, 10 or 12 on stm32f4
- * can be 8, 10, 12, 14 or 16 on stm32h7
- Default is maximum resolution if unset.
- - st,min-sample-time-nsecs: Minimum sampling time in nanoseconds.
- Depending on hardware (board) e.g. high/low analog input source impedance,
- fine tune of ADC sampling time may be recommended.
- This can be either one value or an array that matches 'st,adc-channels' list,
- to set sample time resp. for all channels, or independently for each channel.
- Example:
- adc: adc@40012000 {
- compatible = "st,stm32f4-adc-core";
- reg = <0x40012000 0x400>;
- interrupts = <18>;
- clocks = <&rcc 0 168>;
- clock-names = "adc";
- vref-supply = <®_vref>;
- interrupt-controller;
- pinctrl-names = "default";
- pinctrl-0 = <&adc3_in8_pin>;
- #interrupt-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- adc@0 {
- compatible = "st,stm32f4-adc";
- #io-channel-cells = <1>;
- reg = <0x0>;
- clocks = <&rcc 0 168>;
- interrupt-parent = <&adc>;
- interrupts = <0>;
- st,adc-channels = <8>;
- dmas = <&dma2 0 0 0x400 0x0>;
- dma-names = "rx";
- assigned-resolution-bits = <8>;
- };
- ...
- other adc child nodes follow...
- };
- Example to setup:
- - channel 1 as single-ended
- - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs)
- adc: adc@40022000 {
- compatible = "st,stm32h7-adc-core";
- ...
- adc1: adc@0 {
- compatible = "st,stm32h7-adc";
- ...
- st,adc-channels = <1>;
- st,adc-diff-channels = <2 6>, <3 7>;
- };
- };
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