emif.c 2.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * EMIF programming
  4. *
  5. * (C) Copyright 2010
  6. * Texas Instruments, <www.ti.com>
  7. *
  8. * Aneesh V <aneesh@ti.com> for OMAP4
  9. */
  10. #include <common.h>
  11. #include <log.h>
  12. #include <asm/emif.h>
  13. #include <asm/arch/sys_proto.h>
  14. #include <asm/utils.h>
  15. #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
  16. #define print_timing_reg(reg) debug(#reg" - 0x%08x\n", (reg))
  17. static u32 *const T_num = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_NUM;
  18. static u32 *const T_den = (u32 *)OMAP_SRAM_SCRATCH_EMIF_T_DEN;
  19. #endif
  20. #ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
  21. /* Base AC Timing values specified by JESD209-2 for 532MHz operation */
  22. static const struct lpddr2_ac_timings timings_jedec_532_mhz = {
  23. .max_freq = 532000000,
  24. .RL = 8,
  25. .tRPab = 21,
  26. .tRCD = 18,
  27. .tWR = 15,
  28. .tRASmin = 42,
  29. .tRRD = 10,
  30. .tWTRx2 = 15,
  31. .tXSR = 140,
  32. .tXPx2 = 15,
  33. .tRFCab = 130,
  34. .tRTPx2 = 15,
  35. .tCKE = 3,
  36. .tCKESR = 15,
  37. .tZQCS = 90,
  38. .tZQCL = 360,
  39. .tZQINIT = 1000,
  40. .tDQSCKMAXx2 = 11,
  41. .tRASmax = 70,
  42. .tFAW = 50
  43. };
  44. /*
  45. * Min tCK values specified by JESD209-2
  46. * Min tCK specifies the minimum duration of some AC timing parameters in terms
  47. * of the number of cycles. If the calculated number of cycles based on the
  48. * absolute time value is less than the min tCK value, min tCK value should
  49. * be used instead. This typically happens at low frequencies.
  50. */
  51. static const struct lpddr2_min_tck min_tck_jedec = {
  52. .tRL = 3,
  53. .tRP_AB = 3,
  54. .tRCD = 3,
  55. .tWR = 3,
  56. .tRAS_MIN = 3,
  57. .tRRD = 2,
  58. .tWTR = 2,
  59. .tXP = 2,
  60. .tRTP = 2,
  61. .tCKE = 3,
  62. .tCKESR = 3,
  63. .tFAW = 8
  64. };
  65. static const struct lpddr2_ac_timings const*
  66. jedec_ac_timings[MAX_NUM_SPEEDBINS] = {
  67. &timings_jedec_532_mhz
  68. };
  69. static const struct lpddr2_device_timings jedec_default_timings = {
  70. .ac_timings = jedec_ac_timings,
  71. .min_tck = &min_tck_jedec
  72. };
  73. void emif_get_device_timings(u32 emif_nr,
  74. const struct lpddr2_device_timings **cs0_device_timings,
  75. const struct lpddr2_device_timings **cs1_device_timings)
  76. {
  77. /* Assume Identical devices on EMIF1 & EMIF2 */
  78. *cs0_device_timings = &jedec_default_timings;
  79. *cs1_device_timings = NULL;
  80. }
  81. #endif /* CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS */