boot-common.c 6.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * boot-common.c
  4. *
  5. * Common bootmode functions for omap based boards
  6. *
  7. * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
  8. */
  9. #include <common.h>
  10. #include <ahci.h>
  11. #include <log.h>
  12. #include <spl.h>
  13. #include <asm/omap_common.h>
  14. #include <asm/arch/omap.h>
  15. #include <asm/arch/mmc_host_def.h>
  16. #include <asm/arch/sys_proto.h>
  17. #include <watchdog.h>
  18. #include <scsi.h>
  19. #include <i2c.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. __weak u32 omap_sys_boot_device(void)
  22. {
  23. return BOOT_DEVICE_NONE;
  24. }
  25. void save_omap_boot_params(void)
  26. {
  27. u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
  28. struct omap_boot_parameters *omap_boot_params;
  29. int sys_boot_device = 0;
  30. u32 boot_device;
  31. u32 boot_mode;
  32. if ((boot_params < NON_SECURE_SRAM_START) ||
  33. (boot_params > NON_SECURE_SRAM_END))
  34. return;
  35. omap_boot_params = (struct omap_boot_parameters *)boot_params;
  36. boot_device = omap_boot_params->boot_device;
  37. boot_mode = MMCSD_MODE_UNDEFINED;
  38. /* Boot device */
  39. #ifdef BOOT_DEVICE_NAND_I2C
  40. /*
  41. * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
  42. * Otherwise the SPL boot IF can't handle this device correctly.
  43. * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
  44. * Draco leads to this boot-device passed to SPL from the BootROM.
  45. */
  46. if (boot_device == BOOT_DEVICE_NAND_I2C)
  47. boot_device = BOOT_DEVICE_NAND;
  48. #endif
  49. #ifdef BOOT_DEVICE_QSPI_4
  50. /*
  51. * We get different values for QSPI_1 and QSPI_4 being used, but
  52. * don't actually care about this difference. Rather than
  53. * mangle the later code, if we're coming in as QSPI_4 just
  54. * change to the QSPI_1 value.
  55. */
  56. if (boot_device == BOOT_DEVICE_QSPI_4)
  57. boot_device = BOOT_DEVICE_SPI;
  58. #endif
  59. #ifdef CONFIG_TI816X
  60. /*
  61. * On PG2.0 and later TI816x the values we get when booting are not the
  62. * same as on PG1.0, which is what the defines are based on. Update
  63. * them as needed.
  64. */
  65. if (get_cpu_rev() != 1) {
  66. if (boot_device == 0x05) {
  67. omap_boot_params->boot_device = BOOT_DEVICE_NAND;
  68. boot_device = BOOT_DEVICE_NAND;
  69. }
  70. if (boot_device == 0x08) {
  71. omap_boot_params->boot_device = BOOT_DEVICE_MMC1;
  72. boot_device = BOOT_DEVICE_MMC1;
  73. }
  74. }
  75. #endif
  76. /*
  77. * When booting from peripheral booting, the boot device is not usable
  78. * as-is (unless there is support for it), so the boot device is instead
  79. * figured out using the SYS_BOOT pins.
  80. */
  81. switch (boot_device) {
  82. #if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
  83. case BOOT_DEVICE_UART:
  84. sys_boot_device = 1;
  85. break;
  86. #endif
  87. #if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_STORAGE)
  88. case BOOT_DEVICE_USB:
  89. sys_boot_device = 1;
  90. break;
  91. #endif
  92. #if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USB_ETHER)
  93. case BOOT_DEVICE_USBETH:
  94. sys_boot_device = 1;
  95. break;
  96. #endif
  97. #if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
  98. case BOOT_DEVICE_CPGMAC:
  99. sys_boot_device = 1;
  100. break;
  101. #endif
  102. #if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU)
  103. case BOOT_DEVICE_DFU:
  104. sys_boot_device = 1;
  105. break;
  106. #endif
  107. }
  108. if (sys_boot_device) {
  109. boot_device = omap_sys_boot_device();
  110. /* MMC raw mode will fallback to FS mode. */
  111. if ((boot_device >= MMC_BOOT_DEVICES_START) &&
  112. (boot_device <= MMC_BOOT_DEVICES_END))
  113. boot_mode = MMCSD_MODE_RAW;
  114. }
  115. gd->arch.omap_boot_device = boot_device;
  116. /* Boot mode */
  117. #ifdef CONFIG_OMAP34XX
  118. if ((boot_device >= MMC_BOOT_DEVICES_START) &&
  119. (boot_device <= MMC_BOOT_DEVICES_END)) {
  120. switch (boot_device) {
  121. case BOOT_DEVICE_MMC1:
  122. boot_mode = MMCSD_MODE_FS;
  123. break;
  124. case BOOT_DEVICE_MMC2:
  125. boot_mode = MMCSD_MODE_RAW;
  126. break;
  127. }
  128. }
  129. #else
  130. /*
  131. * If the boot device was dynamically changed and doesn't match what
  132. * the bootrom initially booted, we cannot use the boot device
  133. * descriptor to figure out the boot mode.
  134. */
  135. if ((boot_device == omap_boot_params->boot_device) &&
  136. (boot_device >= MMC_BOOT_DEVICES_START) &&
  137. (boot_device <= MMC_BOOT_DEVICES_END)) {
  138. boot_params = omap_boot_params->boot_device_descriptor;
  139. if ((boot_params < NON_SECURE_SRAM_START) ||
  140. (boot_params > NON_SECURE_SRAM_END))
  141. return;
  142. boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
  143. if ((boot_params < NON_SECURE_SRAM_START) ||
  144. (boot_params > NON_SECURE_SRAM_END))
  145. return;
  146. boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
  147. if (boot_mode != MMCSD_MODE_FS &&
  148. boot_mode != MMCSD_MODE_RAW)
  149. #ifdef CONFIG_SUPPORT_EMMC_BOOT
  150. boot_mode = MMCSD_MODE_EMMCBOOT;
  151. #else
  152. boot_mode = MMCSD_MODE_UNDEFINED;
  153. #endif
  154. }
  155. #endif
  156. gd->arch.omap_boot_mode = boot_mode;
  157. #if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
  158. !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
  159. /* CH flags */
  160. gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
  161. #endif
  162. }
  163. #ifdef CONFIG_SPL_BUILD
  164. u32 spl_boot_device(void)
  165. {
  166. return gd->arch.omap_boot_device;
  167. }
  168. u32 spl_mmc_boot_mode(const u32 boot_device)
  169. {
  170. return gd->arch.omap_boot_mode;
  171. }
  172. void spl_board_init(void)
  173. {
  174. /* Prepare console output */
  175. preloader_console_init();
  176. #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
  177. gpmc_init();
  178. #endif
  179. #if defined(CONFIG_SPL_I2C_SUPPORT) && !defined(CONFIG_DM_I2C)
  180. i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
  181. #endif
  182. #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
  183. arch_misc_init();
  184. #endif
  185. #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
  186. hw_watchdog_init();
  187. #endif
  188. #ifdef CONFIG_AM33XX
  189. am33xx_spl_board_init();
  190. #endif
  191. }
  192. void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
  193. {
  194. typedef void __noreturn (*image_entry_noargs_t)(u32 *);
  195. image_entry_noargs_t image_entry =
  196. (image_entry_noargs_t) spl_image->entry_point;
  197. u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
  198. debug("image entry point: 0x%lX\n", spl_image->entry_point);
  199. /* Pass the saved boot_params from rom code */
  200. image_entry((u32 *)boot_params);
  201. }
  202. #endif
  203. #ifdef CONFIG_SCSI_AHCI_PLAT
  204. void arch_preboot_os(void)
  205. {
  206. ahci_reset((void __iomem *)DWC_AHSATA_BASE);
  207. }
  208. #endif