spl_atmel.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2013 Atmel Corporation
  4. * Bo Shen <voice.shen@atmel.com>
  5. */
  6. #include <common.h>
  7. #include <hang.h>
  8. #include <init.h>
  9. #include <log.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/at91_common.h>
  12. #include <asm/arch/at91_pit.h>
  13. #include <asm/arch/at91_pmc.h>
  14. #include <asm/arch/at91_rstc.h>
  15. #include <asm/arch/at91_wdt.h>
  16. #include <asm/arch/clk.h>
  17. #include <spl.h>
  18. static void switch_to_main_crystal_osc(void)
  19. {
  20. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  21. u32 tmp;
  22. tmp = readl(&pmc->mor);
  23. tmp &= ~AT91_PMC_MOR_OSCOUNT(0xff);
  24. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  25. tmp |= AT91_PMC_MOR_MOSCEN;
  26. tmp |= AT91_PMC_MOR_OSCOUNT(8);
  27. tmp |= AT91_PMC_MOR_KEY(0x37);
  28. writel(tmp, &pmc->mor);
  29. while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
  30. ;
  31. #if defined(CONFIG_SAMA5D2)
  32. /* Enable a measurement of the external oscillator */
  33. tmp = readl(&pmc->mcfr);
  34. tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;
  35. tmp |= AT91_PMC_MCFR_RCMEAS;
  36. writel(tmp, &pmc->mcfr);
  37. while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))
  38. ;
  39. if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))
  40. hang();
  41. #endif
  42. tmp = readl(&pmc->mor);
  43. /*
  44. * some boards have an external oscillator with driving.
  45. * in this case we need to disable the internal SoC driving (bypass mode)
  46. */
  47. #if defined(CONFIG_SPL_AT91_MCK_BYPASS)
  48. tmp |= AT91_PMC_MOR_OSCBYPASS;
  49. #else
  50. tmp &= ~AT91_PMC_MOR_OSCBYPASS;
  51. #endif
  52. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  53. tmp |= AT91_PMC_MOR_KEY(0x37);
  54. writel(tmp, &pmc->mor);
  55. tmp = readl(&pmc->mor);
  56. tmp |= AT91_PMC_MOR_MOSCSEL;
  57. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  58. tmp |= AT91_PMC_MOR_KEY(0x37);
  59. writel(tmp, &pmc->mor);
  60. while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
  61. ;
  62. #if !defined(CONFIG_SAMA5D2)
  63. /* Wait until MAINRDY field is set to make sure main clock is stable */
  64. while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
  65. ;
  66. #endif
  67. #if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)
  68. tmp = readl(&pmc->mor);
  69. tmp &= ~AT91_PMC_MOR_MOSCRCEN;
  70. tmp &= ~AT91_PMC_MOR_KEY(0xff);
  71. tmp |= AT91_PMC_MOR_KEY(0x37);
  72. writel(tmp, &pmc->mor);
  73. #endif
  74. }
  75. __weak void matrix_init(void)
  76. {
  77. /* This only be used for sama5d4 soc now */
  78. }
  79. __weak void redirect_int_from_saic_to_aic(void)
  80. {
  81. /* This only be used for sama5d4 soc now */
  82. }
  83. /* empty stub to satisfy current lowlevel_init, can be removed any time */
  84. void s_init(void)
  85. {
  86. }
  87. void board_init_f(ulong dummy)
  88. {
  89. int ret;
  90. switch_to_main_crystal_osc();
  91. #ifdef CONFIG_SAMA5D2
  92. configure_2nd_sram_as_l2_cache();
  93. #endif
  94. #if !defined(CONFIG_WDT_AT91)
  95. /* disable watchdog */
  96. at91_disable_wdt();
  97. #endif
  98. /* PMC configuration */
  99. at91_pmc_init();
  100. at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
  101. matrix_init();
  102. redirect_int_from_saic_to_aic();
  103. timer_init();
  104. board_early_init_f();
  105. mem_init();
  106. ret = spl_init();
  107. if (ret) {
  108. debug("spl_init() failed: %d\n", ret);
  109. hang();
  110. }
  111. preloader_console_init();
  112. }