spl_at91.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014 DENX Software Engineering
  4. * Heiko Schocher <hs@denx.de>
  5. *
  6. * Based on:
  7. * Copyright (C) 2013 Atmel Corporation
  8. * Bo Shen <voice.shen@atmel.com>
  9. */
  10. #include <common.h>
  11. #include <hang.h>
  12. #include <init.h>
  13. #include <log.h>
  14. #include <asm/io.h>
  15. #include <asm/arch/at91_common.h>
  16. #include <asm/arch/at91sam9_matrix.h>
  17. #include <asm/arch/at91_pit.h>
  18. #include <asm/arch/at91_rstc.h>
  19. #include <asm/arch/at91_wdt.h>
  20. #include <asm/arch/clk.h>
  21. #include <spl.h>
  22. DECLARE_GLOBAL_DATA_PTR;
  23. static void enable_ext_reset(void)
  24. {
  25. struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
  26. writel(AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN, &rstc->mr);
  27. }
  28. void lowlevel_clock_init(void)
  29. {
  30. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  31. if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) {
  32. /* Enable Main Oscillator */
  33. writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor);
  34. /* Wait until Main Oscillator is stable */
  35. while (!(readl(&pmc->sr) & AT91_PMC_MOSCS))
  36. ;
  37. }
  38. /* After stabilization, switch to Main Oscillator */
  39. if ((readl(&pmc->mckr) & AT91_PMC_CSS) == AT91_PMC_CSS_SLOW) {
  40. unsigned long tmp;
  41. tmp = readl(&pmc->mckr);
  42. tmp &= ~AT91_PMC_CSS;
  43. tmp |= AT91_PMC_CSS_MAIN;
  44. writel(tmp, &pmc->mckr);
  45. while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  46. ;
  47. tmp &= ~AT91_PMC_PRES;
  48. tmp |= AT91_PMC_PRES_1;
  49. writel(tmp, &pmc->mckr);
  50. while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  51. ;
  52. }
  53. return;
  54. }
  55. void __weak matrix_init(void)
  56. {
  57. }
  58. void __weak at91_spl_board_init(void)
  59. {
  60. }
  61. void __weak spl_board_init(void)
  62. {
  63. }
  64. void board_init_f(ulong dummy)
  65. {
  66. #if CONFIG_IS_ENABLED(OF_CONTROL)
  67. int ret;
  68. ret = spl_early_init();
  69. if (ret) {
  70. debug("spl_early_init() failed: %d\n", ret);
  71. hang();
  72. }
  73. #endif
  74. lowlevel_clock_init();
  75. #if !defined(CONFIG_WDT_AT91)
  76. at91_disable_wdt();
  77. #endif
  78. /*
  79. * At this stage the main oscillator is supposed to be enabled
  80. * PCK = MCK = MOSC
  81. */
  82. at91_pllicpr_init(0x00);
  83. /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
  84. at91_plla_init(CONFIG_SYS_AT91_PLLA);
  85. /* PCK = PLLA = 2 * MCK */
  86. at91_mck_init(CONFIG_SYS_MCKR);
  87. /* Switch MCK on PLLA output */
  88. at91_mck_init(CONFIG_SYS_MCKR_CSS);
  89. #if defined(CONFIG_SYS_AT91_PLLB)
  90. /* Configure PLLB */
  91. at91_pllb_init(CONFIG_SYS_AT91_PLLB);
  92. #endif
  93. /* Enable External Reset */
  94. enable_ext_reset();
  95. /* Initialize matrix */
  96. matrix_init();
  97. gd->arch.mck_rate_hz = CONFIG_SYS_MASTER_CLOCK;
  98. /*
  99. * init timer long enough for using in spl.
  100. */
  101. timer_init();
  102. /* enable clocks for all PIOs */
  103. #if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
  104. at91_periph_clk_enable(ATMEL_ID_PIOAB);
  105. at91_periph_clk_enable(ATMEL_ID_PIOCD);
  106. #else
  107. at91_periph_clk_enable(ATMEL_ID_PIOA);
  108. at91_periph_clk_enable(ATMEL_ID_PIOB);
  109. at91_periph_clk_enable(ATMEL_ID_PIOC);
  110. #endif
  111. #if defined(CONFIG_SPL_SERIAL_SUPPORT)
  112. /* init console */
  113. at91_seriald_hw_init();
  114. preloader_console_init();
  115. #endif
  116. mem_init();
  117. at91_spl_board_init();
  118. }