ls1028_ids.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #include <common.h>
  6. #include <fdt_support.h>
  7. #include <log.h>
  8. #include <asm/arch-fsl-layerscape/immap_lsch3.h>
  9. #include <asm/arch-fsl-layerscape/fsl_icid.h>
  10. #include <asm/arch-fsl-layerscape/fsl_portals.h>
  11. struct icid_id_table icid_tbl[] = {
  12. SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID),
  13. SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID),
  14. SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID),
  15. SET_SDHC_ICID(2, FSL_SDMMC2_STREAM_ID),
  16. SET_SATA_ICID(1, "fsl,ls1028a-ahci", FSL_SATA1_STREAM_ID),
  17. SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
  18. SET_QDMA_ICID("fsl,ls1028a-qdma", FSL_DMA_STREAM_ID),
  19. SET_GPU_ICID("fsl,ls1028a-gpu", FSL_GPU_STREAM_ID),
  20. SET_DISPLAY_ICID(FSL_DISPLAY_STREAM_ID),
  21. #ifdef CONFIG_FSL_CAAM
  22. SET_SEC_JR_ICID_ENTRY(0, FSL_SEC_JR1_STREAM_ID),
  23. SET_SEC_JR_ICID_ENTRY(1, FSL_SEC_JR2_STREAM_ID),
  24. SET_SEC_JR_ICID_ENTRY(2, FSL_SEC_JR3_STREAM_ID),
  25. SET_SEC_JR_ICID_ENTRY(3, FSL_SEC_JR4_STREAM_ID),
  26. SET_SEC_RTIC_ICID_ENTRY(0, FSL_SEC_STREAM_ID),
  27. SET_SEC_RTIC_ICID_ENTRY(1, FSL_SEC_STREAM_ID),
  28. SET_SEC_RTIC_ICID_ENTRY(2, FSL_SEC_STREAM_ID),
  29. SET_SEC_RTIC_ICID_ENTRY(3, FSL_SEC_STREAM_ID),
  30. SET_SEC_DECO_ICID_ENTRY(0, FSL_SEC_STREAM_ID),
  31. SET_SEC_DECO_ICID_ENTRY(1, FSL_SEC_STREAM_ID),
  32. #endif
  33. };
  34. int icid_tbl_sz = ARRAY_SIZE(icid_tbl);
  35. /* integrated PCI is handled separately as it's not part of CCSR/SCFG */
  36. #ifdef CONFIG_PCIE_ECAM_GENERIC
  37. #define ECAM_IERB_BASE 0x1f0800000ULL
  38. #define ECAM_IERB_OFFSET_NA -1
  39. #define ECAM_IERB_FUNC_CNT ARRAY_SIZE(ierb_offset)
  40. /* cache related transaction attributes for PCIe functions */
  41. #define ECAM_IERB_MSICAR (ECAM_IERB_BASE + 0xa400)
  42. #define ECAM_IERB_MSICAR_VALUE 0x30
  43. /* offset of IERB config register per PCI function */
  44. static int ierb_offset[] = {
  45. 0x0800,
  46. 0x1800,
  47. 0x2800,
  48. 0x3800,
  49. 0x4800,
  50. 0x5800,
  51. 0x6800,
  52. ECAM_IERB_OFFSET_NA,
  53. 0x0804,
  54. 0x0808,
  55. 0x1804,
  56. 0x1808,
  57. };
  58. /*
  59. * Use a custom function for LS1028A, for now this is the only SoC with IERB
  60. * and we're currently considering reorganizing IERB for future SoCs.
  61. */
  62. void set_ecam_icids(void)
  63. {
  64. int i;
  65. out_le32(ECAM_IERB_MSICAR, ECAM_IERB_MSICAR_VALUE);
  66. for (i = 0; i < ECAM_IERB_FUNC_CNT; i++) {
  67. if (ierb_offset[i] == ECAM_IERB_OFFSET_NA)
  68. continue;
  69. out_le32(ECAM_IERB_BASE + ierb_offset[i],
  70. FSL_ECAM_STREAM_ID_START + i);
  71. }
  72. }
  73. static int fdt_setprop_inplace_idx_u32(void *fdt, int nodeoffset,
  74. const char *name, uint32_t idx, u32 val)
  75. {
  76. val = cpu_to_be32(val);
  77. return fdt_setprop_inplace_namelen_partial(fdt, nodeoffset, name,
  78. strlen(name),
  79. idx * sizeof(val), &val,
  80. sizeof(val));
  81. }
  82. static int fdt_getprop_len(void *fdt, int nodeoffset, const char *name)
  83. {
  84. int len;
  85. if (fdt_getprop_namelen(fdt, nodeoffset, name, strlen(name), &len))
  86. return len;
  87. return 0;
  88. }
  89. void fdt_fixup_ecam(void *blob)
  90. {
  91. int off;
  92. off = fdt_node_offset_by_compatible(blob, 0, "pci-host-ecam-generic");
  93. if (off < 0) {
  94. debug("ECAM node not found\n");
  95. return;
  96. }
  97. if (fdt_getprop_len(blob, off, "msi-map") != 16 ||
  98. fdt_getprop_len(blob, off, "iommu-map") != 16) {
  99. log_err("invalid msi/iommu-map propertly size in ECAM node\n");
  100. return;
  101. }
  102. fdt_setprop_inplace_idx_u32(blob, off, "msi-map", 2,
  103. FSL_ECAM_STREAM_ID_START);
  104. fdt_setprop_inplace_idx_u32(blob, off, "msi-map", 3,
  105. ECAM_IERB_FUNC_CNT);
  106. fdt_setprop_inplace_idx_u32(blob, off, "iommu-map", 2,
  107. FSL_ECAM_STREAM_ID_START);
  108. fdt_setprop_inplace_idx_u32(blob, off, "iommu-map", 3,
  109. ECAM_IERB_FUNC_CNT);
  110. }
  111. #endif /* CONFIG_PCIE_ECAM_GENERIC */