cr50_i2c.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Cr50 / H1 TPM support
  4. *
  5. * Copyright 2018 Google LLC
  6. */
  7. #define LOG_CATEGORY UCLASS_TPM
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <i2c.h>
  11. #include <irq.h>
  12. #include <log.h>
  13. #include <spl.h>
  14. #include <tpm-v2.h>
  15. #include <acpi/acpigen.h>
  16. #include <acpi/acpi_device.h>
  17. #include <asm/gpio.h>
  18. #include <asm/io.h>
  19. #include <asm/arch/iomap.h>
  20. #include <asm/arch/pm.h>
  21. #include <linux/delay.h>
  22. #include <dm/acpi.h>
  23. enum {
  24. TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */
  25. TIMEOUT_LONG_US = 2 * 1000 * 1000,
  26. TIMEOUT_SHORT_US = 2 * 1000,
  27. TIMEOUT_NO_IRQ_US = 20 * 1000,
  28. TIMEOUT_IRQ_US = 100 * 1000,
  29. };
  30. enum {
  31. CR50_DID_VID = 0x00281ae0L
  32. };
  33. enum {
  34. CR50_MAX_BUF_SIZE = 63,
  35. };
  36. /**
  37. * struct cr50_priv - Private driver data
  38. *
  39. * @ready_gpio: GPIO to use to check if the TPM is ready
  40. * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
  41. * @locality: Currenttly claimed locality (-1 if none)
  42. * @vendor: vendor: Vendor ID for TPM
  43. * @use_irq: true to use @irq, false to use @ready if available
  44. */
  45. struct cr50_priv {
  46. struct gpio_desc ready_gpio;
  47. struct irq irq;
  48. int locality;
  49. uint vendor;
  50. bool use_irq;
  51. };
  52. /* Wait for interrupt to indicate TPM is ready */
  53. static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
  54. {
  55. struct cr50_priv *priv = dev_get_priv(dev);
  56. ulong timeout, base;
  57. int i;
  58. if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) {
  59. /* Fixed delay if interrupt not supported */
  60. udelay(TIMEOUT_NO_IRQ_US);
  61. return 0;
  62. }
  63. base = timer_get_us();
  64. timeout = base + TIMEOUT_IRQ_US;
  65. i = 0;
  66. while (priv->use_irq ? !irq_read_and_clear(&priv->irq) :
  67. !dm_gpio_get_value(&priv->ready_gpio)) {
  68. i++;
  69. if ((int)(timer_get_us() - timeout) >= 0) {
  70. log_warning("Timeout\n");
  71. /* Use this instead of the -ETIMEDOUT used by i2c */
  72. return -ETIME;
  73. }
  74. }
  75. log_debug("i=%d\n", i);
  76. return 0;
  77. }
  78. /* Clear pending interrupts */
  79. static void cr50_i2c_clear_tpm_irq(struct udevice *dev)
  80. {
  81. struct cr50_priv *priv = dev_get_priv(dev);
  82. if (priv->use_irq)
  83. irq_read_and_clear(&priv->irq);
  84. }
  85. /*
  86. * cr50_i2c_read() - read from TPM register
  87. *
  88. * @dev: TPM chip information
  89. * @addr: register address to read from
  90. * @buffer: provided by caller
  91. * @len: number of bytes to read
  92. *
  93. * 1) send register address byte 'addr' to the TPM
  94. * 2) wait for TPM to indicate it is ready
  95. * 3) read 'len' bytes of TPM response into the provided 'buffer'
  96. *
  97. * Return 0 on success. -ve on error
  98. */
  99. static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,
  100. size_t len)
  101. {
  102. int ret;
  103. /* Clear interrupt before starting transaction */
  104. cr50_i2c_clear_tpm_irq(dev);
  105. /* Send the register address byte to the TPM */
  106. ret = dm_i2c_write(dev, 0, &addr, 1);
  107. if (ret) {
  108. log_err("Address write failed (err=%d)\n", ret);
  109. return ret;
  110. }
  111. /* Wait for TPM to be ready with response data */
  112. ret = cr50_i2c_wait_tpm_ready(dev);
  113. if (ret)
  114. return ret;
  115. /* Read response data frrom the TPM */
  116. ret = dm_i2c_read(dev, 0, buffer, len);
  117. if (ret) {
  118. log_err("Read response failed (err=%d)\n", ret);
  119. return ret;
  120. }
  121. return 0;
  122. }
  123. /*
  124. * cr50_i2c_write() - write to TPM register
  125. *
  126. * @dev: TPM chip information
  127. * @addr: register address to write to
  128. * @buffer: data to write
  129. * @len: number of bytes to write
  130. *
  131. * 1) prepend the provided address to the provided data
  132. * 2) send the address+data to the TPM
  133. * 3) wait for TPM to indicate it is done writing
  134. *
  135. * Returns -1 on error, 0 on success.
  136. */
  137. static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,
  138. size_t len)
  139. {
  140. u8 buf[len + 1];
  141. int ret;
  142. if (len > CR50_MAX_BUF_SIZE) {
  143. log_err("Length %zd is too large\n", len);
  144. return -E2BIG;
  145. }
  146. /* Prepend the 'register address' to the buffer */
  147. buf[0] = addr;
  148. memcpy(buf + 1, buffer, len);
  149. /* Clear interrupt before starting transaction */
  150. cr50_i2c_clear_tpm_irq(dev);
  151. /* Send write request buffer with address */
  152. ret = dm_i2c_write(dev, 0, buf, len + 1);
  153. if (ret) {
  154. log_err("Error writing to TPM (err=%d)\n", ret);
  155. return ret;
  156. }
  157. /* Wait for TPM to be ready */
  158. return cr50_i2c_wait_tpm_ready(dev);
  159. }
  160. static inline u8 tpm_access(u8 locality)
  161. {
  162. return 0x0 | (locality << 4);
  163. }
  164. static inline u8 tpm_sts(u8 locality)
  165. {
  166. return 0x1 | (locality << 4);
  167. }
  168. static inline u8 tpm_data_fifo(u8 locality)
  169. {
  170. return 0x5 | (locality << 4);
  171. }
  172. static inline u8 tpm_did_vid(u8 locality)
  173. {
  174. return 0x6 | (locality << 4);
  175. }
  176. static int release_locality(struct udevice *dev, int force)
  177. {
  178. struct cr50_priv *priv = dev_get_priv(dev);
  179. u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
  180. u8 addr = tpm_access(priv->locality);
  181. int ret;
  182. u8 buf;
  183. ret = cr50_i2c_read(dev, addr, &buf, 1);
  184. if (ret)
  185. return ret;
  186. if (force || (buf & mask) == mask) {
  187. buf = TPM_ACCESS_ACTIVE_LOCALITY;
  188. cr50_i2c_write(dev, addr, &buf, 1);
  189. }
  190. priv->locality = -1;
  191. return 0;
  192. }
  193. /* cr50 requires all 4 bytes of status register to be read */
  194. static int cr50_i2c_status(struct udevice *dev)
  195. {
  196. struct cr50_priv *priv = dev_get_priv(dev);
  197. u8 buf[4];
  198. int ret;
  199. ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf));
  200. if (ret) {
  201. log_warning("%s: Failed to read status\n", __func__);
  202. return ret;
  203. }
  204. return buf[0];
  205. }
  206. /* cr50 requires all 4 bytes of status register to be written */
  207. static int cr50_i2c_ready(struct udevice *dev)
  208. {
  209. struct cr50_priv *priv = dev_get_priv(dev);
  210. u8 buf[4] = { TPM_STS_COMMAND_READY };
  211. int ret;
  212. ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf));
  213. if (ret)
  214. return ret;
  215. udelay(TIMEOUT_SHORT_US);
  216. return 0;
  217. }
  218. static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask,
  219. size_t *burst, int *status)
  220. {
  221. struct cr50_priv *priv = dev_get_priv(dev);
  222. ulong timeout;
  223. u32 buf;
  224. /*
  225. * cr50 uses bytes 3:2 of status register for burst count and all 4
  226. * bytes must be read
  227. */
  228. timeout = timer_get_us() + TIMEOUT_LONG_US;
  229. while (timer_get_us() < timeout) {
  230. if (cr50_i2c_read(dev, tpm_sts(priv->locality),
  231. (u8 *)&buf, sizeof(buf)) < 0) {
  232. udelay(TIMEOUT_SHORT_US);
  233. continue;
  234. }
  235. *status = buf & 0xff;
  236. *burst = le16_to_cpu((buf >> 8) & 0xffff);
  237. if ((*status & mask) == mask &&
  238. *burst > 0 && *burst <= CR50_MAX_BUF_SIZE)
  239. return 0;
  240. udelay(TIMEOUT_SHORT_US);
  241. }
  242. log_warning("Timeout reading burst and status\n");
  243. return -ETIMEDOUT;
  244. }
  245. static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len)
  246. {
  247. struct cr50_priv *priv = dev_get_priv(dev);
  248. size_t burstcnt, expected, current, len;
  249. u8 addr = tpm_data_fifo(priv->locality);
  250. u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
  251. u32 expected_buf;
  252. int status;
  253. int ret;
  254. log_debug("%s: len=%x\n", __func__, buf_len);
  255. if (buf_len < TPM_HEADER_SIZE)
  256. return -E2BIG;
  257. ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status);
  258. if (ret < 0) {
  259. log_warning("First chunk not available\n");
  260. goto out_err;
  261. }
  262. /* Read first chunk of burstcnt bytes */
  263. if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) {
  264. log_warning("Read failed\n");
  265. goto out_err;
  266. }
  267. /* Determine expected data in the return buffer */
  268. memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf));
  269. expected = be32_to_cpu(expected_buf);
  270. if (expected > buf_len) {
  271. log_warning("Too much data: %zu > %zu\n", expected, buf_len);
  272. goto out_err;
  273. }
  274. /* Now read the rest of the data */
  275. current = burstcnt;
  276. while (current < expected) {
  277. /* Read updated burst count and check status */
  278. if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) {
  279. log_warning("- burst failure1\n");
  280. goto out_err;
  281. }
  282. len = min(burstcnt, expected - current);
  283. if (cr50_i2c_read(dev, addr, buf + current, len) != 0) {
  284. log_warning("Read failed\n");
  285. goto out_err;
  286. }
  287. current += len;
  288. }
  289. if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt,
  290. &status) < 0) {
  291. log_warning("- burst failure2\n");
  292. goto out_err;
  293. }
  294. if (status & TPM_STS_DATA_AVAIL) {
  295. log_warning("Data still available\n");
  296. goto out_err;
  297. }
  298. return current;
  299. out_err:
  300. /* Abort current transaction if still pending */
  301. ret = cr50_i2c_status(dev);
  302. if (ret < 0)
  303. return ret;
  304. if (ret & TPM_STS_COMMAND_READY) {
  305. ret = cr50_i2c_ready(dev);
  306. if (ret)
  307. return ret;
  308. }
  309. return -EIO;
  310. }
  311. static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len)
  312. {
  313. struct cr50_priv *priv = dev_get_priv(dev);
  314. int status;
  315. size_t burstcnt, limit, sent = 0;
  316. u8 tpm_go[4] = { TPM_STS_GO };
  317. ulong timeout;
  318. int ret;
  319. log_debug("%s: len=%x\n", __func__, len);
  320. timeout = timer_get_us() + TIMEOUT_LONG_US;
  321. do {
  322. ret = cr50_i2c_status(dev);
  323. if (ret < 0)
  324. goto out_err;
  325. if (ret & TPM_STS_COMMAND_READY)
  326. break;
  327. if (timer_get_us() > timeout)
  328. goto out_err;
  329. ret = cr50_i2c_ready(dev);
  330. if (ret)
  331. goto out_err;
  332. } while (1);
  333. while (len > 0) {
  334. u8 mask = TPM_STS_VALID;
  335. /* Wait for data if this is not the first chunk */
  336. if (sent > 0)
  337. mask |= TPM_STS_DATA_EXPECT;
  338. if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0)
  339. goto out_err;
  340. /*
  341. * Use burstcnt - 1 to account for the address byte
  342. * that is inserted by cr50_i2c_write()
  343. */
  344. limit = min(burstcnt - 1, len);
  345. if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality),
  346. &buf[sent], limit) != 0) {
  347. log_warning("Write failed\n");
  348. goto out_err;
  349. }
  350. sent += limit;
  351. len -= limit;
  352. }
  353. /* Ensure TPM is not expecting more data */
  354. if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0)
  355. goto out_err;
  356. if (status & TPM_STS_DATA_EXPECT) {
  357. log_warning("Data still expected\n");
  358. goto out_err;
  359. }
  360. /* Start the TPM command */
  361. ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go,
  362. sizeof(tpm_go));
  363. if (ret) {
  364. log_warning("Start command failed\n");
  365. goto out_err;
  366. }
  367. return sent;
  368. out_err:
  369. /* Abort current transaction if still pending */
  370. ret = cr50_i2c_status(dev);
  371. if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) {
  372. ret = cr50_i2c_ready(dev);
  373. if (ret)
  374. return ret;
  375. }
  376. return -EIO;
  377. }
  378. /**
  379. * process_reset() - Wait for the Cr50 to reset
  380. *
  381. * Cr50 processes reset requests asynchronously and conceivably could be busy
  382. * executing a long command and not reacting to the reset pulse for a while.
  383. *
  384. * This function will make sure that the AP does not proceed with boot until
  385. * TPM finished reset processing.
  386. *
  387. * @dev: Cr50 device
  388. * @return 0 if OK, -EPERM if locality could not be taken
  389. */
  390. static int process_reset(struct udevice *dev)
  391. {
  392. const int loc = 0;
  393. u8 access;
  394. ulong start;
  395. /*
  396. * Locality is released by TPM reset.
  397. *
  398. * If locality is taken at this point, this could be due to the fact
  399. * that the TPM is performing a long operation and has not processed
  400. * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if
  401. * it releases locality when reset is processed.
  402. */
  403. start = get_timer(0);
  404. do {
  405. const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
  406. int ret;
  407. ret = cr50_i2c_read(dev, tpm_access(loc),
  408. &access, sizeof(access));
  409. if (ret || ((access & mask) == mask)) {
  410. /*
  411. * Don't bombard the chip with traffic; let it keep
  412. * processing the command.
  413. */
  414. mdelay(2);
  415. continue;
  416. }
  417. log_warning("TPM ready after %ld ms\n", get_timer(start));
  418. return 0;
  419. } while (get_timer(start) < TIMEOUT_INIT_MS);
  420. log_warning("TPM failed to reset after %ld ms, status: %#x\n",
  421. get_timer(start), access);
  422. return -EPERM;
  423. }
  424. /*
  425. * Locality could be already claimed (if this is a later U-Boot phase and the
  426. * read-only U-Boot did not release it), or not yet claimed, if this is TPL or
  427. * the older read-only U-Boot did release it.
  428. */
  429. static int claim_locality(struct udevice *dev, int loc)
  430. {
  431. const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
  432. struct cr50_priv *priv = dev_get_priv(dev);
  433. u8 access;
  434. int ret;
  435. ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
  436. if (ret)
  437. return log_msg_ret("read1", ret);
  438. if ((access & mask) == mask) {
  439. log_warning("Locality already claimed\n");
  440. return 0;
  441. }
  442. access = TPM_ACCESS_REQUEST_USE;
  443. ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access));
  444. if (ret)
  445. return log_msg_ret("write", ret);
  446. ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
  447. if (ret)
  448. return log_msg_ret("read2", ret);
  449. if ((access & mask) != mask) {
  450. log_err("Failed to claim locality\n");
  451. return -EPERM;
  452. }
  453. log_info("Claimed locality %d\n", loc);
  454. priv->locality = loc;
  455. return 0;
  456. }
  457. static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size)
  458. {
  459. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  460. struct cr50_priv *priv = dev_get_priv(dev);
  461. return snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x) irq=%d",
  462. chip->chip_addr, priv->vendor >> 16, priv->use_irq);
  463. }
  464. static int cr50_i2c_open(struct udevice *dev)
  465. {
  466. char buf[80];
  467. int ret;
  468. ret = process_reset(dev);
  469. if (ret)
  470. return log_msg_ret("reset", ret);
  471. ret = claim_locality(dev, 0);
  472. if (ret)
  473. return log_msg_ret("claim", ret);
  474. cr50_i2c_get_desc(dev, buf, sizeof(buf));
  475. log_debug("%s\n", buf);
  476. return 0;
  477. }
  478. static int cr50_i2c_cleanup(struct udevice *dev)
  479. {
  480. struct cr50_priv *priv = dev_get_priv(dev);
  481. printf("%s: cleanup %d\n", __func__, priv->locality);
  482. if (priv->locality != -1)
  483. release_locality(dev, 1);
  484. return 0;
  485. }
  486. static int cr50_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
  487. {
  488. char scope[ACPI_PATH_MAX];
  489. char name[ACPI_NAME_MAX];
  490. const char *hid;
  491. int ret;
  492. ret = acpi_device_scope(dev, scope, sizeof(scope));
  493. if (ret)
  494. return log_msg_ret("scope", ret);
  495. ret = acpi_get_name(dev, name);
  496. if (ret)
  497. return log_msg_ret("name", ret);
  498. hid = dev_read_string(dev, "acpi,hid");
  499. if (!hid)
  500. return log_msg_ret("hid", ret);
  501. /* Device */
  502. acpigen_write_scope(ctx, scope);
  503. acpigen_write_device(ctx, name);
  504. acpigen_write_name_string(ctx, "_HID", hid);
  505. acpigen_write_name_integer(ctx, "_UID",
  506. dev_read_u32_default(dev, "acpi,uid", 0));
  507. acpigen_write_name_string(ctx, "_DDN",
  508. dev_read_string(dev, "acpi,ddn"));
  509. acpigen_write_sta(ctx, acpi_device_status(dev));
  510. /* Resources */
  511. acpigen_write_name(ctx, "_CRS");
  512. acpigen_write_resourcetemplate_header(ctx);
  513. ret = acpi_device_write_i2c_dev(ctx, dev);
  514. if (ret < 0)
  515. return log_msg_ret("i2c", ret);
  516. ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev,
  517. "ready-gpios");
  518. if (ret < 0)
  519. return log_msg_ret("irq_gpio", ret);
  520. acpigen_write_resourcetemplate_footer(ctx);
  521. acpigen_pop_len(ctx); /* Device */
  522. acpigen_pop_len(ctx); /* Scope */
  523. return 0;
  524. }
  525. enum {
  526. TPM_TIMEOUT_MS = 5,
  527. SHORT_TIMEOUT_MS = 750,
  528. LONG_TIMEOUT_MS = 2000,
  529. };
  530. static int cr50_i2c_ofdata_to_platdata(struct udevice *dev)
  531. {
  532. struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev);
  533. struct cr50_priv *priv = dev_get_priv(dev);
  534. struct irq irq;
  535. int ret;
  536. upriv->version = TPM_V2;
  537. upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS;
  538. upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS;
  539. upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS;
  540. upriv->retry_time_ms = TPM_TIMEOUT_MS;
  541. upriv->pcr_count = 32;
  542. upriv->pcr_select_min = 2;
  543. /* Optional GPIO to track when cr50 is ready */
  544. ret = irq_get_by_index(dev, 0, &irq);
  545. if (!ret) {
  546. priv->irq = irq;
  547. priv->use_irq = true;
  548. } else {
  549. ret = gpio_request_by_name(dev, "ready-gpios", 0,
  550. &priv->ready_gpio, GPIOD_IS_IN);
  551. if (ret) {
  552. log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
  553. ret);
  554. }
  555. }
  556. return 0;
  557. }
  558. static int cr50_i2c_probe(struct udevice *dev)
  559. {
  560. struct cr50_priv *priv = dev_get_priv(dev);
  561. u32 vendor = 0;
  562. ulong start;
  563. /*
  564. * 150ms should be enough to synchronise with the TPM even under the
  565. * worst nested-reset-request conditions. In the vast majority of cases
  566. * there will be no wait at all.
  567. */
  568. start = get_timer(0);
  569. while (get_timer(start) < 150) {
  570. int ret;
  571. /* Exit once DID and VID verified */
  572. ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4);
  573. if (!ret && vendor == CR50_DID_VID)
  574. break;
  575. /* TPM might be resetting; let's retry in a bit */
  576. mdelay(10);
  577. }
  578. if (vendor != CR50_DID_VID) {
  579. log_debug("DID_VID %08x not recognised\n", vendor);
  580. return log_msg_ret("vendor-id", -EXDEV);
  581. }
  582. priv->vendor = vendor;
  583. priv->locality = -1;
  584. return 0;
  585. }
  586. struct acpi_ops cr50_acpi_ops = {
  587. .fill_ssdt = cr50_acpi_fill_ssdt,
  588. };
  589. static const struct tpm_ops cr50_i2c_ops = {
  590. .open = cr50_i2c_open,
  591. .get_desc = cr50_i2c_get_desc,
  592. .send = cr50_i2c_send,
  593. .recv = cr50_i2c_recv,
  594. .cleanup = cr50_i2c_cleanup,
  595. };
  596. static const struct udevice_id cr50_i2c_ids[] = {
  597. { .compatible = "google,cr50" },
  598. { }
  599. };
  600. U_BOOT_DRIVER(cr50_i2c) = {
  601. .name = "cr50_i2c",
  602. .id = UCLASS_TPM,
  603. .of_match = cr50_i2c_ids,
  604. .ops = &cr50_i2c_ops,
  605. .ofdata_to_platdata = cr50_i2c_ofdata_to_platdata,
  606. .probe = cr50_i2c_probe,
  607. .remove = cr50_i2c_cleanup,
  608. .priv_auto_alloc_size = sizeof(struct cr50_priv),
  609. ACPI_OPS_PTR(&cr50_acpi_ops)
  610. .flags = DM_FLAG_OS_PREPARE,
  611. };