ax25-ae350.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Andes Technology Corporation
  4. * Rick Chen, Andes Technology Corporation <rick@andestech.com>
  5. */
  6. #include <common.h>
  7. #include <flash.h>
  8. #include <image.h>
  9. #include <init.h>
  10. #include <net.h>
  11. #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
  12. #include <netdev.h>
  13. #endif
  14. #include <linux/io.h>
  15. #include <faraday/ftsmc020.h>
  16. #include <fdtdec.h>
  17. #include <dm.h>
  18. #include <spl.h>
  19. DECLARE_GLOBAL_DATA_PTR;
  20. extern phys_addr_t prior_stage_fdt_address;
  21. /*
  22. * Miscellaneous platform dependent initializations
  23. */
  24. int board_init(void)
  25. {
  26. gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
  27. return 0;
  28. }
  29. int dram_init(void)
  30. {
  31. return fdtdec_setup_mem_size_base();
  32. }
  33. int dram_init_banksize(void)
  34. {
  35. return fdtdec_setup_memory_banksize();
  36. }
  37. #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
  38. int board_eth_init(struct bd_info *bd)
  39. {
  40. return ftmac100_initialize(bd);
  41. }
  42. #endif
  43. ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
  44. {
  45. return 0;
  46. }
  47. void *board_fdt_blob_setup(void)
  48. {
  49. return (void *)CONFIG_SYS_FDT_BASE;
  50. }
  51. int smc_init(void)
  52. {
  53. int node = -1;
  54. const char *compat = "andestech,atfsmc020";
  55. void *blob = (void *)gd->fdt_blob;
  56. fdt_addr_t addr;
  57. struct ftsmc020_bank *regs;
  58. node = fdt_node_offset_by_compatible(blob, -1, compat);
  59. if (node < 0)
  60. return -FDT_ERR_NOTFOUND;
  61. addr = fdtdec_get_addr_size_auto_noparent(blob, node,
  62. "reg", 0, NULL, false);
  63. if (addr == FDT_ADDR_T_NONE)
  64. return -EINVAL;
  65. regs = (struct ftsmc020_bank *)addr;
  66. regs->cr &= ~FTSMC020_BANK_WPROT;
  67. return 0;
  68. }
  69. static void v5l2_init(void)
  70. {
  71. struct udevice *dev;
  72. uclass_get_device(UCLASS_CACHE, 0, &dev);
  73. }
  74. #ifdef CONFIG_BOARD_EARLY_INIT_F
  75. int board_early_init_f(void)
  76. {
  77. smc_init();
  78. v5l2_init();
  79. return 0;
  80. }
  81. #endif
  82. #ifdef CONFIG_SPL
  83. void board_boot_order(u32 *spl_boot_list)
  84. {
  85. u8 i;
  86. u32 boot_devices[] = {
  87. #ifdef CONFIG_SPL_RAM_SUPPORT
  88. BOOT_DEVICE_RAM,
  89. #endif
  90. #ifdef CONFIG_SPL_MMC_SUPPORT
  91. BOOT_DEVICE_MMC1,
  92. #endif
  93. };
  94. for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
  95. spl_boot_list[i] = boot_devices[i];
  96. }
  97. #endif
  98. #ifdef CONFIG_SPL_LOAD_FIT
  99. int board_fit_config_name_match(const char *name)
  100. {
  101. /* boot using first FIT config */
  102. return 0;
  103. }
  104. #endif