spi-mcf-dspi.txt 1.2 KB

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  1. Freescale ColdFire DSPI controller
  2. Required properties:
  3. - compatible : "fsl,mcf-dspi"
  4. - #address-cells: <1>, as required by generic SPI binding
  5. - #size-cells: <0>, also as required by generic SPI binding
  6. - reg : offset and length of the register set for the device
  7. Optional properties:
  8. - spi-max-frequency : max supported spi frequency
  9. - num-cs : the number of the chipselect signals
  10. - spi-mode: spi motorola mode, 0 to 3
  11. - ctar-params: CTAR0 to 7 register configuration, as an array
  12. of 8 integer fields for each register, where each register
  13. is defined as: <fmsz, pcssck, pasc, pdt, cssck, asc, dt, br>.
  14. - fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
  15. select and the start of clock signal, at the start of a transfer.
  16. - fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
  17. signal and deactivating chip select, at the end of a transfer.
  18. Example:
  19. dspi0: dspi@fc05c000 {
  20. compatible = "fsl,mcf-dspi";
  21. #address-cells = <1>;
  22. #size-cells = <0>;
  23. reg = <0xfc05c000 0x100>;
  24. spi-max-frequency = <50000000>;
  25. num-cs = <4>;
  26. spi-mode = <0>;
  27. ctar-fields = <7, 0, 0, 0, 0, 0, 1, 6>,
  28. <7, 0, 0, 0, 0, 0, 1, 6>,
  29. <7, 0, 0, 0, 0, 0, 1, 6>;
  30. };