meson_vpu.c 5.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Amlogic Meson Video Processing Unit driver
  4. *
  5. * Copyright (c) 2018 BayLibre, SAS.
  6. * Author: Neil Armstrong <narmstrong@baylibre.com>
  7. */
  8. #include <common.h>
  9. #include <display.h>
  10. #include <dm.h>
  11. #include <efi_loader.h>
  12. #include <fdt_support.h>
  13. #include <part.h>
  14. #include <linux/sizes.h>
  15. #include <asm/arch/mem.h>
  16. #include <dm/device-internal.h>
  17. #include <dm/uclass-internal.h>
  18. #include "meson_vpu.h"
  19. #include "meson_registers.h"
  20. #include "simplefb_common.h"
  21. #define MESON_VPU_OVERSCAN SZ_64K
  22. /* Static variable for use in meson_vpu_rsv_fb() */
  23. static struct meson_framebuffer {
  24. u64 base;
  25. u64 fb_size;
  26. unsigned int xsize;
  27. unsigned int ysize;
  28. bool is_cvbs;
  29. } meson_fb = { 0 };
  30. bool meson_vpu_is_compatible(struct meson_vpu_priv *priv,
  31. enum vpu_compatible family)
  32. {
  33. enum vpu_compatible compat = dev_get_driver_data(priv->dev);
  34. return compat == family;
  35. }
  36. static int meson_vpu_setup_mode(struct udevice *dev, struct udevice *disp)
  37. {
  38. struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
  39. struct video_priv *uc_priv = dev_get_uclass_priv(dev);
  40. struct display_timing timing;
  41. bool is_cvbs = false;
  42. int ret = 0;
  43. if (disp) {
  44. ret = display_read_timing(disp, &timing);
  45. if (ret) {
  46. debug("%s: Failed to read timings\n", __func__);
  47. goto cvbs;
  48. }
  49. uc_priv->xsize = timing.hactive.typ;
  50. uc_priv->ysize = timing.vactive.typ;
  51. ret = display_enable(disp, 0, &timing);
  52. if (ret)
  53. goto cvbs;
  54. } else {
  55. cvbs:
  56. /* CVBS has a fixed 720x480i (NTSC) and 720x576i (PAL) */
  57. is_cvbs = true;
  58. timing.flags = DISPLAY_FLAGS_INTERLACED;
  59. uc_priv->xsize = 720;
  60. uc_priv->ysize = 576;
  61. }
  62. uc_priv->bpix = VPU_MAX_LOG2_BPP;
  63. meson_fb.is_cvbs = is_cvbs;
  64. meson_fb.xsize = uc_priv->xsize;
  65. meson_fb.ysize = uc_priv->ysize;
  66. /* Move the framebuffer to the end of addressable ram */
  67. meson_fb.fb_size = ALIGN(meson_fb.xsize * meson_fb.ysize *
  68. ((1 << VPU_MAX_LOG2_BPP) / 8) +
  69. MESON_VPU_OVERSCAN, EFI_PAGE_SIZE);
  70. meson_fb.base = gd->bd->bi_dram[0].start +
  71. gd->bd->bi_dram[0].size - meson_fb.fb_size;
  72. /* Override the framebuffer address */
  73. uc_plat->base = meson_fb.base;
  74. meson_vpu_setup_plane(dev, timing.flags & DISPLAY_FLAGS_INTERLACED);
  75. meson_vpu_setup_venc(dev, &timing, is_cvbs);
  76. meson_vpu_setup_vclk(dev, &timing, is_cvbs);
  77. video_set_flush_dcache(dev, 1);
  78. return 0;
  79. }
  80. static const struct udevice_id meson_vpu_ids[] = {
  81. { .compatible = "amlogic,meson-gxbb-vpu", .data = VPU_COMPATIBLE_GXBB },
  82. { .compatible = "amlogic,meson-gxl-vpu", .data = VPU_COMPATIBLE_GXL },
  83. { .compatible = "amlogic,meson-gxm-vpu", .data = VPU_COMPATIBLE_GXM },
  84. { .compatible = "amlogic,meson-g12a-vpu", .data = VPU_COMPATIBLE_G12A },
  85. { }
  86. };
  87. static int meson_vpu_probe(struct udevice *dev)
  88. {
  89. struct meson_vpu_priv *priv = dev_get_priv(dev);
  90. struct udevice *disp;
  91. int ret;
  92. /* Before relocation we don't need to do anything */
  93. if (!(gd->flags & GD_FLG_RELOC))
  94. return 0;
  95. priv->dev = dev;
  96. priv->io_base = dev_remap_addr_index(dev, 0);
  97. if (!priv->io_base)
  98. return -EINVAL;
  99. priv->hhi_base = dev_remap_addr_index(dev, 1);
  100. if (!priv->hhi_base)
  101. return -EINVAL;
  102. priv->dmc_base = dev_remap_addr_index(dev, 2);
  103. if (!priv->dmc_base)
  104. return -EINVAL;
  105. meson_vpu_init(dev);
  106. /* probe the display */
  107. ret = uclass_get_device(UCLASS_DISPLAY, 0, &disp);
  108. return meson_vpu_setup_mode(dev, ret ? NULL : disp);
  109. }
  110. static int meson_vpu_bind(struct udevice *dev)
  111. {
  112. struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
  113. plat->size = VPU_MAX_WIDTH * VPU_MAX_HEIGHT *
  114. (1 << VPU_MAX_LOG2_BPP) / 8;
  115. return 0;
  116. }
  117. #if defined(CONFIG_VIDEO_DT_SIMPLEFB)
  118. static void meson_vpu_setup_simplefb(void *fdt)
  119. {
  120. const char *pipeline = NULL;
  121. u64 mem_start, mem_size;
  122. int offset, ret;
  123. if (meson_fb.is_cvbs)
  124. pipeline = "vpu-cvbs";
  125. else
  126. pipeline = "vpu-hdmi";
  127. offset = meson_simplefb_fdt_match(fdt, pipeline);
  128. if (offset < 0) {
  129. eprintf("Cannot setup simplefb: node not found\n");
  130. /* If simplefb is missing, add it as reserved memory */
  131. meson_board_add_reserved_memory(fdt, meson_fb.base,
  132. meson_fb.fb_size);
  133. return;
  134. }
  135. /*
  136. * SimpleFB will try to iomap the framebuffer, so we can't use
  137. * fdt_add_mem_rsv on the memory area. Instead, the FB is stored
  138. * at the end of the RAM and we strip this portion from the kernel
  139. * allowed region
  140. */
  141. mem_start = gd->bd->bi_dram[0].start;
  142. mem_size = gd->bd->bi_dram[0].size - meson_fb.fb_size;
  143. ret = fdt_fixup_memory_banks(fdt, &mem_start, &mem_size, 1);
  144. if (ret) {
  145. eprintf("Cannot setup simplefb: Error reserving memory\n");
  146. return;
  147. }
  148. ret = fdt_setup_simplefb_node(fdt, offset, meson_fb.base,
  149. meson_fb.xsize, meson_fb.ysize,
  150. meson_fb.xsize * 4, "x8r8g8b8");
  151. if (ret)
  152. eprintf("Cannot setup simplefb: Error setting properties\n");
  153. }
  154. #endif
  155. void meson_vpu_rsv_fb(void *fdt)
  156. {
  157. if (!meson_fb.base || !meson_fb.xsize || !meson_fb.ysize)
  158. return;
  159. #if defined(CONFIG_EFI_LOADER)
  160. efi_add_memory_map(meson_fb.base, meson_fb.fb_size,
  161. EFI_RESERVED_MEMORY_TYPE);
  162. #endif
  163. #if defined(CONFIG_VIDEO_DT_SIMPLEFB)
  164. meson_vpu_setup_simplefb(fdt);
  165. #endif
  166. }
  167. U_BOOT_DRIVER(meson_vpu) = {
  168. .name = "meson_vpu",
  169. .id = UCLASS_VIDEO,
  170. .of_match = meson_vpu_ids,
  171. .probe = meson_vpu_probe,
  172. .bind = meson_vpu_bind,
  173. .priv_auto_alloc_size = sizeof(struct meson_vpu_priv),
  174. .flags = DM_FLAG_PRE_RELOC | DM_FLAG_REMOVE_WITH_PD_ON,
  175. };