pxa27x_udc.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * PXA27x USB device driver for u-boot.
  4. *
  5. * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
  6. * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it>
  7. * Copyright (C) 2008 Vivek Kutal <vivek.kutal@azingo.com>
  8. */
  9. #include <common.h>
  10. #include <asm/arch/hardware.h>
  11. #include <asm/byteorder.h>
  12. #include <asm/io.h>
  13. #include <usbdevice.h>
  14. #include <usb/pxa27x_udc.h>
  15. #include <usb/udc.h>
  16. #include "ep0.h"
  17. /* number of endpoints on this UDC */
  18. #define UDC_MAX_ENDPOINTS 24
  19. static struct urb *ep0_urb;
  20. static struct usb_device_instance *udc_device;
  21. static int ep0state = EP0_IDLE;
  22. #ifdef USBDDBG
  23. static void udc_dump_buffer(char *name, u8 *buf, int len)
  24. {
  25. usbdbg("%s - buf %p, len %d", name, buf, len);
  26. print_buffer(0, buf, 1, len, 0);
  27. }
  28. #else
  29. #define udc_dump_buffer(name, buf, len) /* void */
  30. #endif
  31. static inline void udc_ack_int_UDCCR(int mask)
  32. {
  33. writel(readl(USIR1) | mask, USIR1);
  34. }
  35. /*
  36. * If the endpoint has an active tx_urb, then the next packet of data from the
  37. * URB is written to the tx FIFO.
  38. * The total amount of data in the urb is given by urb->actual_length.
  39. * The maximum amount of data that can be sent in any one packet is given by
  40. * endpoint->tx_packetSize.
  41. * The number of data bytes from this URB that have already been transmitted
  42. * is given by endpoint->sent.
  43. * endpoint->last is updated by this routine with the number of data bytes
  44. * transmitted in this packet.
  45. */
  46. static int udc_write_urb(struct usb_endpoint_instance *endpoint)
  47. {
  48. struct urb *urb = endpoint->tx_urb;
  49. int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
  50. u32 *data32 = (u32 *) urb->buffer;
  51. u8 *data8 = (u8 *) urb->buffer;
  52. unsigned int i, n, w, b, is_short;
  53. int timeout = 2000; /* 2ms */
  54. if (!urb || !urb->actual_length)
  55. return -1;
  56. n = min_t(unsigned int, urb->actual_length - endpoint->sent,
  57. endpoint->tx_packetSize);
  58. if (n <= 0)
  59. return -1;
  60. usbdbg("write urb on ep %d", ep_num);
  61. #if defined(USBDDBG) && defined(USBDPARANOIA)
  62. usbdbg("urb: buf %p, buf_len %d, actual_len %d",
  63. urb->buffer, urb->buffer_length, urb->actual_length);
  64. usbdbg("endpoint: sent %d, tx_packetSize %d, last %d",
  65. endpoint->sent, endpoint->tx_packetSize, endpoint->last);
  66. #endif
  67. is_short = n != endpoint->tx_packetSize;
  68. w = n / 4;
  69. b = n % 4;
  70. usbdbg("n %d%s w %d b %d", n, is_short ? "-s" : "", w, b);
  71. udc_dump_buffer("urb write", data8 + endpoint->sent, n);
  72. /* Prepare for data send */
  73. if (ep_num)
  74. writel(UDCCSR_PC ,UDCCSN(ep_num));
  75. for (i = 0; i < w; i++)
  76. writel(data32[endpoint->sent / 4 + i], UDCDN(ep_num));
  77. for (i = 0; i < b; i++)
  78. writeb(data8[endpoint->sent + w * 4 + i], UDCDN(ep_num));
  79. /* Set "Packet Complete" if less data then tx_packetSize */
  80. if (is_short)
  81. writel(ep_num ? UDCCSR_SP : UDCCSR0_IPR, UDCCSN(ep_num));
  82. /* Wait for data sent */
  83. if (ep_num) {
  84. while (!(readl(UDCCSN(ep_num)) & UDCCSR_PC)) {
  85. if (timeout-- == 0)
  86. return -1;
  87. else
  88. udelay(1);
  89. }
  90. }
  91. endpoint->last = n;
  92. if (ep_num) {
  93. usbd_tx_complete(endpoint);
  94. } else {
  95. endpoint->sent += n;
  96. endpoint->last -= n;
  97. }
  98. if (endpoint->sent >= urb->actual_length) {
  99. urb->actual_length = 0;
  100. endpoint->sent = 0;
  101. endpoint->last = 0;
  102. }
  103. if ((endpoint->sent >= urb->actual_length) && (!ep_num)) {
  104. usbdbg("ep0 IN stage done");
  105. if (is_short)
  106. ep0state = EP0_IDLE;
  107. else
  108. ep0state = EP0_XFER_COMPLETE;
  109. }
  110. return 0;
  111. }
  112. static int udc_read_urb(struct usb_endpoint_instance *endpoint)
  113. {
  114. struct urb *urb = endpoint->rcv_urb;
  115. int ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
  116. u32 *data32 = (u32 *) urb->buffer;
  117. unsigned int i, n;
  118. usbdbg("read urb on ep %d", ep_num);
  119. #if defined(USBDDBG) && defined(USBDPARANOIA)
  120. usbdbg("urb: buf %p, buf_len %d, actual_len %d",
  121. urb->buffer, urb->buffer_length, urb->actual_length);
  122. usbdbg("endpoint: rcv_packetSize %d",
  123. endpoint->rcv_packetSize);
  124. #endif
  125. if (readl(UDCCSN(ep_num)) & UDCCSR_BNE)
  126. n = readl(UDCBCN(ep_num)) & 0x3ff;
  127. else /* zlp */
  128. n = 0;
  129. usbdbg("n %d%s", n, n != endpoint->rcv_packetSize ? "-s" : "");
  130. for (i = 0; i < n; i += 4)
  131. data32[urb->actual_length / 4 + i / 4] = readl(UDCDN(ep_num));
  132. udc_dump_buffer("urb read", (u8 *) data32, urb->actual_length + n);
  133. usbd_rcv_complete(endpoint, n, 0);
  134. return 0;
  135. }
  136. static int udc_read_urb_ep0(void)
  137. {
  138. u32 *data32 = (u32 *) ep0_urb->buffer;
  139. u8 *data8 = (u8 *) ep0_urb->buffer;
  140. unsigned int i, n, w, b;
  141. usbdbg("read urb on ep 0");
  142. #if defined(USBDDBG) && defined(USBDPARANOIA)
  143. usbdbg("urb: buf %p, buf_len %d, actual_len %d",
  144. ep0_urb->buffer, ep0_urb->buffer_length, ep0_urb->actual_length);
  145. #endif
  146. n = readl(UDCBCR0);
  147. w = n / 4;
  148. b = n % 4;
  149. for (i = 0; i < w; i++) {
  150. data32[ep0_urb->actual_length / 4 + i] = readl(UDCDN(0));
  151. /* ep0_urb->actual_length += 4; */
  152. }
  153. for (i = 0; i < b; i++) {
  154. data8[ep0_urb->actual_length + w * 4 + i] = readb(UDCDN(0));
  155. /* ep0_urb->actual_length++; */
  156. }
  157. ep0_urb->actual_length += n;
  158. udc_dump_buffer("urb read", (u8 *) data32, ep0_urb->actual_length);
  159. writel(UDCCSR0_OPC | UDCCSR0_IPR, UDCCSR0);
  160. if (ep0_urb->actual_length == ep0_urb->device_request.wLength)
  161. return 1;
  162. return 0;
  163. }
  164. static void udc_handle_ep0(struct usb_endpoint_instance *endpoint)
  165. {
  166. u32 udccsr0 = readl(UDCCSR0);
  167. u32 *data = (u32 *) &ep0_urb->device_request;
  168. int i;
  169. usbdbg("udccsr0 %x", udccsr0);
  170. /* Clear stall status */
  171. if (udccsr0 & UDCCSR0_SST) {
  172. usberr("clear stall status");
  173. writel(UDCCSR0_SST, UDCCSR0);
  174. ep0state = EP0_IDLE;
  175. }
  176. /* previous request unfinished? non-error iff back-to-back ... */
  177. if ((udccsr0 & UDCCSR0_SA) != 0 && ep0state != EP0_IDLE)
  178. ep0state = EP0_IDLE;
  179. switch (ep0state) {
  180. case EP0_IDLE:
  181. udccsr0 = readl(UDCCSR0);
  182. /* Start control request? */
  183. if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE))
  184. == (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)) {
  185. /* Read SETUP packet.
  186. * SETUP packet size is 8 bytes (aka 2 words)
  187. */
  188. usbdbg("try reading SETUP packet");
  189. for (i = 0; i < 2; i++) {
  190. if ((readl(UDCCSR0) & UDCCSR0_RNE) == 0) {
  191. usberr("setup packet too short:%d", i);
  192. goto stall;
  193. }
  194. data[i] = readl(UDCDR0);
  195. }
  196. writel(readl(UDCCSR0) | UDCCSR0_OPC | UDCCSR0_SA, UDCCSR0);
  197. if ((readl(UDCCSR0) & UDCCSR0_RNE) != 0) {
  198. usberr("setup packet too long");
  199. goto stall;
  200. }
  201. udc_dump_buffer("ep0 setup read", (u8 *) data, 8);
  202. if (ep0_urb->device_request.wLength == 0) {
  203. usbdbg("Zero Data control Packet\n");
  204. if (ep0_recv_setup(ep0_urb)) {
  205. usberr("Invalid Setup Packet\n");
  206. udc_dump_buffer("ep0 setup read",
  207. (u8 *)data, 8);
  208. goto stall;
  209. }
  210. writel(UDCCSR0_IPR, UDCCSR0);
  211. ep0state = EP0_IDLE;
  212. } else {
  213. /* Check direction */
  214. if ((ep0_urb->device_request.bmRequestType &
  215. USB_REQ_DIRECTION_MASK)
  216. == USB_REQ_HOST2DEVICE) {
  217. ep0state = EP0_OUT_DATA;
  218. ep0_urb->buffer =
  219. (u8 *)ep0_urb->buffer_data;
  220. ep0_urb->buffer_length =
  221. sizeof(ep0_urb->buffer_data);
  222. ep0_urb->actual_length = 0;
  223. writel(UDCCSR0_IPR, UDCCSR0);
  224. } else {
  225. /* The ep0_recv_setup function has
  226. * already placed our response packet
  227. * data in ep0_urb->buffer and the
  228. * packet length in
  229. * ep0_urb->actual_length.
  230. */
  231. if (ep0_recv_setup(ep0_urb)) {
  232. stall:
  233. usberr("Invalid setup packet");
  234. udc_dump_buffer("ep0 setup read"
  235. , (u8 *) data, 8);
  236. ep0state = EP0_IDLE;
  237. writel(UDCCSR0_SA |
  238. UDCCSR0_OPC | UDCCSR0_FST |
  239. UDCCS0_FTF, UDCCSR0);
  240. return;
  241. }
  242. endpoint->tx_urb = ep0_urb;
  243. endpoint->sent = 0;
  244. usbdbg("EP0_IN_DATA");
  245. ep0state = EP0_IN_DATA;
  246. if (udc_write_urb(endpoint) < 0)
  247. goto stall;
  248. }
  249. }
  250. return;
  251. } else if ((udccsr0 & (UDCCSR0_OPC | UDCCSR0_SA))
  252. == (UDCCSR0_OPC|UDCCSR0_SA)) {
  253. usberr("Setup Active but no data. Stalling ....\n");
  254. goto stall;
  255. } else {
  256. usbdbg("random early IRQs");
  257. /* Some random early IRQs:
  258. * - we acked FST
  259. * - IPR cleared
  260. * - OPC got set, without SA (likely status stage)
  261. */
  262. writel(udccsr0 & (UDCCSR0_SA | UDCCSR0_OPC), UDCCSR0);
  263. }
  264. break;
  265. case EP0_OUT_DATA:
  266. if ((udccsr0 & UDCCSR0_OPC) && !(udccsr0 & UDCCSR0_SA)) {
  267. if (udc_read_urb_ep0()) {
  268. read_complete:
  269. ep0state = EP0_IDLE;
  270. if (ep0_recv_setup(ep0_urb)) {
  271. /* Not a setup packet, stall next
  272. * EP0 transaction
  273. */
  274. udc_dump_buffer("ep0 setup read",
  275. (u8 *) data, 8);
  276. usberr("can't parse setup packet\n");
  277. goto stall;
  278. }
  279. }
  280. } else if (!(udccsr0 & UDCCSR0_OPC) &&
  281. !(udccsr0 & UDCCSR0_IPR)) {
  282. if (ep0_urb->device_request.wLength ==
  283. ep0_urb->actual_length)
  284. goto read_complete;
  285. usberr("Premature Status\n");
  286. ep0state = EP0_IDLE;
  287. }
  288. break;
  289. case EP0_IN_DATA:
  290. /* GET_DESCRIPTOR etc */
  291. if (udccsr0 & UDCCSR0_OPC) {
  292. writel(UDCCSR0_OPC | UDCCSR0_FTF, UDCCSR0);
  293. usberr("ep0in premature status");
  294. ep0state = EP0_IDLE;
  295. } else {
  296. /* irq was IPR clearing */
  297. if (udc_write_urb(endpoint) < 0) {
  298. usberr("ep0_write_error\n");
  299. goto stall;
  300. }
  301. }
  302. break;
  303. case EP0_XFER_COMPLETE:
  304. writel(UDCCSR0_IPR, UDCCSR0);
  305. ep0state = EP0_IDLE;
  306. break;
  307. default:
  308. usbdbg("Default\n");
  309. }
  310. writel(USIR0_IR0, USIR0);
  311. }
  312. static void udc_handle_ep(struct usb_endpoint_instance *endpoint)
  313. {
  314. int ep_addr = endpoint->endpoint_address;
  315. int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
  316. int ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
  317. u32 flags = readl(UDCCSN(ep_num)) & (UDCCSR_SST | UDCCSR_TRN);
  318. if (flags)
  319. writel(flags, UDCCSN(ep_num));
  320. if (ep_isout)
  321. udc_read_urb(endpoint);
  322. else
  323. udc_write_urb(endpoint);
  324. writel(UDCCSR_PC, UDCCSN(ep_num));
  325. }
  326. static void udc_state_changed(void)
  327. {
  328. writel(readl(UDCCR) | UDCCR_SMAC, UDCCR);
  329. usbdbg("New UDC settings are: conf %d - inter %d - alter %d",
  330. (readl(UDCCR) & UDCCR_ACN) >> UDCCR_ACN_S,
  331. (readl(UDCCR) & UDCCR_AIN) >> UDCCR_AIN_S,
  332. (readl(UDCCR) & UDCCR_AAISN) >> UDCCR_AAISN_S);
  333. usbd_device_event_irq(udc_device, DEVICE_CONFIGURED, 0);
  334. writel(UDCISR1_IRCC, UDCISR1);
  335. }
  336. void udc_irq(void)
  337. {
  338. int handled;
  339. struct usb_endpoint_instance *endpoint;
  340. int ep_num, i;
  341. u32 udcisr0;
  342. do {
  343. handled = 0;
  344. /* Suspend Interrupt Request */
  345. if (readl(USIR1) & UDCCR_SUSIR) {
  346. usbdbg("Suspend\n");
  347. udc_ack_int_UDCCR(UDCCR_SUSIR);
  348. handled = 1;
  349. ep0state = EP0_IDLE;
  350. }
  351. /* Resume Interrupt Request */
  352. if (readl(USIR1) & UDCCR_RESIR) {
  353. udc_ack_int_UDCCR(UDCCR_RESIR);
  354. handled = 1;
  355. usbdbg("USB resume\n");
  356. }
  357. if (readl(USIR1) & (1<<31)) {
  358. handled = 1;
  359. udc_state_changed();
  360. }
  361. /* Reset Interrupt Request */
  362. if (readl(USIR1) & UDCCR_RSTIR) {
  363. udc_ack_int_UDCCR(UDCCR_RSTIR);
  364. handled = 1;
  365. usbdbg("Reset\n");
  366. usbd_device_event_irq(udc_device, DEVICE_RESET, 0);
  367. } else {
  368. if (readl(USIR0))
  369. usbdbg("UISR0: %x \n", readl(USIR0));
  370. if (readl(USIR0) & 0x2)
  371. writel(0x2, USIR0);
  372. /* Control traffic */
  373. if (readl(USIR0) & USIR0_IR0) {
  374. handled = 1;
  375. writel(USIR0_IR0, USIR0);
  376. udc_handle_ep0(udc_device->bus->endpoint_array);
  377. }
  378. endpoint = udc_device->bus->endpoint_array;
  379. for (i = 0; i < udc_device->bus->max_endpoints; i++) {
  380. ep_num = (endpoint[i].endpoint_address) &
  381. USB_ENDPOINT_NUMBER_MASK;
  382. if (!ep_num)
  383. continue;
  384. udcisr0 = readl(UDCISR0);
  385. if (udcisr0 &
  386. UDCISR_INT(ep_num, UDC_INT_PACKETCMP)) {
  387. writel(UDCISR_INT(ep_num, UDC_INT_PACKETCMP),
  388. UDCISR0);
  389. udc_handle_ep(&endpoint[i]);
  390. }
  391. }
  392. }
  393. } while (handled);
  394. }
  395. /* The UDCCR reg contains mask and interrupt status bits,
  396. * so using '|=' isn't safe as it may ack an interrupt.
  397. */
  398. #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */
  399. #define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_UDE)
  400. static inline void udc_set_mask_UDCCR(int mask)
  401. {
  402. writel((readl(UDCCR) & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS), UDCCR);
  403. }
  404. static inline void udc_clear_mask_UDCCR(int mask)
  405. {
  406. writel((readl(UDCCR) & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS), UDCCR);
  407. }
  408. static void pio_irq_enable(int ep_num)
  409. {
  410. if (ep_num < 16)
  411. writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0);
  412. else {
  413. ep_num -= 16;
  414. writel(readl(UDCICR1) | 3 << (ep_num * 2), UDCICR1);
  415. }
  416. }
  417. /*
  418. * udc_set_nak
  419. *
  420. * Allow upper layers to signal lower layers should not accept more RX data
  421. */
  422. void udc_set_nak(int ep_num)
  423. {
  424. /* TODO */
  425. }
  426. /*
  427. * udc_unset_nak
  428. *
  429. * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
  430. * Switch off NAKing on this endpoint to accept more data output from host.
  431. */
  432. void udc_unset_nak(int ep_num)
  433. {
  434. /* TODO */
  435. }
  436. int udc_endpoint_write(struct usb_endpoint_instance *endpoint)
  437. {
  438. return udc_write_urb(endpoint);
  439. }
  440. /* Associate a physical endpoint with endpoint instance */
  441. void udc_setup_ep(struct usb_device_instance *device, unsigned int id,
  442. struct usb_endpoint_instance *endpoint)
  443. {
  444. int ep_num, ep_addr, ep_isout, ep_type, ep_size;
  445. int config, interface, alternate;
  446. u32 tmp;
  447. usbdbg("setting up endpoint id %d", id);
  448. if (!endpoint) {
  449. usberr("endpoint void!");
  450. return;
  451. }
  452. ep_num = endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
  453. if (ep_num >= UDC_MAX_ENDPOINTS) {
  454. usberr("unable to setup ep %d!", ep_num);
  455. return;
  456. }
  457. pio_irq_enable(ep_num);
  458. if (ep_num == 0) {
  459. /* Done for ep0 */
  460. return;
  461. }
  462. config = 1;
  463. interface = 0;
  464. alternate = 0;
  465. usbdbg("config %d - interface %d - alternate %d",
  466. config, interface, alternate);
  467. ep_addr = endpoint->endpoint_address;
  468. ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
  469. ep_isout = (ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT;
  470. ep_type = ep_isout ? endpoint->rcv_attributes : endpoint->tx_attributes;
  471. ep_size = ep_isout ? endpoint->rcv_packetSize : endpoint->tx_packetSize;
  472. usbdbg("addr %x, num %d, dir %s, type %s, packet size %d",
  473. ep_addr, ep_num,
  474. ep_isout ? "out" : "in",
  475. ep_type == USB_ENDPOINT_XFER_ISOC ? "isoc" :
  476. ep_type == USB_ENDPOINT_XFER_BULK ? "bulk" :
  477. ep_type == USB_ENDPOINT_XFER_INT ? "int" : "???",
  478. ep_size
  479. );
  480. /* Configure UDCCRx */
  481. tmp = 0;
  482. tmp |= (config << UDCCONR_CN_S) & UDCCONR_CN;
  483. tmp |= (interface << UDCCONR_IN_S) & UDCCONR_IN;
  484. tmp |= (alternate << UDCCONR_AISN_S) & UDCCONR_AISN;
  485. tmp |= (ep_num << UDCCONR_EN_S) & UDCCONR_EN;
  486. tmp |= (ep_type << UDCCONR_ET_S) & UDCCONR_ET;
  487. tmp |= ep_isout ? 0 : UDCCONR_ED;
  488. tmp |= (ep_size << UDCCONR_MPS_S) & UDCCONR_MPS;
  489. tmp |= UDCCONR_EE;
  490. writel(tmp, UDCCN(ep_num));
  491. usbdbg("UDCCR%c = %x", 'A' + ep_num-1, readl(UDCCN(ep_num)));
  492. usbdbg("UDCCSR%c = %x", 'A' + ep_num-1, readl(UDCCSN(ep_num)));
  493. }
  494. /* Connect the USB device to the bus */
  495. void udc_connect(void)
  496. {
  497. usbdbg("UDC connect");
  498. #ifdef CONFIG_USB_DEV_PULLUP_GPIO
  499. /* Turn on the USB connection by enabling the pullup resistor */
  500. writel(readl(GPDR(CONFIG_USB_DEV_PULLUP_GPIO))
  501. | GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO),
  502. GPDR(CONFIG_USB_DEV_PULLUP_GPIO));
  503. writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPSR(CONFIG_USB_DEV_PULLUP_GPIO));
  504. #else
  505. /* Host port 2 transceiver D+ pull up enable */
  506. writel(readl(UP2OCR) | UP2OCR_DPPUE, UP2OCR);
  507. #endif
  508. }
  509. /* Disconnect the USB device to the bus */
  510. void udc_disconnect(void)
  511. {
  512. usbdbg("UDC disconnect");
  513. #ifdef CONFIG_USB_DEV_PULLUP_GPIO
  514. /* Turn off the USB connection by disabling the pullup resistor */
  515. writel(GPIO_bit(CONFIG_USB_DEV_PULLUP_GPIO), GPCR(CONFIG_USB_DEV_PULLUP_GPIO));
  516. #else
  517. /* Host port 2 transceiver D+ pull up disable */
  518. writel(readl(UP2OCR) & ~UP2OCR_DPPUE, UP2OCR);
  519. #endif
  520. }
  521. /* Switch on the UDC */
  522. void udc_enable(struct usb_device_instance *device)
  523. {
  524. ep0state = EP0_IDLE;
  525. /* enable endpoint 0, A, B's Packet Complete Interrupt. */
  526. writel(0xffffffff, UDCICR0);
  527. writel(0xa8000000, UDCICR1);
  528. /* clear the interrupt status/control registers */
  529. writel(0xffffffff, UDCISR0);
  530. writel(0xffffffff, UDCISR1);
  531. /* set UDC-enable */
  532. udc_set_mask_UDCCR(UDCCR_UDE);
  533. udc_device = device;
  534. if (!ep0_urb)
  535. ep0_urb = usbd_alloc_urb(udc_device,
  536. udc_device->bus->endpoint_array);
  537. else
  538. usbinfo("ep0_urb %p already allocated", ep0_urb);
  539. usbdbg("UDC Enabled\n");
  540. }
  541. /* Need to check this again */
  542. void udc_disable(void)
  543. {
  544. usbdbg("disable UDC");
  545. udc_clear_mask_UDCCR(UDCCR_UDE);
  546. /* Disable clock for USB device */
  547. writel(readl(CKEN) & ~CKEN11_USB, CKEN);
  548. /* Free ep0 URB */
  549. if (ep0_urb) {
  550. usbd_dealloc_urb(ep0_urb);
  551. ep0_urb = NULL;
  552. }
  553. /* Reset device pointer */
  554. udc_device = NULL;
  555. }
  556. /* Allow udc code to do any additional startup */
  557. void udc_startup_events(struct usb_device_instance *device)
  558. {
  559. /* The DEVICE_INIT event puts the USB device in the state STATE_INIT */
  560. usbd_device_event_irq(device, DEVICE_INIT, 0);
  561. /* The DEVICE_CREATE event puts the USB device in the state
  562. * STATE_ATTACHED */
  563. usbd_device_event_irq(device, DEVICE_CREATE, 0);
  564. /* Some USB controller driver implementations signal
  565. * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here.
  566. * DEVICE_HUB_CONFIGURED causes a transition to the state
  567. * STATE_POWERED, and DEVICE_RESET causes a transition to
  568. * the state STATE_DEFAULT.
  569. */
  570. udc_enable(device);
  571. }
  572. /* Initialize h/w stuff */
  573. int udc_init(void)
  574. {
  575. udc_device = NULL;
  576. usbdbg("PXA27x usbd start");
  577. /* Enable clock for USB device */
  578. writel(readl(CKEN) | CKEN11_USB, CKEN);
  579. /* Disable the UDC */
  580. udc_clear_mask_UDCCR(UDCCR_UDE);
  581. /* Disable IRQs: we don't use them */
  582. writel(0, UDCICR0);
  583. writel(0, UDCICR1);
  584. return 0;
  585. }