ide.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2011
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <ata.h>
  8. #include <blk.h>
  9. #include <dm.h>
  10. #include <ide.h>
  11. #include <part.h>
  12. #include <watchdog.h>
  13. #include <asm/io.h>
  14. #ifdef __PPC__
  15. # define EIEIO __asm__ volatile ("eieio")
  16. # define SYNC __asm__ volatile ("sync")
  17. #else
  18. # define EIEIO /* nothing */
  19. # define SYNC /* nothing */
  20. #endif
  21. /* Current offset for IDE0 / IDE1 bus access */
  22. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  23. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  24. CONFIG_SYS_ATA_IDE0_OFFSET,
  25. #endif
  26. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  27. CONFIG_SYS_ATA_IDE1_OFFSET,
  28. #endif
  29. };
  30. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  31. struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  32. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  33. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  34. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  35. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  36. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  37. #endif
  38. #ifdef CONFIG_IDE_RESET
  39. extern void ide_set_reset(int idereset);
  40. static void ide_reset(void)
  41. {
  42. int i;
  43. for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
  44. ide_bus_ok[i] = 0;
  45. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
  46. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  47. ide_set_reset(1); /* assert reset */
  48. /* the reset signal shall be asserted for et least 25 us */
  49. udelay(25);
  50. WATCHDOG_RESET();
  51. /* de-assert RESET signal */
  52. ide_set_reset(0);
  53. /* wait 250 ms */
  54. for (i = 0; i < 250; ++i)
  55. udelay(1000);
  56. }
  57. #else
  58. #define ide_reset() /* dummy */
  59. #endif /* CONFIG_IDE_RESET */
  60. /*
  61. * Wait until Busy bit is off, or timeout (in ms)
  62. * Return last status
  63. */
  64. static uchar ide_wait(int dev, ulong t)
  65. {
  66. ulong delay = 10 * t; /* poll every 100 us */
  67. uchar c;
  68. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  69. udelay(100);
  70. if (delay-- == 0)
  71. break;
  72. }
  73. return c;
  74. }
  75. /*
  76. * copy src to dest, skipping leading and trailing blanks and null
  77. * terminate the string
  78. * "len" is the size of available memory including the terminating '\0'
  79. */
  80. static void ident_cpy(unsigned char *dst, unsigned char *src,
  81. unsigned int len)
  82. {
  83. unsigned char *end, *last;
  84. last = dst;
  85. end = src + len - 1;
  86. /* reserve space for '\0' */
  87. if (len < 2)
  88. goto OUT;
  89. /* skip leading white space */
  90. while ((*src) && (src < end) && (*src == ' '))
  91. ++src;
  92. /* copy string, omitting trailing white space */
  93. while ((*src) && (src < end)) {
  94. *dst++ = *src;
  95. if (*src++ != ' ')
  96. last = dst;
  97. }
  98. OUT:
  99. *last = '\0';
  100. }
  101. #ifdef CONFIG_ATAPI
  102. /****************************************************************************
  103. * ATAPI Support
  104. */
  105. #if defined(CONFIG_IDE_SWAP_IO)
  106. /* since ATAPI may use commands with not 4 bytes alligned length
  107. * we have our own transfer functions, 2 bytes alligned */
  108. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  109. {
  110. ushort *dbuf;
  111. volatile ushort *pbuf;
  112. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  113. dbuf = (ushort *)sect_buf;
  114. debug("in output data shorts base for read is %lx\n",
  115. (unsigned long) pbuf);
  116. while (shorts--) {
  117. EIEIO;
  118. *pbuf = *dbuf++;
  119. }
  120. }
  121. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  122. {
  123. ushort *dbuf;
  124. volatile ushort *pbuf;
  125. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  126. dbuf = (ushort *)sect_buf;
  127. debug("in input data shorts base for read is %lx\n",
  128. (unsigned long) pbuf);
  129. while (shorts--) {
  130. EIEIO;
  131. *dbuf++ = *pbuf;
  132. }
  133. }
  134. #else /* ! CONFIG_IDE_SWAP_IO */
  135. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  136. {
  137. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  138. }
  139. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  140. {
  141. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  142. }
  143. #endif /* CONFIG_IDE_SWAP_IO */
  144. /*
  145. * Wait until (Status & mask) == res, or timeout (in ms)
  146. * Return last status
  147. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  148. * and then they set their DRQ Bit
  149. */
  150. static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
  151. {
  152. ulong delay = 10 * t; /* poll every 100 us */
  153. uchar c;
  154. /* prevents to read the status before valid */
  155. c = ide_inb(dev, ATA_DEV_CTL);
  156. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  157. /* break if error occurs (doesn't make sense to wait more) */
  158. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
  159. break;
  160. udelay(100);
  161. if (delay-- == 0)
  162. break;
  163. }
  164. return c;
  165. }
  166. /*
  167. * issue an atapi command
  168. */
  169. unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
  170. unsigned char *buffer, int buflen)
  171. {
  172. unsigned char c, err, mask, res;
  173. int n;
  174. /* Select device
  175. */
  176. mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
  177. res = 0;
  178. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  179. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  180. if ((c & mask) != res) {
  181. printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
  182. c);
  183. err = 0xFF;
  184. goto AI_OUT;
  185. }
  186. /* write taskfile */
  187. ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  188. ide_outb(device, ATA_SECT_CNT, 0);
  189. ide_outb(device, ATA_SECT_NUM, 0);
  190. ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
  191. ide_outb(device, ATA_CYL_HIGH,
  192. (unsigned char) ((buflen >> 8) & 0xFF));
  193. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  194. ide_outb(device, ATA_COMMAND, ATA_CMD_PACKET);
  195. udelay(50);
  196. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  197. res = ATA_STAT_DRQ;
  198. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  199. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  200. printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
  201. device, c);
  202. err = 0xFF;
  203. goto AI_OUT;
  204. }
  205. /* write command block */
  206. ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
  207. /* ATAPI Command written wait for completition */
  208. udelay(5000); /* device must set bsy */
  209. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  210. /*
  211. * if no data wait for DRQ = 0 BSY = 0
  212. * if data wait for DRQ = 1 BSY = 0
  213. */
  214. res = 0;
  215. if (buflen)
  216. res = ATA_STAT_DRQ;
  217. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  218. if ((c & mask) != res) {
  219. if (c & ATA_STAT_ERR) {
  220. err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
  221. debug("atapi_issue 1 returned sense key %X status %02X\n",
  222. err, c);
  223. } else {
  224. printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
  225. ccb[0], c);
  226. err = 0xFF;
  227. }
  228. goto AI_OUT;
  229. }
  230. n = ide_inb(device, ATA_CYL_HIGH);
  231. n <<= 8;
  232. n += ide_inb(device, ATA_CYL_LOW);
  233. if (n > buflen) {
  234. printf("ERROR, transfer bytes %d requested only %d\n", n,
  235. buflen);
  236. err = 0xff;
  237. goto AI_OUT;
  238. }
  239. if ((n == 0) && (buflen < 0)) {
  240. printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
  241. err = 0xff;
  242. goto AI_OUT;
  243. }
  244. if (n != buflen) {
  245. debug("WARNING, transfer bytes %d not equal with requested %d\n",
  246. n, buflen);
  247. }
  248. if (n != 0) { /* data transfer */
  249. debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
  250. /* we transfer shorts */
  251. n >>= 1;
  252. /* ok now decide if it is an in or output */
  253. if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
  254. debug("Write to device\n");
  255. ide_output_data_shorts(device, (unsigned short *)buffer,
  256. n);
  257. } else {
  258. debug("Read from device @ %p shorts %d\n", buffer, n);
  259. ide_input_data_shorts(device, (unsigned short *)buffer,
  260. n);
  261. }
  262. }
  263. udelay(5000); /* seems that some CD ROMs need this... */
  264. mask = ATA_STAT_BUSY | ATA_STAT_ERR;
  265. res = 0;
  266. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  267. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  268. err = (ide_inb(device, ATA_ERROR_REG) >> 4);
  269. debug("atapi_issue 2 returned sense key %X status %X\n", err,
  270. c);
  271. } else {
  272. err = 0;
  273. }
  274. AI_OUT:
  275. return err;
  276. }
  277. /*
  278. * sending the command to atapi_issue. If an status other than good
  279. * returns, an request_sense will be issued
  280. */
  281. #define ATAPI_DRIVE_NOT_READY 100
  282. #define ATAPI_UNIT_ATTN 10
  283. unsigned char atapi_issue_autoreq(int device,
  284. unsigned char *ccb,
  285. int ccblen,
  286. unsigned char *buffer, int buflen)
  287. {
  288. unsigned char sense_data[18], sense_ccb[12];
  289. unsigned char res, key, asc, ascq;
  290. int notready, unitattn;
  291. unitattn = ATAPI_UNIT_ATTN;
  292. notready = ATAPI_DRIVE_NOT_READY;
  293. retry:
  294. res = atapi_issue(device, ccb, ccblen, buffer, buflen);
  295. if (res == 0)
  296. return 0; /* Ok */
  297. if (res == 0xFF)
  298. return 0xFF; /* error */
  299. debug("(auto_req)atapi_issue returned sense key %X\n", res);
  300. memset(sense_ccb, 0, sizeof(sense_ccb));
  301. memset(sense_data, 0, sizeof(sense_data));
  302. sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
  303. sense_ccb[4] = 18; /* allocation Length */
  304. res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
  305. key = (sense_data[2] & 0xF);
  306. asc = (sense_data[12]);
  307. ascq = (sense_data[13]);
  308. debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
  309. debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  310. sense_data[0], key, asc, ascq);
  311. if ((key == 0))
  312. return 0; /* ok device ready */
  313. if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
  314. if (unitattn-- > 0) {
  315. udelay(200 * 1000);
  316. goto retry;
  317. }
  318. printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
  319. goto error;
  320. }
  321. if ((asc == 0x4) && (ascq == 0x1)) {
  322. /* not ready, but will be ready soon */
  323. if (notready-- > 0) {
  324. udelay(200 * 1000);
  325. goto retry;
  326. }
  327. printf("Drive not ready, tried %d times\n",
  328. ATAPI_DRIVE_NOT_READY);
  329. goto error;
  330. }
  331. if (asc == 0x3a) {
  332. debug("Media not present\n");
  333. goto error;
  334. }
  335. printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
  336. ascq);
  337. error:
  338. debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
  339. return 0xFF;
  340. }
  341. /*
  342. * atapi_read:
  343. * we transfer only one block per command, since the multiple DRQ per
  344. * command is not yet implemented
  345. */
  346. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  347. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  348. #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
  349. ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  350. void *buffer)
  351. {
  352. int device = block_dev->devnum;
  353. ulong n = 0;
  354. unsigned char ccb[12]; /* Command descriptor block */
  355. ulong cnt;
  356. debug("atapi_read dev %d start " LBAF " blocks " LBAF
  357. " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
  358. do {
  359. if (blkcnt > ATAPI_READ_MAX_BLOCK)
  360. cnt = ATAPI_READ_MAX_BLOCK;
  361. else
  362. cnt = blkcnt;
  363. ccb[0] = ATAPI_CMD_READ_12;
  364. ccb[1] = 0; /* reserved */
  365. ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
  366. ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
  367. ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
  368. ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
  369. ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
  370. ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
  371. ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
  372. ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
  373. ccb[10] = 0; /* reserved */
  374. ccb[11] = 0; /* reserved */
  375. if (atapi_issue_autoreq(device, ccb, 12,
  376. (unsigned char *)buffer,
  377. cnt * ATAPI_READ_BLOCK_SIZE)
  378. == 0xFF) {
  379. return n;
  380. }
  381. n += cnt;
  382. blkcnt -= cnt;
  383. blknr += cnt;
  384. buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
  385. } while (blkcnt > 0);
  386. return n;
  387. }
  388. static void atapi_inquiry(struct blk_desc *dev_desc)
  389. {
  390. unsigned char ccb[12]; /* Command descriptor block */
  391. unsigned char iobuf[64]; /* temp buf */
  392. unsigned char c;
  393. int device;
  394. device = dev_desc->devnum;
  395. dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
  396. #ifndef CONFIG_BLK
  397. dev_desc->block_read = atapi_read;
  398. #endif
  399. memset(ccb, 0, sizeof(ccb));
  400. memset(iobuf, 0, sizeof(iobuf));
  401. ccb[0] = ATAPI_CMD_INQUIRY;
  402. ccb[4] = 40; /* allocation Legnth */
  403. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
  404. debug("ATAPI_CMD_INQUIRY returned %x\n", c);
  405. if (c != 0)
  406. return;
  407. /* copy device ident strings */
  408. ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
  409. ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
  410. ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
  411. dev_desc->lun = 0;
  412. dev_desc->lba = 0;
  413. dev_desc->blksz = 0;
  414. dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
  415. dev_desc->type = iobuf[0] & 0x1f;
  416. if ((iobuf[1] & 0x80) == 0x80)
  417. dev_desc->removable = 1;
  418. else
  419. dev_desc->removable = 0;
  420. memset(ccb, 0, sizeof(ccb));
  421. memset(iobuf, 0, sizeof(iobuf));
  422. ccb[0] = ATAPI_CMD_START_STOP;
  423. ccb[4] = 0x03; /* start */
  424. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  425. debug("ATAPI_CMD_START_STOP returned %x\n", c);
  426. if (c != 0)
  427. return;
  428. memset(ccb, 0, sizeof(ccb));
  429. memset(iobuf, 0, sizeof(iobuf));
  430. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  431. debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
  432. if (c != 0)
  433. return;
  434. memset(ccb, 0, sizeof(ccb));
  435. memset(iobuf, 0, sizeof(iobuf));
  436. ccb[0] = ATAPI_CMD_READ_CAP;
  437. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
  438. debug("ATAPI_CMD_READ_CAP returned %x\n", c);
  439. if (c != 0)
  440. return;
  441. debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  442. iobuf[0], iobuf[1], iobuf[2], iobuf[3],
  443. iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
  444. dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
  445. ((unsigned long) iobuf[1] << 16) +
  446. ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
  447. dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
  448. ((unsigned long) iobuf[5] << 16) +
  449. ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
  450. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  451. #ifdef CONFIG_LBA48
  452. /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  453. dev_desc->lba48 = 0;
  454. #endif
  455. return;
  456. }
  457. #endif /* CONFIG_ATAPI */
  458. static void ide_ident(struct blk_desc *dev_desc)
  459. {
  460. unsigned char c;
  461. hd_driveid_t iop;
  462. #ifdef CONFIG_ATAPI
  463. int retries = 0;
  464. #endif
  465. int device;
  466. device = dev_desc->devnum;
  467. printf(" Device %d: ", device);
  468. /* Select device
  469. */
  470. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  471. dev_desc->if_type = IF_TYPE_IDE;
  472. #ifdef CONFIG_ATAPI
  473. retries = 0;
  474. /* Warning: This will be tricky to read */
  475. while (retries <= 1) {
  476. /* check signature */
  477. if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
  478. (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
  479. (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
  480. (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
  481. /* ATAPI Signature found */
  482. dev_desc->if_type = IF_TYPE_ATAPI;
  483. /*
  484. * Start Ident Command
  485. */
  486. ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATAPI);
  487. /*
  488. * Wait for completion - ATAPI devices need more time
  489. * to become ready
  490. */
  491. c = ide_wait(device, ATAPI_TIME_OUT);
  492. } else
  493. #endif
  494. {
  495. /*
  496. * Start Ident Command
  497. */
  498. ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATA);
  499. /*
  500. * Wait for completion
  501. */
  502. c = ide_wait(device, IDE_TIME_OUT);
  503. }
  504. if (((c & ATA_STAT_DRQ) == 0) ||
  505. ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
  506. #ifdef CONFIG_ATAPI
  507. {
  508. /*
  509. * Need to soft reset the device
  510. * in case it's an ATAPI...
  511. */
  512. debug("Retrying...\n");
  513. ide_outb(device, ATA_DEV_HD,
  514. ATA_LBA | ATA_DEVICE(device));
  515. udelay(100000);
  516. ide_outb(device, ATA_COMMAND, 0x08);
  517. udelay(500000); /* 500 ms */
  518. }
  519. /*
  520. * Select device
  521. */
  522. ide_outb(device, ATA_DEV_HD,
  523. ATA_LBA | ATA_DEVICE(device));
  524. retries++;
  525. #else
  526. return;
  527. #endif
  528. }
  529. #ifdef CONFIG_ATAPI
  530. else
  531. break;
  532. } /* see above - ugly to read */
  533. if (retries == 2) /* Not found */
  534. return;
  535. #endif
  536. ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
  537. ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
  538. sizeof(dev_desc->revision));
  539. ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
  540. sizeof(dev_desc->vendor));
  541. ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
  542. sizeof(dev_desc->product));
  543. #ifdef __LITTLE_ENDIAN
  544. /*
  545. * firmware revision, model, and serial number have Big Endian Byte
  546. * order in Word. Convert all three to little endian.
  547. *
  548. * See CF+ and CompactFlash Specification Revision 2.0:
  549. * 6.2.1.6: Identify Drive, Table 39 for more details
  550. */
  551. strswab(dev_desc->revision);
  552. strswab(dev_desc->vendor);
  553. strswab(dev_desc->product);
  554. #endif /* __LITTLE_ENDIAN */
  555. if ((iop.config & 0x0080) == 0x0080)
  556. dev_desc->removable = 1;
  557. else
  558. dev_desc->removable = 0;
  559. #ifdef CONFIG_ATAPI
  560. if (dev_desc->if_type == IF_TYPE_ATAPI) {
  561. atapi_inquiry(dev_desc);
  562. return;
  563. }
  564. #endif /* CONFIG_ATAPI */
  565. #ifdef __BIG_ENDIAN
  566. /* swap shorts */
  567. dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
  568. #else /* ! __BIG_ENDIAN */
  569. /*
  570. * do not swap shorts on little endian
  571. *
  572. * See CF+ and CompactFlash Specification Revision 2.0:
  573. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  574. */
  575. dev_desc->lba = iop.lba_capacity;
  576. #endif /* __BIG_ENDIAN */
  577. #ifdef CONFIG_LBA48
  578. if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
  579. dev_desc->lba48 = 1;
  580. dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
  581. ((unsigned long long) iop.lba48_capacity[1] << 16) |
  582. ((unsigned long long) iop.lba48_capacity[2] << 32) |
  583. ((unsigned long long) iop.lba48_capacity[3] << 48);
  584. } else {
  585. dev_desc->lba48 = 0;
  586. }
  587. #endif /* CONFIG_LBA48 */
  588. /* assuming HD */
  589. dev_desc->type = DEV_TYPE_HARDDISK;
  590. dev_desc->blksz = ATA_BLOCKSIZE;
  591. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  592. dev_desc->lun = 0; /* just to fill something in... */
  593. #if 0 /* only used to test the powersaving mode,
  594. * if enabled, the drive goes after 5 sec
  595. * in standby mode */
  596. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  597. c = ide_wait(device, IDE_TIME_OUT);
  598. ide_outb(device, ATA_SECT_CNT, 1);
  599. ide_outb(device, ATA_LBA_LOW, 0);
  600. ide_outb(device, ATA_LBA_MID, 0);
  601. ide_outb(device, ATA_LBA_HIGH, 0);
  602. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  603. ide_outb(device, ATA_COMMAND, 0xe3);
  604. udelay(50);
  605. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  606. #endif
  607. }
  608. __weak void ide_outb(int dev, int port, unsigned char val)
  609. {
  610. debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  611. dev, port, val,
  612. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  613. #if defined(CONFIG_IDE_AHB)
  614. if (port) {
  615. /* write command */
  616. ide_write_register(dev, port, val);
  617. } else {
  618. /* write data */
  619. outb(val, (ATA_CURR_BASE(dev)));
  620. }
  621. #else
  622. outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  623. #endif
  624. }
  625. __weak unsigned char ide_inb(int dev, int port)
  626. {
  627. uchar val;
  628. #if defined(CONFIG_IDE_AHB)
  629. val = ide_read_register(dev, port);
  630. #else
  631. val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  632. #endif
  633. debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  634. dev, port,
  635. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  636. return val;
  637. }
  638. void ide_init(void)
  639. {
  640. unsigned char c;
  641. int i, bus;
  642. #ifdef CONFIG_IDE_PREINIT
  643. WATCHDOG_RESET();
  644. if (ide_preinit()) {
  645. puts("ide_preinit failed\n");
  646. return;
  647. }
  648. #endif /* CONFIG_IDE_PREINIT */
  649. WATCHDOG_RESET();
  650. /* ATAPI Drives seems to need a proper IDE Reset */
  651. ide_reset();
  652. /*
  653. * Wait for IDE to get ready.
  654. * According to spec, this can take up to 31 seconds!
  655. */
  656. for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
  657. int dev =
  658. bus * (CONFIG_SYS_IDE_MAXDEVICE /
  659. CONFIG_SYS_IDE_MAXBUS);
  660. printf("Bus %d: ", bus);
  661. ide_bus_ok[bus] = 0;
  662. /* Select device
  663. */
  664. udelay(100000); /* 100 ms */
  665. ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  666. udelay(100000); /* 100 ms */
  667. i = 0;
  668. do {
  669. udelay(10000); /* 10 ms */
  670. c = ide_inb(dev, ATA_STATUS);
  671. i++;
  672. if (i > (ATA_RESET_TIME * 100)) {
  673. puts("** Timeout **\n");
  674. return;
  675. }
  676. if ((i >= 100) && ((i % 100) == 0))
  677. putc('.');
  678. } while (c & ATA_STAT_BUSY);
  679. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  680. puts("not available ");
  681. debug("Status = 0x%02X ", c);
  682. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  683. } else if ((c & ATA_STAT_READY) == 0) {
  684. puts("not available ");
  685. debug("Status = 0x%02X ", c);
  686. #endif
  687. } else {
  688. puts("OK ");
  689. ide_bus_ok[bus] = 1;
  690. }
  691. WATCHDOG_RESET();
  692. }
  693. putc('\n');
  694. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  695. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  696. ide_dev_desc[i].if_type = IF_TYPE_IDE;
  697. ide_dev_desc[i].devnum = i;
  698. ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
  699. ide_dev_desc[i].blksz = 0;
  700. ide_dev_desc[i].log2blksz =
  701. LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
  702. ide_dev_desc[i].lba = 0;
  703. #ifndef CONFIG_BLK
  704. ide_dev_desc[i].block_read = ide_read;
  705. ide_dev_desc[i].block_write = ide_write;
  706. #endif
  707. if (!ide_bus_ok[IDE_BUS(i)])
  708. continue;
  709. ide_ident(&ide_dev_desc[i]);
  710. dev_print(&ide_dev_desc[i]);
  711. #ifndef CONFIG_BLK
  712. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  713. /* initialize partition type */
  714. part_init(&ide_dev_desc[i]);
  715. }
  716. #endif
  717. }
  718. WATCHDOG_RESET();
  719. #ifdef CONFIG_BLK
  720. struct udevice *dev;
  721. uclass_first_device(UCLASS_IDE, &dev);
  722. #endif
  723. }
  724. /* We only need to swap data if we are running on a big endian cpu. */
  725. #if defined(__LITTLE_ENDIAN)
  726. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  727. {
  728. ide_input_data(dev, sect_buf, words);
  729. }
  730. #else
  731. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  732. {
  733. volatile ushort *pbuf =
  734. (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  735. ushort *dbuf = (ushort *)sect_buf;
  736. debug("in input swap data base for read is %lx\n",
  737. (unsigned long) pbuf);
  738. while (words--) {
  739. #ifdef __MIPS__
  740. *dbuf++ = swab16p((u16 *)pbuf);
  741. *dbuf++ = swab16p((u16 *)pbuf);
  742. #else
  743. *dbuf++ = ld_le16(pbuf);
  744. *dbuf++ = ld_le16(pbuf);
  745. #endif /* !MIPS */
  746. }
  747. }
  748. #endif /* __LITTLE_ENDIAN */
  749. #if defined(CONFIG_IDE_SWAP_IO)
  750. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  751. {
  752. ushort *dbuf;
  753. volatile ushort *pbuf;
  754. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  755. dbuf = (ushort *)sect_buf;
  756. while (words--) {
  757. EIEIO;
  758. *pbuf = *dbuf++;
  759. EIEIO;
  760. *pbuf = *dbuf++;
  761. }
  762. }
  763. #else /* ! CONFIG_IDE_SWAP_IO */
  764. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  765. {
  766. #if defined(CONFIG_IDE_AHB)
  767. ide_write_data(dev, sect_buf, words);
  768. #else
  769. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  770. #endif
  771. }
  772. #endif /* CONFIG_IDE_SWAP_IO */
  773. #if defined(CONFIG_IDE_SWAP_IO)
  774. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  775. {
  776. ushort *dbuf;
  777. volatile ushort *pbuf;
  778. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  779. dbuf = (ushort *)sect_buf;
  780. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  781. while (words--) {
  782. EIEIO;
  783. *dbuf++ = *pbuf;
  784. EIEIO;
  785. *dbuf++ = *pbuf;
  786. }
  787. }
  788. #else /* ! CONFIG_IDE_SWAP_IO */
  789. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  790. {
  791. #if defined(CONFIG_IDE_AHB)
  792. ide_read_data(dev, sect_buf, words);
  793. #else
  794. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  795. #endif
  796. }
  797. #endif /* CONFIG_IDE_SWAP_IO */
  798. #ifdef CONFIG_BLK
  799. ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  800. void *buffer)
  801. #else
  802. ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  803. void *buffer)
  804. #endif
  805. {
  806. #ifdef CONFIG_BLK
  807. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  808. #endif
  809. int device = block_dev->devnum;
  810. ulong n = 0;
  811. unsigned char c;
  812. unsigned char pwrsave = 0; /* power save */
  813. #ifdef CONFIG_LBA48
  814. unsigned char lba48 = 0;
  815. if (blknr & 0x0000fffff0000000ULL) {
  816. /* more than 28 bits used, use 48bit mode */
  817. lba48 = 1;
  818. }
  819. #endif
  820. debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
  821. device, blknr, blkcnt, (ulong) buffer);
  822. /* Select device
  823. */
  824. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  825. c = ide_wait(device, IDE_TIME_OUT);
  826. if (c & ATA_STAT_BUSY) {
  827. printf("IDE read: device %d not ready\n", device);
  828. goto IDE_READ_E;
  829. }
  830. /* first check if the drive is in Powersaving mode, if yes,
  831. * increase the timeout value */
  832. ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_POWER);
  833. udelay(50);
  834. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  835. if (c & ATA_STAT_BUSY) {
  836. printf("IDE read: device %d not ready\n", device);
  837. goto IDE_READ_E;
  838. }
  839. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  840. printf("No Powersaving mode %X\n", c);
  841. } else {
  842. c = ide_inb(device, ATA_SECT_CNT);
  843. debug("Powersaving %02X\n", c);
  844. if (c == 0)
  845. pwrsave = 1;
  846. }
  847. while (blkcnt-- > 0) {
  848. c = ide_wait(device, IDE_TIME_OUT);
  849. if (c & ATA_STAT_BUSY) {
  850. printf("IDE read: device %d not ready\n", device);
  851. break;
  852. }
  853. #ifdef CONFIG_LBA48
  854. if (lba48) {
  855. /* write high bits */
  856. ide_outb(device, ATA_SECT_CNT, 0);
  857. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  858. #ifdef CONFIG_SYS_64BIT_LBA
  859. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  860. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  861. #else
  862. ide_outb(device, ATA_LBA_MID, 0);
  863. ide_outb(device, ATA_LBA_HIGH, 0);
  864. #endif
  865. }
  866. #endif
  867. ide_outb(device, ATA_SECT_CNT, 1);
  868. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  869. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  870. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  871. #ifdef CONFIG_LBA48
  872. if (lba48) {
  873. ide_outb(device, ATA_DEV_HD,
  874. ATA_LBA | ATA_DEVICE(device));
  875. ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
  876. } else
  877. #endif
  878. {
  879. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  880. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  881. ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
  882. }
  883. udelay(50);
  884. if (pwrsave) {
  885. /* may take up to 4 sec */
  886. c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
  887. pwrsave = 0;
  888. } else {
  889. /* can't take over 500 ms */
  890. c = ide_wait(device, IDE_TIME_OUT);
  891. }
  892. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  893. ATA_STAT_DRQ) {
  894. printf("Error (no IRQ) dev %d blk " LBAF
  895. ": status %#02x\n", device, blknr, c);
  896. break;
  897. }
  898. ide_input_data(device, buffer, ATA_SECTORWORDS);
  899. (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
  900. ++n;
  901. ++blknr;
  902. buffer += ATA_BLOCKSIZE;
  903. }
  904. IDE_READ_E:
  905. return n;
  906. }
  907. #ifdef CONFIG_BLK
  908. ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  909. const void *buffer)
  910. #else
  911. ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  912. const void *buffer)
  913. #endif
  914. {
  915. #ifdef CONFIG_BLK
  916. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  917. #endif
  918. int device = block_dev->devnum;
  919. ulong n = 0;
  920. unsigned char c;
  921. #ifdef CONFIG_LBA48
  922. unsigned char lba48 = 0;
  923. if (blknr & 0x0000fffff0000000ULL) {
  924. /* more than 28 bits used, use 48bit mode */
  925. lba48 = 1;
  926. }
  927. #endif
  928. /* Select device
  929. */
  930. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  931. while (blkcnt-- > 0) {
  932. c = ide_wait(device, IDE_TIME_OUT);
  933. if (c & ATA_STAT_BUSY) {
  934. printf("IDE read: device %d not ready\n", device);
  935. goto WR_OUT;
  936. }
  937. #ifdef CONFIG_LBA48
  938. if (lba48) {
  939. /* write high bits */
  940. ide_outb(device, ATA_SECT_CNT, 0);
  941. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  942. #ifdef CONFIG_SYS_64BIT_LBA
  943. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  944. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  945. #else
  946. ide_outb(device, ATA_LBA_MID, 0);
  947. ide_outb(device, ATA_LBA_HIGH, 0);
  948. #endif
  949. }
  950. #endif
  951. ide_outb(device, ATA_SECT_CNT, 1);
  952. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  953. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  954. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  955. #ifdef CONFIG_LBA48
  956. if (lba48) {
  957. ide_outb(device, ATA_DEV_HD,
  958. ATA_LBA | ATA_DEVICE(device));
  959. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  960. } else
  961. #endif
  962. {
  963. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  964. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  965. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
  966. }
  967. udelay(50);
  968. /* can't take over 500 ms */
  969. c = ide_wait(device, IDE_TIME_OUT);
  970. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  971. ATA_STAT_DRQ) {
  972. printf("Error (no IRQ) dev %d blk " LBAF
  973. ": status %#02x\n", device, blknr, c);
  974. goto WR_OUT;
  975. }
  976. ide_output_data(device, buffer, ATA_SECTORWORDS);
  977. c = ide_inb(device, ATA_STATUS); /* clear IRQ */
  978. ++n;
  979. ++blknr;
  980. buffer += ATA_BLOCKSIZE;
  981. }
  982. WR_OUT:
  983. return n;
  984. }
  985. #if defined(CONFIG_OF_IDE_FIXUP)
  986. int ide_device_present(int dev)
  987. {
  988. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  989. return 0;
  990. return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
  991. }
  992. #endif
  993. #ifdef CONFIG_BLK
  994. static int ide_blk_probe(struct udevice *udev)
  995. {
  996. struct blk_desc *desc = dev_get_uclass_platdata(udev);
  997. /* fill in device vendor/product/rev strings */
  998. strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
  999. BLK_VEN_SIZE);
  1000. desc->vendor[BLK_VEN_SIZE] = '\0';
  1001. strncpy(desc->product, ide_dev_desc[desc->devnum].product,
  1002. BLK_PRD_SIZE);
  1003. desc->product[BLK_PRD_SIZE] = '\0';
  1004. strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
  1005. BLK_REV_SIZE);
  1006. desc->revision[BLK_REV_SIZE] = '\0';
  1007. return 0;
  1008. }
  1009. static const struct blk_ops ide_blk_ops = {
  1010. .read = ide_read,
  1011. .write = ide_write,
  1012. };
  1013. U_BOOT_DRIVER(ide_blk) = {
  1014. .name = "ide_blk",
  1015. .id = UCLASS_BLK,
  1016. .ops = &ide_blk_ops,
  1017. .probe = ide_blk_probe,
  1018. };
  1019. static int ide_probe(struct udevice *udev)
  1020. {
  1021. struct udevice *blk_dev;
  1022. char name[20];
  1023. int blksz;
  1024. lbaint_t size;
  1025. int i;
  1026. int ret;
  1027. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
  1028. if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
  1029. sprintf(name, "blk#%d", i);
  1030. blksz = ide_dev_desc[i].blksz;
  1031. size = blksz * ide_dev_desc[i].lba;
  1032. /*
  1033. * With CDROM, if there is no CD inserted, blksz will
  1034. * be zero, don't bother to create IDE block device.
  1035. */
  1036. if (!blksz)
  1037. continue;
  1038. ret = blk_create_devicef(udev, "ide_blk", name,
  1039. IF_TYPE_IDE, i,
  1040. blksz, size, &blk_dev);
  1041. if (ret)
  1042. return ret;
  1043. }
  1044. }
  1045. return 0;
  1046. }
  1047. U_BOOT_DRIVER(ide) = {
  1048. .name = "ide",
  1049. .id = UCLASS_IDE,
  1050. .probe = ide_probe,
  1051. };
  1052. struct pci_device_id ide_supported[] = {
  1053. { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
  1054. { }
  1055. };
  1056. U_BOOT_PCI_DEVICE(ide, ide_supported);
  1057. UCLASS_DRIVER(ide) = {
  1058. .name = "ide",
  1059. .id = UCLASS_IDE,
  1060. };
  1061. #else
  1062. U_BOOT_LEGACY_BLK(ide) = {
  1063. .if_typename = "ide",
  1064. .if_type = IF_TYPE_IDE,
  1065. .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
  1066. .desc = ide_dev_desc,
  1067. };
  1068. #endif