ide.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2011
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <ata.h>
  8. #include <dm.h>
  9. #include <ide.h>
  10. #include <watchdog.h>
  11. #include <asm/io.h>
  12. #ifdef __PPC__
  13. # define EIEIO __asm__ volatile ("eieio")
  14. # define SYNC __asm__ volatile ("sync")
  15. #else
  16. # define EIEIO /* nothing */
  17. # define SYNC /* nothing */
  18. #endif
  19. /* Current offset for IDE0 / IDE1 bus access */
  20. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  21. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  22. CONFIG_SYS_ATA_IDE0_OFFSET,
  23. #endif
  24. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  25. CONFIG_SYS_ATA_IDE1_OFFSET,
  26. #endif
  27. };
  28. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  29. struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  30. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  31. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  32. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  33. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  34. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  35. #endif
  36. #ifdef CONFIG_IDE_RESET
  37. extern void ide_set_reset(int idereset);
  38. static void ide_reset(void)
  39. {
  40. int i;
  41. for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
  42. ide_bus_ok[i] = 0;
  43. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
  44. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  45. ide_set_reset(1); /* assert reset */
  46. /* the reset signal shall be asserted for et least 25 us */
  47. udelay(25);
  48. WATCHDOG_RESET();
  49. /* de-assert RESET signal */
  50. ide_set_reset(0);
  51. /* wait 250 ms */
  52. for (i = 0; i < 250; ++i)
  53. udelay(1000);
  54. }
  55. #else
  56. #define ide_reset() /* dummy */
  57. #endif /* CONFIG_IDE_RESET */
  58. /*
  59. * Wait until Busy bit is off, or timeout (in ms)
  60. * Return last status
  61. */
  62. static uchar ide_wait(int dev, ulong t)
  63. {
  64. ulong delay = 10 * t; /* poll every 100 us */
  65. uchar c;
  66. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  67. udelay(100);
  68. if (delay-- == 0)
  69. break;
  70. }
  71. return c;
  72. }
  73. /*
  74. * copy src to dest, skipping leading and trailing blanks and null
  75. * terminate the string
  76. * "len" is the size of available memory including the terminating '\0'
  77. */
  78. static void ident_cpy(unsigned char *dst, unsigned char *src,
  79. unsigned int len)
  80. {
  81. unsigned char *end, *last;
  82. last = dst;
  83. end = src + len - 1;
  84. /* reserve space for '\0' */
  85. if (len < 2)
  86. goto OUT;
  87. /* skip leading white space */
  88. while ((*src) && (src < end) && (*src == ' '))
  89. ++src;
  90. /* copy string, omitting trailing white space */
  91. while ((*src) && (src < end)) {
  92. *dst++ = *src;
  93. if (*src++ != ' ')
  94. last = dst;
  95. }
  96. OUT:
  97. *last = '\0';
  98. }
  99. #ifdef CONFIG_ATAPI
  100. /****************************************************************************
  101. * ATAPI Support
  102. */
  103. #if defined(CONFIG_IDE_SWAP_IO)
  104. /* since ATAPI may use commands with not 4 bytes alligned length
  105. * we have our own transfer functions, 2 bytes alligned */
  106. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  107. {
  108. ushort *dbuf;
  109. volatile ushort *pbuf;
  110. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  111. dbuf = (ushort *)sect_buf;
  112. debug("in output data shorts base for read is %lx\n",
  113. (unsigned long) pbuf);
  114. while (shorts--) {
  115. EIEIO;
  116. *pbuf = *dbuf++;
  117. }
  118. }
  119. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  120. {
  121. ushort *dbuf;
  122. volatile ushort *pbuf;
  123. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  124. dbuf = (ushort *)sect_buf;
  125. debug("in input data shorts base for read is %lx\n",
  126. (unsigned long) pbuf);
  127. while (shorts--) {
  128. EIEIO;
  129. *dbuf++ = *pbuf;
  130. }
  131. }
  132. #else /* ! CONFIG_IDE_SWAP_IO */
  133. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  134. {
  135. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  136. }
  137. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  138. {
  139. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  140. }
  141. #endif /* CONFIG_IDE_SWAP_IO */
  142. /*
  143. * Wait until (Status & mask) == res, or timeout (in ms)
  144. * Return last status
  145. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  146. * and then they set their DRQ Bit
  147. */
  148. static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
  149. {
  150. ulong delay = 10 * t; /* poll every 100 us */
  151. uchar c;
  152. /* prevents to read the status before valid */
  153. c = ide_inb(dev, ATA_DEV_CTL);
  154. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  155. /* break if error occurs (doesn't make sense to wait more) */
  156. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
  157. break;
  158. udelay(100);
  159. if (delay-- == 0)
  160. break;
  161. }
  162. return c;
  163. }
  164. /*
  165. * issue an atapi command
  166. */
  167. unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
  168. unsigned char *buffer, int buflen)
  169. {
  170. unsigned char c, err, mask, res;
  171. int n;
  172. /* Select device
  173. */
  174. mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
  175. res = 0;
  176. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  177. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  178. if ((c & mask) != res) {
  179. printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
  180. c);
  181. err = 0xFF;
  182. goto AI_OUT;
  183. }
  184. /* write taskfile */
  185. ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  186. ide_outb(device, ATA_SECT_CNT, 0);
  187. ide_outb(device, ATA_SECT_NUM, 0);
  188. ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
  189. ide_outb(device, ATA_CYL_HIGH,
  190. (unsigned char) ((buflen >> 8) & 0xFF));
  191. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  192. ide_outb(device, ATA_COMMAND, ATA_CMD_PACKET);
  193. udelay(50);
  194. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  195. res = ATA_STAT_DRQ;
  196. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  197. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  198. printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
  199. device, c);
  200. err = 0xFF;
  201. goto AI_OUT;
  202. }
  203. /* write command block */
  204. ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
  205. /* ATAPI Command written wait for completition */
  206. udelay(5000); /* device must set bsy */
  207. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  208. /*
  209. * if no data wait for DRQ = 0 BSY = 0
  210. * if data wait for DRQ = 1 BSY = 0
  211. */
  212. res = 0;
  213. if (buflen)
  214. res = ATA_STAT_DRQ;
  215. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  216. if ((c & mask) != res) {
  217. if (c & ATA_STAT_ERR) {
  218. err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
  219. debug("atapi_issue 1 returned sense key %X status %02X\n",
  220. err, c);
  221. } else {
  222. printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
  223. ccb[0], c);
  224. err = 0xFF;
  225. }
  226. goto AI_OUT;
  227. }
  228. n = ide_inb(device, ATA_CYL_HIGH);
  229. n <<= 8;
  230. n += ide_inb(device, ATA_CYL_LOW);
  231. if (n > buflen) {
  232. printf("ERROR, transfer bytes %d requested only %d\n", n,
  233. buflen);
  234. err = 0xff;
  235. goto AI_OUT;
  236. }
  237. if ((n == 0) && (buflen < 0)) {
  238. printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
  239. err = 0xff;
  240. goto AI_OUT;
  241. }
  242. if (n != buflen) {
  243. debug("WARNING, transfer bytes %d not equal with requested %d\n",
  244. n, buflen);
  245. }
  246. if (n != 0) { /* data transfer */
  247. debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
  248. /* we transfer shorts */
  249. n >>= 1;
  250. /* ok now decide if it is an in or output */
  251. if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
  252. debug("Write to device\n");
  253. ide_output_data_shorts(device, (unsigned short *)buffer,
  254. n);
  255. } else {
  256. debug("Read from device @ %p shorts %d\n", buffer, n);
  257. ide_input_data_shorts(device, (unsigned short *)buffer,
  258. n);
  259. }
  260. }
  261. udelay(5000); /* seems that some CD ROMs need this... */
  262. mask = ATA_STAT_BUSY | ATA_STAT_ERR;
  263. res = 0;
  264. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  265. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  266. err = (ide_inb(device, ATA_ERROR_REG) >> 4);
  267. debug("atapi_issue 2 returned sense key %X status %X\n", err,
  268. c);
  269. } else {
  270. err = 0;
  271. }
  272. AI_OUT:
  273. return err;
  274. }
  275. /*
  276. * sending the command to atapi_issue. If an status other than good
  277. * returns, an request_sense will be issued
  278. */
  279. #define ATAPI_DRIVE_NOT_READY 100
  280. #define ATAPI_UNIT_ATTN 10
  281. unsigned char atapi_issue_autoreq(int device,
  282. unsigned char *ccb,
  283. int ccblen,
  284. unsigned char *buffer, int buflen)
  285. {
  286. unsigned char sense_data[18], sense_ccb[12];
  287. unsigned char res, key, asc, ascq;
  288. int notready, unitattn;
  289. unitattn = ATAPI_UNIT_ATTN;
  290. notready = ATAPI_DRIVE_NOT_READY;
  291. retry:
  292. res = atapi_issue(device, ccb, ccblen, buffer, buflen);
  293. if (res == 0)
  294. return 0; /* Ok */
  295. if (res == 0xFF)
  296. return 0xFF; /* error */
  297. debug("(auto_req)atapi_issue returned sense key %X\n", res);
  298. memset(sense_ccb, 0, sizeof(sense_ccb));
  299. memset(sense_data, 0, sizeof(sense_data));
  300. sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
  301. sense_ccb[4] = 18; /* allocation Length */
  302. res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
  303. key = (sense_data[2] & 0xF);
  304. asc = (sense_data[12]);
  305. ascq = (sense_data[13]);
  306. debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
  307. debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  308. sense_data[0], key, asc, ascq);
  309. if ((key == 0))
  310. return 0; /* ok device ready */
  311. if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
  312. if (unitattn-- > 0) {
  313. udelay(200 * 1000);
  314. goto retry;
  315. }
  316. printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
  317. goto error;
  318. }
  319. if ((asc == 0x4) && (ascq == 0x1)) {
  320. /* not ready, but will be ready soon */
  321. if (notready-- > 0) {
  322. udelay(200 * 1000);
  323. goto retry;
  324. }
  325. printf("Drive not ready, tried %d times\n",
  326. ATAPI_DRIVE_NOT_READY);
  327. goto error;
  328. }
  329. if (asc == 0x3a) {
  330. debug("Media not present\n");
  331. goto error;
  332. }
  333. printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
  334. ascq);
  335. error:
  336. debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
  337. return 0xFF;
  338. }
  339. /*
  340. * atapi_read:
  341. * we transfer only one block per command, since the multiple DRQ per
  342. * command is not yet implemented
  343. */
  344. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  345. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  346. #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
  347. ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  348. void *buffer)
  349. {
  350. int device = block_dev->devnum;
  351. ulong n = 0;
  352. unsigned char ccb[12]; /* Command descriptor block */
  353. ulong cnt;
  354. debug("atapi_read dev %d start " LBAF " blocks " LBAF
  355. " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
  356. do {
  357. if (blkcnt > ATAPI_READ_MAX_BLOCK)
  358. cnt = ATAPI_READ_MAX_BLOCK;
  359. else
  360. cnt = blkcnt;
  361. ccb[0] = ATAPI_CMD_READ_12;
  362. ccb[1] = 0; /* reserved */
  363. ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
  364. ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
  365. ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
  366. ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
  367. ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
  368. ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
  369. ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
  370. ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
  371. ccb[10] = 0; /* reserved */
  372. ccb[11] = 0; /* reserved */
  373. if (atapi_issue_autoreq(device, ccb, 12,
  374. (unsigned char *)buffer,
  375. cnt * ATAPI_READ_BLOCK_SIZE)
  376. == 0xFF) {
  377. return n;
  378. }
  379. n += cnt;
  380. blkcnt -= cnt;
  381. blknr += cnt;
  382. buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
  383. } while (blkcnt > 0);
  384. return n;
  385. }
  386. static void atapi_inquiry(struct blk_desc *dev_desc)
  387. {
  388. unsigned char ccb[12]; /* Command descriptor block */
  389. unsigned char iobuf[64]; /* temp buf */
  390. unsigned char c;
  391. int device;
  392. device = dev_desc->devnum;
  393. dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
  394. #ifndef CONFIG_BLK
  395. dev_desc->block_read = atapi_read;
  396. #endif
  397. memset(ccb, 0, sizeof(ccb));
  398. memset(iobuf, 0, sizeof(iobuf));
  399. ccb[0] = ATAPI_CMD_INQUIRY;
  400. ccb[4] = 40; /* allocation Legnth */
  401. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
  402. debug("ATAPI_CMD_INQUIRY returned %x\n", c);
  403. if (c != 0)
  404. return;
  405. /* copy device ident strings */
  406. ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
  407. ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
  408. ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
  409. dev_desc->lun = 0;
  410. dev_desc->lba = 0;
  411. dev_desc->blksz = 0;
  412. dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
  413. dev_desc->type = iobuf[0] & 0x1f;
  414. if ((iobuf[1] & 0x80) == 0x80)
  415. dev_desc->removable = 1;
  416. else
  417. dev_desc->removable = 0;
  418. memset(ccb, 0, sizeof(ccb));
  419. memset(iobuf, 0, sizeof(iobuf));
  420. ccb[0] = ATAPI_CMD_START_STOP;
  421. ccb[4] = 0x03; /* start */
  422. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  423. debug("ATAPI_CMD_START_STOP returned %x\n", c);
  424. if (c != 0)
  425. return;
  426. memset(ccb, 0, sizeof(ccb));
  427. memset(iobuf, 0, sizeof(iobuf));
  428. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  429. debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
  430. if (c != 0)
  431. return;
  432. memset(ccb, 0, sizeof(ccb));
  433. memset(iobuf, 0, sizeof(iobuf));
  434. ccb[0] = ATAPI_CMD_READ_CAP;
  435. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
  436. debug("ATAPI_CMD_READ_CAP returned %x\n", c);
  437. if (c != 0)
  438. return;
  439. debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  440. iobuf[0], iobuf[1], iobuf[2], iobuf[3],
  441. iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
  442. dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
  443. ((unsigned long) iobuf[1] << 16) +
  444. ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
  445. dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
  446. ((unsigned long) iobuf[5] << 16) +
  447. ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
  448. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  449. #ifdef CONFIG_LBA48
  450. /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  451. dev_desc->lba48 = 0;
  452. #endif
  453. return;
  454. }
  455. #endif /* CONFIG_ATAPI */
  456. static void ide_ident(struct blk_desc *dev_desc)
  457. {
  458. unsigned char c;
  459. hd_driveid_t iop;
  460. #ifdef CONFIG_ATAPI
  461. int retries = 0;
  462. #endif
  463. int device;
  464. device = dev_desc->devnum;
  465. printf(" Device %d: ", device);
  466. /* Select device
  467. */
  468. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  469. dev_desc->if_type = IF_TYPE_IDE;
  470. #ifdef CONFIG_ATAPI
  471. retries = 0;
  472. /* Warning: This will be tricky to read */
  473. while (retries <= 1) {
  474. /* check signature */
  475. if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
  476. (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
  477. (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
  478. (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
  479. /* ATAPI Signature found */
  480. dev_desc->if_type = IF_TYPE_ATAPI;
  481. /*
  482. * Start Ident Command
  483. */
  484. ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATAPI);
  485. /*
  486. * Wait for completion - ATAPI devices need more time
  487. * to become ready
  488. */
  489. c = ide_wait(device, ATAPI_TIME_OUT);
  490. } else
  491. #endif
  492. {
  493. /*
  494. * Start Ident Command
  495. */
  496. ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATA);
  497. /*
  498. * Wait for completion
  499. */
  500. c = ide_wait(device, IDE_TIME_OUT);
  501. }
  502. if (((c & ATA_STAT_DRQ) == 0) ||
  503. ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
  504. #ifdef CONFIG_ATAPI
  505. {
  506. /*
  507. * Need to soft reset the device
  508. * in case it's an ATAPI...
  509. */
  510. debug("Retrying...\n");
  511. ide_outb(device, ATA_DEV_HD,
  512. ATA_LBA | ATA_DEVICE(device));
  513. udelay(100000);
  514. ide_outb(device, ATA_COMMAND, 0x08);
  515. udelay(500000); /* 500 ms */
  516. }
  517. /*
  518. * Select device
  519. */
  520. ide_outb(device, ATA_DEV_HD,
  521. ATA_LBA | ATA_DEVICE(device));
  522. retries++;
  523. #else
  524. return;
  525. #endif
  526. }
  527. #ifdef CONFIG_ATAPI
  528. else
  529. break;
  530. } /* see above - ugly to read */
  531. if (retries == 2) /* Not found */
  532. return;
  533. #endif
  534. ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
  535. ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
  536. sizeof(dev_desc->revision));
  537. ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
  538. sizeof(dev_desc->vendor));
  539. ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
  540. sizeof(dev_desc->product));
  541. #ifdef __LITTLE_ENDIAN
  542. /*
  543. * firmware revision, model, and serial number have Big Endian Byte
  544. * order in Word. Convert all three to little endian.
  545. *
  546. * See CF+ and CompactFlash Specification Revision 2.0:
  547. * 6.2.1.6: Identify Drive, Table 39 for more details
  548. */
  549. strswab(dev_desc->revision);
  550. strswab(dev_desc->vendor);
  551. strswab(dev_desc->product);
  552. #endif /* __LITTLE_ENDIAN */
  553. if ((iop.config & 0x0080) == 0x0080)
  554. dev_desc->removable = 1;
  555. else
  556. dev_desc->removable = 0;
  557. #ifdef CONFIG_ATAPI
  558. if (dev_desc->if_type == IF_TYPE_ATAPI) {
  559. atapi_inquiry(dev_desc);
  560. return;
  561. }
  562. #endif /* CONFIG_ATAPI */
  563. #ifdef __BIG_ENDIAN
  564. /* swap shorts */
  565. dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
  566. #else /* ! __BIG_ENDIAN */
  567. /*
  568. * do not swap shorts on little endian
  569. *
  570. * See CF+ and CompactFlash Specification Revision 2.0:
  571. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  572. */
  573. dev_desc->lba = iop.lba_capacity;
  574. #endif /* __BIG_ENDIAN */
  575. #ifdef CONFIG_LBA48
  576. if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
  577. dev_desc->lba48 = 1;
  578. dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
  579. ((unsigned long long) iop.lba48_capacity[1] << 16) |
  580. ((unsigned long long) iop.lba48_capacity[2] << 32) |
  581. ((unsigned long long) iop.lba48_capacity[3] << 48);
  582. } else {
  583. dev_desc->lba48 = 0;
  584. }
  585. #endif /* CONFIG_LBA48 */
  586. /* assuming HD */
  587. dev_desc->type = DEV_TYPE_HARDDISK;
  588. dev_desc->blksz = ATA_BLOCKSIZE;
  589. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  590. dev_desc->lun = 0; /* just to fill something in... */
  591. #if 0 /* only used to test the powersaving mode,
  592. * if enabled, the drive goes after 5 sec
  593. * in standby mode */
  594. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  595. c = ide_wait(device, IDE_TIME_OUT);
  596. ide_outb(device, ATA_SECT_CNT, 1);
  597. ide_outb(device, ATA_LBA_LOW, 0);
  598. ide_outb(device, ATA_LBA_MID, 0);
  599. ide_outb(device, ATA_LBA_HIGH, 0);
  600. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  601. ide_outb(device, ATA_COMMAND, 0xe3);
  602. udelay(50);
  603. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  604. #endif
  605. }
  606. __weak void ide_outb(int dev, int port, unsigned char val)
  607. {
  608. debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  609. dev, port, val,
  610. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  611. #if defined(CONFIG_IDE_AHB)
  612. if (port) {
  613. /* write command */
  614. ide_write_register(dev, port, val);
  615. } else {
  616. /* write data */
  617. outb(val, (ATA_CURR_BASE(dev)));
  618. }
  619. #else
  620. outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  621. #endif
  622. }
  623. __weak unsigned char ide_inb(int dev, int port)
  624. {
  625. uchar val;
  626. #if defined(CONFIG_IDE_AHB)
  627. val = ide_read_register(dev, port);
  628. #else
  629. val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  630. #endif
  631. debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  632. dev, port,
  633. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  634. return val;
  635. }
  636. void ide_init(void)
  637. {
  638. unsigned char c;
  639. int i, bus;
  640. #ifdef CONFIG_IDE_PREINIT
  641. WATCHDOG_RESET();
  642. if (ide_preinit()) {
  643. puts("ide_preinit failed\n");
  644. return;
  645. }
  646. #endif /* CONFIG_IDE_PREINIT */
  647. WATCHDOG_RESET();
  648. /* ATAPI Drives seems to need a proper IDE Reset */
  649. ide_reset();
  650. /*
  651. * Wait for IDE to get ready.
  652. * According to spec, this can take up to 31 seconds!
  653. */
  654. for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
  655. int dev =
  656. bus * (CONFIG_SYS_IDE_MAXDEVICE /
  657. CONFIG_SYS_IDE_MAXBUS);
  658. printf("Bus %d: ", bus);
  659. ide_bus_ok[bus] = 0;
  660. /* Select device
  661. */
  662. udelay(100000); /* 100 ms */
  663. ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  664. udelay(100000); /* 100 ms */
  665. i = 0;
  666. do {
  667. udelay(10000); /* 10 ms */
  668. c = ide_inb(dev, ATA_STATUS);
  669. i++;
  670. if (i > (ATA_RESET_TIME * 100)) {
  671. puts("** Timeout **\n");
  672. return;
  673. }
  674. if ((i >= 100) && ((i % 100) == 0))
  675. putc('.');
  676. } while (c & ATA_STAT_BUSY);
  677. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  678. puts("not available ");
  679. debug("Status = 0x%02X ", c);
  680. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  681. } else if ((c & ATA_STAT_READY) == 0) {
  682. puts("not available ");
  683. debug("Status = 0x%02X ", c);
  684. #endif
  685. } else {
  686. puts("OK ");
  687. ide_bus_ok[bus] = 1;
  688. }
  689. WATCHDOG_RESET();
  690. }
  691. putc('\n');
  692. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  693. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  694. ide_dev_desc[i].if_type = IF_TYPE_IDE;
  695. ide_dev_desc[i].devnum = i;
  696. ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
  697. ide_dev_desc[i].blksz = 0;
  698. ide_dev_desc[i].log2blksz =
  699. LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
  700. ide_dev_desc[i].lba = 0;
  701. #ifndef CONFIG_BLK
  702. ide_dev_desc[i].block_read = ide_read;
  703. ide_dev_desc[i].block_write = ide_write;
  704. #endif
  705. if (!ide_bus_ok[IDE_BUS(i)])
  706. continue;
  707. ide_ident(&ide_dev_desc[i]);
  708. dev_print(&ide_dev_desc[i]);
  709. #ifndef CONFIG_BLK
  710. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  711. /* initialize partition type */
  712. part_init(&ide_dev_desc[i]);
  713. }
  714. #endif
  715. }
  716. WATCHDOG_RESET();
  717. #ifdef CONFIG_BLK
  718. struct udevice *dev;
  719. uclass_first_device(UCLASS_IDE, &dev);
  720. #endif
  721. }
  722. /* We only need to swap data if we are running on a big endian cpu. */
  723. #if defined(__LITTLE_ENDIAN)
  724. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  725. {
  726. ide_input_data(dev, sect_buf, words);
  727. }
  728. #else
  729. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  730. {
  731. volatile ushort *pbuf =
  732. (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  733. ushort *dbuf = (ushort *)sect_buf;
  734. debug("in input swap data base for read is %lx\n",
  735. (unsigned long) pbuf);
  736. while (words--) {
  737. #ifdef __MIPS__
  738. *dbuf++ = swab16p((u16 *)pbuf);
  739. *dbuf++ = swab16p((u16 *)pbuf);
  740. #else
  741. *dbuf++ = ld_le16(pbuf);
  742. *dbuf++ = ld_le16(pbuf);
  743. #endif /* !MIPS */
  744. }
  745. }
  746. #endif /* __LITTLE_ENDIAN */
  747. #if defined(CONFIG_IDE_SWAP_IO)
  748. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  749. {
  750. ushort *dbuf;
  751. volatile ushort *pbuf;
  752. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  753. dbuf = (ushort *)sect_buf;
  754. while (words--) {
  755. EIEIO;
  756. *pbuf = *dbuf++;
  757. EIEIO;
  758. *pbuf = *dbuf++;
  759. }
  760. }
  761. #else /* ! CONFIG_IDE_SWAP_IO */
  762. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  763. {
  764. #if defined(CONFIG_IDE_AHB)
  765. ide_write_data(dev, sect_buf, words);
  766. #else
  767. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  768. #endif
  769. }
  770. #endif /* CONFIG_IDE_SWAP_IO */
  771. #if defined(CONFIG_IDE_SWAP_IO)
  772. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  773. {
  774. ushort *dbuf;
  775. volatile ushort *pbuf;
  776. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  777. dbuf = (ushort *)sect_buf;
  778. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  779. while (words--) {
  780. EIEIO;
  781. *dbuf++ = *pbuf;
  782. EIEIO;
  783. *dbuf++ = *pbuf;
  784. }
  785. }
  786. #else /* ! CONFIG_IDE_SWAP_IO */
  787. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  788. {
  789. #if defined(CONFIG_IDE_AHB)
  790. ide_read_data(dev, sect_buf, words);
  791. #else
  792. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  793. #endif
  794. }
  795. #endif /* CONFIG_IDE_SWAP_IO */
  796. #ifdef CONFIG_BLK
  797. ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  798. void *buffer)
  799. #else
  800. ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  801. void *buffer)
  802. #endif
  803. {
  804. #ifdef CONFIG_BLK
  805. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  806. #endif
  807. int device = block_dev->devnum;
  808. ulong n = 0;
  809. unsigned char c;
  810. unsigned char pwrsave = 0; /* power save */
  811. #ifdef CONFIG_LBA48
  812. unsigned char lba48 = 0;
  813. if (blknr & 0x0000fffff0000000ULL) {
  814. /* more than 28 bits used, use 48bit mode */
  815. lba48 = 1;
  816. }
  817. #endif
  818. debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
  819. device, blknr, blkcnt, (ulong) buffer);
  820. /* Select device
  821. */
  822. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  823. c = ide_wait(device, IDE_TIME_OUT);
  824. if (c & ATA_STAT_BUSY) {
  825. printf("IDE read: device %d not ready\n", device);
  826. goto IDE_READ_E;
  827. }
  828. /* first check if the drive is in Powersaving mode, if yes,
  829. * increase the timeout value */
  830. ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_POWER);
  831. udelay(50);
  832. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  833. if (c & ATA_STAT_BUSY) {
  834. printf("IDE read: device %d not ready\n", device);
  835. goto IDE_READ_E;
  836. }
  837. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  838. printf("No Powersaving mode %X\n", c);
  839. } else {
  840. c = ide_inb(device, ATA_SECT_CNT);
  841. debug("Powersaving %02X\n", c);
  842. if (c == 0)
  843. pwrsave = 1;
  844. }
  845. while (blkcnt-- > 0) {
  846. c = ide_wait(device, IDE_TIME_OUT);
  847. if (c & ATA_STAT_BUSY) {
  848. printf("IDE read: device %d not ready\n", device);
  849. break;
  850. }
  851. #ifdef CONFIG_LBA48
  852. if (lba48) {
  853. /* write high bits */
  854. ide_outb(device, ATA_SECT_CNT, 0);
  855. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  856. #ifdef CONFIG_SYS_64BIT_LBA
  857. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  858. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  859. #else
  860. ide_outb(device, ATA_LBA_MID, 0);
  861. ide_outb(device, ATA_LBA_HIGH, 0);
  862. #endif
  863. }
  864. #endif
  865. ide_outb(device, ATA_SECT_CNT, 1);
  866. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  867. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  868. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  869. #ifdef CONFIG_LBA48
  870. if (lba48) {
  871. ide_outb(device, ATA_DEV_HD,
  872. ATA_LBA | ATA_DEVICE(device));
  873. ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
  874. } else
  875. #endif
  876. {
  877. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  878. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  879. ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
  880. }
  881. udelay(50);
  882. if (pwrsave) {
  883. /* may take up to 4 sec */
  884. c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
  885. pwrsave = 0;
  886. } else {
  887. /* can't take over 500 ms */
  888. c = ide_wait(device, IDE_TIME_OUT);
  889. }
  890. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  891. ATA_STAT_DRQ) {
  892. printf("Error (no IRQ) dev %d blk " LBAF
  893. ": status %#02x\n", device, blknr, c);
  894. break;
  895. }
  896. ide_input_data(device, buffer, ATA_SECTORWORDS);
  897. (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
  898. ++n;
  899. ++blknr;
  900. buffer += ATA_BLOCKSIZE;
  901. }
  902. IDE_READ_E:
  903. return n;
  904. }
  905. #ifdef CONFIG_BLK
  906. ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  907. const void *buffer)
  908. #else
  909. ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  910. const void *buffer)
  911. #endif
  912. {
  913. #ifdef CONFIG_BLK
  914. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  915. #endif
  916. int device = block_dev->devnum;
  917. ulong n = 0;
  918. unsigned char c;
  919. #ifdef CONFIG_LBA48
  920. unsigned char lba48 = 0;
  921. if (blknr & 0x0000fffff0000000ULL) {
  922. /* more than 28 bits used, use 48bit mode */
  923. lba48 = 1;
  924. }
  925. #endif
  926. /* Select device
  927. */
  928. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  929. while (blkcnt-- > 0) {
  930. c = ide_wait(device, IDE_TIME_OUT);
  931. if (c & ATA_STAT_BUSY) {
  932. printf("IDE read: device %d not ready\n", device);
  933. goto WR_OUT;
  934. }
  935. #ifdef CONFIG_LBA48
  936. if (lba48) {
  937. /* write high bits */
  938. ide_outb(device, ATA_SECT_CNT, 0);
  939. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  940. #ifdef CONFIG_SYS_64BIT_LBA
  941. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  942. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  943. #else
  944. ide_outb(device, ATA_LBA_MID, 0);
  945. ide_outb(device, ATA_LBA_HIGH, 0);
  946. #endif
  947. }
  948. #endif
  949. ide_outb(device, ATA_SECT_CNT, 1);
  950. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  951. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  952. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  953. #ifdef CONFIG_LBA48
  954. if (lba48) {
  955. ide_outb(device, ATA_DEV_HD,
  956. ATA_LBA | ATA_DEVICE(device));
  957. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  958. } else
  959. #endif
  960. {
  961. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  962. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  963. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
  964. }
  965. udelay(50);
  966. /* can't take over 500 ms */
  967. c = ide_wait(device, IDE_TIME_OUT);
  968. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  969. ATA_STAT_DRQ) {
  970. printf("Error (no IRQ) dev %d blk " LBAF
  971. ": status %#02x\n", device, blknr, c);
  972. goto WR_OUT;
  973. }
  974. ide_output_data(device, buffer, ATA_SECTORWORDS);
  975. c = ide_inb(device, ATA_STATUS); /* clear IRQ */
  976. ++n;
  977. ++blknr;
  978. buffer += ATA_BLOCKSIZE;
  979. }
  980. WR_OUT:
  981. return n;
  982. }
  983. #if defined(CONFIG_OF_IDE_FIXUP)
  984. int ide_device_present(int dev)
  985. {
  986. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  987. return 0;
  988. return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
  989. }
  990. #endif
  991. #ifdef CONFIG_BLK
  992. static int ide_blk_probe(struct udevice *udev)
  993. {
  994. struct blk_desc *desc = dev_get_uclass_platdata(udev);
  995. /* fill in device vendor/product/rev strings */
  996. strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
  997. BLK_VEN_SIZE);
  998. desc->vendor[BLK_VEN_SIZE] = '\0';
  999. strncpy(desc->product, ide_dev_desc[desc->devnum].product,
  1000. BLK_PRD_SIZE);
  1001. desc->product[BLK_PRD_SIZE] = '\0';
  1002. strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
  1003. BLK_REV_SIZE);
  1004. desc->revision[BLK_REV_SIZE] = '\0';
  1005. return 0;
  1006. }
  1007. static const struct blk_ops ide_blk_ops = {
  1008. .read = ide_read,
  1009. .write = ide_write,
  1010. };
  1011. U_BOOT_DRIVER(ide_blk) = {
  1012. .name = "ide_blk",
  1013. .id = UCLASS_BLK,
  1014. .ops = &ide_blk_ops,
  1015. .probe = ide_blk_probe,
  1016. };
  1017. static int ide_probe(struct udevice *udev)
  1018. {
  1019. struct udevice *blk_dev;
  1020. char name[20];
  1021. int blksz;
  1022. lbaint_t size;
  1023. int i;
  1024. int ret;
  1025. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
  1026. if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
  1027. sprintf(name, "blk#%d", i);
  1028. blksz = ide_dev_desc[i].blksz;
  1029. size = blksz * ide_dev_desc[i].lba;
  1030. /*
  1031. * With CDROM, if there is no CD inserted, blksz will
  1032. * be zero, don't bother to create IDE block device.
  1033. */
  1034. if (!blksz)
  1035. continue;
  1036. ret = blk_create_devicef(udev, "ide_blk", name,
  1037. IF_TYPE_IDE, i,
  1038. blksz, size, &blk_dev);
  1039. if (ret)
  1040. return ret;
  1041. }
  1042. }
  1043. return 0;
  1044. }
  1045. U_BOOT_DRIVER(ide) = {
  1046. .name = "ide",
  1047. .id = UCLASS_IDE,
  1048. .probe = ide_probe,
  1049. };
  1050. struct pci_device_id ide_supported[] = {
  1051. { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
  1052. { }
  1053. };
  1054. U_BOOT_PCI_DEVICE(ide, ide_supported);
  1055. UCLASS_DRIVER(ide) = {
  1056. .name = "ide",
  1057. .id = UCLASS_IDE,
  1058. };
  1059. #else
  1060. U_BOOT_LEGACY_BLK(ide) = {
  1061. .if_typename = "ide",
  1062. .if_type = IF_TYPE_IDE,
  1063. .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
  1064. .desc = ide_dev_desc,
  1065. };
  1066. #endif