astro_mcf5373l.h 8.6 KB

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  1. /*
  2. * Configuration settings for the Sentec Cobra Board.
  3. *
  4. * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. /*
  9. * configuration for ASTRO "Urmel" board.
  10. * Originating from Cobra5272 configuration, messed up by
  11. * Wolfgang Wegner <w.wegner@astro-kom.de>
  12. * Please do not bother the original author with bug reports
  13. * concerning this file.
  14. */
  15. #ifndef _CONFIG_ASTRO_MCF5373L_H
  16. #define _CONFIG_ASTRO_MCF5373L_H
  17. #include <linux/stringify.h>
  18. /*
  19. * set the card type to actually compile for; either of
  20. * the possibilities listed below has to be used!
  21. */
  22. #define CONFIG_ASTRO_V532 1
  23. #if CONFIG_ASTRO_V532
  24. #define ASTRO_ID 0xF8
  25. #elif CONFIG_ASTRO_V512
  26. #define ASTRO_ID 0xFA
  27. #elif CONFIG_ASTRO_TWIN7S2
  28. #define ASTRO_ID 0xF9
  29. #elif CONFIG_ASTRO_V912
  30. #define ASTRO_ID 0xFC
  31. #elif CONFIG_ASTRO_COFDMDUOS2
  32. #define ASTRO_ID 0xFB
  33. #else
  34. #error No card type defined!
  35. #endif
  36. /* Command line configuration */
  37. /*
  38. * CONFIG_RAM defines if u-boot is loaded via BDM (or started from
  39. * a different bootloader that has already performed RAM setup) or
  40. * started directly from flash, which is the regular case for production
  41. * boards.
  42. */
  43. #ifdef CONFIG_RAM
  44. #define CONFIG_MONITOR_IS_IN_RAM
  45. #define CONFIG_SYS_TEXT_BASE 0x40020000
  46. #define ENABLE_JFFS 0
  47. #else
  48. #define CONFIG_SYS_TEXT_BASE 0x00000000
  49. #define ENABLE_JFFS 1
  50. #endif
  51. #define CONFIG_CMDLINE_EDITING
  52. #define CONFIG_MCFRTC
  53. #undef RTC_DEBUG
  54. /* Timer */
  55. #define CONFIG_MCFTMR
  56. #undef CONFIG_MCFPIT
  57. /* I2C */
  58. #define CONFIG_SYS_I2C
  59. #define CONFIG_SYS_I2C_FSL
  60. #define CONFIG_SYS_FSL_I2C_SPEED 80000
  61. #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
  62. #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
  63. #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
  64. /*
  65. * Defines processor clock - important for correct timings concerning serial
  66. * interface etc.
  67. */
  68. #define CONFIG_SYS_CLK 80000000
  69. #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
  70. #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
  71. #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000
  72. #define CONFIG_SYS_CORE_SRAM 0x80000000
  73. #define CONFIG_SYS_UNIFY_CACHE
  74. /*
  75. * Define baudrate for UART1 (console output, tftp, ...)
  76. * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
  77. * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected
  78. * in u-boot command interface
  79. */
  80. #define CONFIG_MCFUART
  81. #define CONFIG_SYS_UART_PORT (2)
  82. #define CONFIG_SYS_UART2_ALT3_GPIO
  83. /*
  84. * Watchdog configuration; Watchdog is disabled for running from RAM
  85. * and set to highest possible value else. Beware there is no check
  86. * in the watchdog code to validate the timeout value set here!
  87. */
  88. #ifndef CONFIG_MONITOR_IS_IN_RAM
  89. #define CONFIG_WATCHDOG
  90. #define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */
  91. #endif
  92. /*
  93. * Configuration for environment
  94. * Environment is located in the last sector of the flash
  95. */
  96. #ifndef CONFIG_MONITOR_IS_IN_RAM
  97. #define CONFIG_ENV_OFFSET 0x1FF8000
  98. #define CONFIG_ENV_SECT_SIZE 0x8000
  99. #else
  100. /*
  101. * environment in RAM - This is used to use a single PC-based application
  102. * to load an image, load U-Boot, load an environment and then start U-Boot
  103. * to execute the commands from the environment. Feedback is done via setting
  104. * and reading memory locations.
  105. */
  106. #define CONFIG_ENV_ADDR 0x40060000
  107. #define CONFIG_ENV_SECT_SIZE 0x8000
  108. #endif
  109. /* here we put our FPGA configuration... */
  110. #define CONFIG_MISC_INIT_R 1
  111. /* Define user parameters that have to be customized most likely */
  112. /* AUTOBOOT settings - booting images automatically by u-boot after power on */
  113. /*
  114. * The following settings will be contained in the environment block ; if you
  115. * want to use a neutral environment all those settings can be manually set in
  116. * u-boot: 'set' command
  117. */
  118. #define CONFIG_EXTRA_ENV_SETTINGS \
  119. "loaderversion=11\0" \
  120. "card_id="__stringify(ASTRO_ID)"\0" \
  121. "alterafile=0\0" \
  122. "xilinxfile=0\0" \
  123. "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\
  124. "fpga load 0 0x41000000 $filesize\0" \
  125. "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\
  126. "fpga load 1 0x41000000 $filesize\0" \
  127. "env_default=1\0" \
  128. "env_check=if test $env_default -eq 1;"\
  129. " then setenv env_default 0;saveenv;fi\0"
  130. /*
  131. * "update" is a non-standard command that has to be supplied
  132. * by external update.c; This is not included in mainline because
  133. * it needs non-blocking CFI routines.
  134. */
  135. #ifdef CONFIG_MONITOR_IS_IN_RAM
  136. #define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */
  137. #else
  138. #if CONFIG_ASTRO_V532
  139. #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
  140. "run xilinxload&&run alteraload&&bootm 0x80000;"\
  141. "update;reset"
  142. #else
  143. #define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\
  144. "run xilinxload&&bootm 0x80000;update;reset"
  145. #endif
  146. #endif
  147. /* default RAM address for user programs */
  148. #define CONFIG_SYS_LOAD_ADDR 0x20000
  149. #define CONFIG_SYS_LONGHELP
  150. #define CONFIG_FPGA_COUNT 1
  151. #define CONFIG_FPGA_XILINX
  152. #define CONFIG_FPGA_SPARTAN3
  153. #define CONFIG_FPGA_CYCLON2
  154. #define CONFIG_SYS_FPGA_PROG_FEEDBACK
  155. #define CONFIG_SYS_FPGA_WAIT 1000
  156. /* End of user parameters to be customized */
  157. /* Defines memory range for test */
  158. #define CONFIG_SYS_MEMTEST_START 0x40020000
  159. #define CONFIG_SYS_MEMTEST_END 0x41ffffff
  160. /*
  161. * Low Level Configuration Settings
  162. * (address mappings, register initial values, etc.)
  163. * You should know what you are doing if you make changes here.
  164. */
  165. /* Base register address */
  166. #define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */
  167. /* System Conf. Reg. & System Protection Reg. */
  168. #define CONFIG_SYS_SCR 0x0003;
  169. #define CONFIG_SYS_SPR 0xffff;
  170. /*
  171. * Definitions for initial stack pointer and data area (in internal SRAM)
  172. */
  173. #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
  174. #define CONFIG_SYS_INIT_RAM_SIZE 0x8000
  175. #define CONFIG_SYS_INIT_RAM_CTRL 0x221
  176. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
  177. GENERATED_GBL_DATA_SIZE)
  178. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  179. /*
  180. * Start addresses for the final memory configuration
  181. * (Set up by the startup code)
  182. * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000
  183. */
  184. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  185. /*
  186. * Chipselect bank definitions
  187. *
  188. * CS0 - Flash 32MB (first 16MB)
  189. * CS1 - Flash 32MB (second half)
  190. * CS2 - FPGA
  191. * CS3 - FPGA
  192. * CS4 - unused
  193. * CS5 - unused
  194. */
  195. #define CONFIG_SYS_CS0_BASE 0
  196. #define CONFIG_SYS_CS0_MASK 0x00ff0001
  197. #define CONFIG_SYS_CS0_CTRL 0x00001fc0
  198. #define CONFIG_SYS_CS1_BASE 0x01000000
  199. #define CONFIG_SYS_CS1_MASK 0x00ff0001
  200. #define CONFIG_SYS_CS1_CTRL 0x00001fc0
  201. #define CONFIG_SYS_CS2_BASE 0x20000000
  202. #define CONFIG_SYS_CS2_MASK 0x00ff0001
  203. #define CONFIG_SYS_CS2_CTRL 0x0000fec0
  204. #define CONFIG_SYS_CS3_BASE 0x21000000
  205. #define CONFIG_SYS_CS3_MASK 0x00ff0001
  206. #define CONFIG_SYS_CS3_CTRL 0x0000fec0
  207. #define CONFIG_SYS_FLASH_BASE 0x00000000
  208. #ifdef CONFIG_MONITOR_IS_IN_RAM
  209. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  210. #else
  211. /* This is mainly used during relocation in start.S */
  212. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
  213. #endif
  214. /* Reserve 256 kB for Monitor */
  215. #define CONFIG_SYS_MONITOR_LEN (256 << 10)
  216. #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024)
  217. /* Reserve 128 kB for malloc() */
  218. #define CONFIG_SYS_MALLOC_LEN (128 << 10)
  219. /*
  220. * For booting Linux, the board info and command line data
  221. * have to be in the first 8 MB of memory, since this is
  222. * the maximum mapped by the Linux kernel during initialization ??
  223. */
  224. #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \
  225. (CONFIG_SYS_SDRAM_SIZE << 20))
  226. /* FLASH organization */
  227. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  228. #define CONFIG_SYS_MAX_FLASH_SECT 259
  229. #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
  230. #define CONFIG_SYS_FLASH_CFI 1
  231. #define CONFIG_FLASH_CFI_DRIVER 1
  232. #define CONFIG_SYS_FLASH_SIZE 0x2000000
  233. #define CONFIG_SYS_FLASH_PROTECTION 1
  234. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
  235. #define CONFIG_SYS_FLASH_CFI_NONBLOCK 1
  236. #define LDS_BOARD_TEXT \
  237. . = DEFINED(env_offset) ? env_offset : .; \
  238. env/embedded.o(.text*)
  239. #if ENABLE_JFFS
  240. /* JFFS Partition offset set */
  241. #define CONFIG_SYS_JFFS2_FIRST_BANK 0
  242. #define CONFIG_SYS_JFFS2_NUM_BANKS 1
  243. /* 512k reserved for u-boot */
  244. #define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40
  245. #endif
  246. /* Cache Configuration */
  247. #define CONFIG_SYS_CACHELINE_SIZE 16
  248. #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  249. CONFIG_SYS_INIT_RAM_SIZE - 8)
  250. #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  251. CONFIG_SYS_INIT_RAM_SIZE - 4)
  252. #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA)
  253. #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
  254. CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
  255. CF_ACR_EN | CF_ACR_SM_ALL)
  256. #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
  257. CF_CACR_DCM_P)
  258. #endif /* _CONFIG_ASTRO_MCF5373L_H */