M5275EVB.h 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205
  1. /*
  2. * Configuation settings for the Motorola MC5275EVB board.
  3. *
  4. * By Arthur Shipkowski <art@videon-central.com>
  5. * Copyright (C) 2005 Videon Central, Inc.
  6. *
  7. * Based off of M5272C3 board code by Josef Baumgartner
  8. * <josef.baumgartner@telex.de>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. /*
  13. * board/config.h - configuration options, board specific
  14. */
  15. #ifndef _M5275EVB_H
  16. #define _M5275EVB_H
  17. /*
  18. * High Level Configuration Options
  19. * (easy to change)
  20. */
  21. #define CONFIG_MCFTMR
  22. #define CONFIG_MCFUART
  23. #define CONFIG_SYS_UART_PORT (0)
  24. /* Configuration for environment
  25. * Environment is embedded in u-boot in the second sector of the flash
  26. */
  27. #ifndef CONFIG_MONITOR_IS_IN_RAM
  28. #define CONFIG_ENV_OFFSET 0x4000
  29. #define CONFIG_ENV_SECT_SIZE 0x2000
  30. #else
  31. #define CONFIG_ENV_ADDR 0xffe04000
  32. #define CONFIG_ENV_SECT_SIZE 0x2000
  33. #endif
  34. #define LDS_BOARD_TEXT \
  35. . = DEFINED(env_offset) ? env_offset : .; \
  36. env/embedded.o(.text);
  37. /*
  38. * BOOTP options
  39. */
  40. #define CONFIG_BOOTP_BOOTFILESIZE
  41. #define CONFIG_BOOTP_BOOTPATH
  42. #define CONFIG_BOOTP_GATEWAY
  43. #define CONFIG_BOOTP_HOSTNAME
  44. /* Available command configuration */
  45. #define CONFIG_MCFFEC
  46. #ifdef CONFIG_MCFFEC
  47. #define CONFIG_MII 1
  48. #define CONFIG_MII_INIT 1
  49. #define CONFIG_SYS_DISCOVER_PHY
  50. #define CONFIG_SYS_RX_ETH_BUFFER 8
  51. #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  52. #define CONFIG_SYS_FEC0_PINMUX 0
  53. #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
  54. #define CONFIG_SYS_FEC1_PINMUX 0
  55. #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
  56. #define MCFFEC_TOUT_LOOP 50000
  57. #define CONFIG_HAS_ETH1
  58. /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
  59. #ifndef CONFIG_SYS_DISCOVER_PHY
  60. #define FECDUPLEX FULL
  61. #define FECSPEED _100BASET
  62. #else
  63. #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  64. #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  65. #endif
  66. #endif
  67. #endif
  68. /* I2C */
  69. #define CONFIG_SYS_I2C
  70. #define CONFIG_SYS_I2C_FSL
  71. #define CONFIG_SYS_FSL_I2C_SPEED 80000
  72. #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
  73. #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
  74. #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
  75. #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
  76. #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
  77. #define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
  78. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  79. #define CONFIG_SYS_LOAD_ADDR 0x800000
  80. #define CONFIG_BOOTCOMMAND "bootm ffe40000"
  81. #define CONFIG_SYS_MEMTEST_START 0x400
  82. #define CONFIG_SYS_MEMTEST_END 0x380000
  83. #ifdef CONFIG_MCFFEC
  84. # define CONFIG_NET_RETRY_COUNT 5
  85. # define CONFIG_OVERWRITE_ETHADDR_ONCE
  86. #endif /* FEC_ENET */
  87. #define CONFIG_EXTRA_ENV_SETTINGS \
  88. "netdev=eth0\0" \
  89. "loadaddr=10000\0" \
  90. "uboot=u-boot.bin\0" \
  91. "load=tftp ${loadaddr} ${uboot}\0" \
  92. "upd=run load; run prog\0" \
  93. "prog=prot off ffe00000 ffe3ffff;" \
  94. "era ffe00000 ffe3ffff;" \
  95. "cp.b ${loadaddr} ffe00000 ${filesize};"\
  96. "save\0" \
  97. ""
  98. #define CONFIG_SYS_CLK 150000000
  99. /*
  100. * Low Level Configuration Settings
  101. * (address mappings, register initial values, etc.)
  102. * You should know what you are doing if you make changes here.
  103. */
  104. #define CONFIG_SYS_MBAR 0x40000000
  105. /*-----------------------------------------------------------------------
  106. * Definitions for initial stack pointer and data area (in DPRAM)
  107. */
  108. #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
  109. #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
  110. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  111. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  112. /*-----------------------------------------------------------------------
  113. * Start addresses for the final memory configuration
  114. * (Set up by the startup code)
  115. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  116. */
  117. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  118. #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
  119. #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
  120. #ifdef CONFIG_MONITOR_IS_IN_RAM
  121. #define CONFIG_SYS_MONITOR_BASE 0x20000
  122. #else
  123. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
  124. #endif
  125. #define CONFIG_SYS_MONITOR_LEN 0x20000
  126. #define CONFIG_SYS_MALLOC_LEN (256 << 10)
  127. #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
  128. /*
  129. * For booting Linux, the board info and command line data
  130. * have to be in the first 8 MB of memory, since this is
  131. * the maximum mapped by the Linux kernel during initialization ??
  132. */
  133. #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
  134. #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
  135. /*-----------------------------------------------------------------------
  136. * FLASH organization
  137. */
  138. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
  139. #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
  140. #define CONFIG_SYS_FLASH_ERASE_TOUT 1000
  141. #define CONFIG_SYS_FLASH_CFI 1
  142. #define CONFIG_FLASH_CFI_DRIVER 1
  143. #define CONFIG_SYS_FLASH_SIZE 0x200000
  144. /*-----------------------------------------------------------------------
  145. * Cache Configuration
  146. */
  147. #define CONFIG_SYS_CACHELINE_SIZE 16
  148. #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  149. CONFIG_SYS_INIT_RAM_SIZE - 8)
  150. #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
  151. CONFIG_SYS_INIT_RAM_SIZE - 4)
  152. #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
  153. #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
  154. CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
  155. CF_ACR_EN | CF_ACR_SM_ALL)
  156. #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
  157. CF_CACR_DISD | CF_CACR_INVI | \
  158. CF_CACR_CEIB | CF_CACR_DCM | \
  159. CF_CACR_EUSP)
  160. /*-----------------------------------------------------------------------
  161. * Memory bank definitions
  162. */
  163. #define CONFIG_SYS_CS0_BASE 0xffe00000
  164. #define CONFIG_SYS_CS0_CTRL 0x00001980
  165. #define CONFIG_SYS_CS0_MASK 0x001F0001
  166. #define CONFIG_SYS_CS1_BASE 0x30000000
  167. #define CONFIG_SYS_CS1_CTRL 0x00001900
  168. #define CONFIG_SYS_CS1_MASK 0x00070001
  169. /*-----------------------------------------------------------------------
  170. * Port configuration
  171. */
  172. #define CONFIG_SYS_FECI2C 0x0FA0
  173. #endif /* _M5275EVB_H */