gpio.h 13 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Definitions for the GPIO subsystem on Apollolake
  4. *
  5. * Copyright (C) 2015 - 2017 Intel Corp.
  6. * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
  7. *
  8. * Placed in a separate file since some of these definitions can be used from
  9. * assembly code
  10. *
  11. * Taken from gpio_apl.h in coreboot
  12. */
  13. #ifndef _ASM_ARCH_GPIO_H_
  14. #define _ASM_ARCH_GPIO_H_
  15. /* Port ids */
  16. #define PID_GPIO_SW 0xC0
  17. #define PID_GPIO_S 0xC2
  18. #define PID_GPIO_W 0xC7
  19. #define PID_GPIO_NW 0xC4
  20. #define PID_GPIO_N 0xC5
  21. #define PID_ITSS 0xD0
  22. #define PID_RTC 0xD1
  23. /*
  24. * Miscellaneous Configuration register(MISCCFG). These are community-specific
  25. * registers and are meant to house miscellaneous configuration fields per
  26. * community. There are 8 GPIO groups: GPP_0 -> GPP_8 (Group 3 is absent)
  27. */
  28. #define GPIO_MISCCFG 0x10 /* Miscellaneous Configuration offset */
  29. #define GPIO_GPE_SW_31_0 0 /* SOUTHWEST GPIO# 0 ~ 31 belong to GROUP0 */
  30. #define GPIO_GPE_SW_63_32 1 /* SOUTHWEST GPIO# 32 ~ 42 belong to GROUP1 */
  31. #define GPIO_GPE_W_31_0 2 /* WEST GPIO# 0 ~ 25 belong to GROUP2 */
  32. #define GPIO_GPE_NW_31_0 4 /* NORTHWEST GPIO# 0 ~ 17 belong to GROUP4 */
  33. #define GPIO_GPE_NW_63_32 5 /* NORTHWEST GPIO# 32 ~ 63 belong to GROUP5 */
  34. #define GPIO_GPE_NW_95_64 6 /* NORTHWEST GPIO# 64 ~ 76 belong to GROUP6 */
  35. #define GPIO_GPE_N_31_0 7 /* NORTH GPIO# 0 ~ 31 belong to GROUP7 */
  36. #define GPIO_GPE_N_63_32 8 /* NORTH GPIO# 32 ~ 61 belong to GROUP8 */
  37. #define GPIO_MAX_NUM_PER_GROUP 32
  38. /*
  39. * Host Software Pad Ownership Register.
  40. * The pins in the community are divided into 3 groups:
  41. * GPIO 0 ~ 31, GPIO 32 ~ 63, GPIO 64 ~ 95
  42. */
  43. #define HOSTSW_OWN_REG_0 0x80
  44. #define PAD_CFG_BASE 0x500
  45. #define GPI_INT_STS_0 0x100
  46. #define GPI_INT_EN_0 0x110
  47. #define GPI_SMI_STS_0 0x140
  48. #define GPI_SMI_EN_0 0x150
  49. #define NUM_N_PADS (PAD_N(SVID0_CLK) + 1)
  50. #define NUM_NW_PADS (PAD_NW(GPIO_123) + 1)
  51. #define NUM_W_PADS (PAD_W(SUSPWRDNACK) + 1)
  52. #define NUM_SW_PADS (PAD_SW(LPC_FRAMEB) + 1)
  53. #define NUM_N_GPI_REGS \
  54. (ALIGN(NUM_N_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP)
  55. #define NUM_NW_GPI_REGS \
  56. (ALIGN(NUM_NW_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP)
  57. #define NUM_W_GPI_REGS \
  58. (ALIGN(NUM_W_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP)
  59. #define NUM_SW_GPI_REGS \
  60. (ALIGN(NUM_SW_PADS, GPIO_MAX_NUM_PER_GROUP) / GPIO_MAX_NUM_PER_GROUP)
  61. /*
  62. * Total number of GPI status registers across all GPIO communities in the SOC
  63. */
  64. #define NUM_GPI_STATUS_REGS (NUM_N_GPI_REGS + NUM_NW_GPI_REGS \
  65. + NUM_W_GPI_REGS + NUM_SW_GPI_REGS)
  66. /* North community pads */
  67. #define GPIO_0 0
  68. #define GPIO_1 1
  69. #define GPIO_2 2
  70. #define GPIO_3 3
  71. #define GPIO_4 4
  72. #define GPIO_5 5
  73. #define GPIO_6 6
  74. #define GPIO_7 7
  75. #define GPIO_8 8
  76. #define GPIO_9 9
  77. #define GPIO_10 10
  78. #define GPIO_11 11
  79. #define GPIO_12 12
  80. #define GPIO_13 13
  81. #define GPIO_14 14
  82. #define GPIO_15 15
  83. #define GPIO_16 16
  84. #define GPIO_17 17
  85. #define GPIO_18 18
  86. #define GPIO_19 19
  87. #define GPIO_20 20
  88. #define GPIO_21 21
  89. #define GPIO_22 22
  90. #define GPIO_23 23
  91. #define GPIO_24 24
  92. #define GPIO_25 25
  93. #define GPIO_26 26
  94. #define GPIO_27 27
  95. #define GPIO_28 28
  96. #define GPIO_29 29
  97. #define GPIO_30 30
  98. #define GPIO_31 31
  99. #define GPIO_32 32
  100. #define GPIO_33 33
  101. #define GPIO_34 34
  102. #define GPIO_35 35
  103. #define GPIO_36 36
  104. #define GPIO_37 37
  105. #define GPIO_38 38
  106. #define GPIO_39 39
  107. #define GPIO_40 40
  108. #define GPIO_41 41
  109. #define GPIO_42 42
  110. #define GPIO_43 43
  111. #define GPIO_44 44
  112. #define GPIO_45 45
  113. #define GPIO_46 46
  114. #define GPIO_47 47
  115. #define GPIO_48 48
  116. #define GPIO_49 49
  117. #define GPIO_62 50
  118. #define GPIO_63 51
  119. #define GPIO_64 52
  120. #define GPIO_65 53
  121. #define GPIO_66 54
  122. #define GPIO_67 55
  123. #define GPIO_68 56
  124. #define GPIO_69 57
  125. #define GPIO_70 58
  126. #define GPIO_71 59
  127. #define GPIO_72 60
  128. #define GPIO_73 61
  129. #define JTAG_TCK 62
  130. #define JTAG_TRST_B 63
  131. #define JTAG_TMS 64
  132. #define JTAG_TDI 65
  133. #define JTAG_CX_PMODE 66
  134. #define JTAG_CX_PREQ_B 67
  135. #define JTAGX 68
  136. #define JTAG_CX_PRDY_B 69
  137. #define JTAG_TDO 70
  138. #define CNV_BRI_DT 71
  139. #define CNV_BRI_RSP 72
  140. #define CNV_RGI_DT 73
  141. #define CNV_RGI_RSP 74
  142. #define SVID0_ALERT_B 75
  143. #define SVID0_DATA 76
  144. #define SVID0_CLK 77
  145. /* Northwest community pads */
  146. #define GPIO_187 78
  147. #define GPIO_188 79
  148. #define GPIO_189 80
  149. #define GPIO_190 81
  150. #define GPIO_191 82
  151. #define GPIO_192 83
  152. #define GPIO_193 84
  153. #define GPIO_194 85
  154. #define GPIO_195 86
  155. #define GPIO_196 87
  156. #define GPIO_197 88
  157. #define GPIO_198 89
  158. #define GPIO_199 90
  159. #define GPIO_200 91
  160. #define GPIO_201 92
  161. #define GPIO_202 93
  162. #define GPIO_203 94
  163. #define GPIO_204 95
  164. #define PMC_SPI_FS0 96
  165. #define PMC_SPI_FS1 97
  166. #define PMC_SPI_FS2 98
  167. #define PMC_SPI_RXD 99
  168. #define PMC_SPI_TXD 100
  169. #define PMC_SPI_CLK 101
  170. #define PMIC_PWRGOOD 102
  171. #define PMIC_RESET_B 103
  172. #define GPIO_213 104
  173. #define GPIO_214 105
  174. #define GPIO_215 106
  175. #define PMIC_THERMTRIP_B 107
  176. #define PMIC_STDBY 108
  177. #define PROCHOT_B 109
  178. #define PMIC_I2C_SCL 110
  179. #define PMIC_I2C_SDA 111
  180. #define GPIO_74 112
  181. #define GPIO_75 113
  182. #define GPIO_76 114
  183. #define GPIO_77 115
  184. #define GPIO_78 116
  185. #define GPIO_79 117
  186. #define GPIO_80 118
  187. #define GPIO_81 119
  188. #define GPIO_82 120
  189. #define GPIO_83 121
  190. #define GPIO_84 122
  191. #define GPIO_85 123
  192. #define GPIO_86 124
  193. #define GPIO_87 125
  194. #define GPIO_88 126
  195. #define GPIO_89 127
  196. #define GPIO_90 128
  197. #define GPIO_91 129
  198. #define GPIO_92 130
  199. #define GPIO_97 131
  200. #define GPIO_98 132
  201. #define GPIO_99 133
  202. #define GPIO_100 134
  203. #define GPIO_101 135
  204. #define GPIO_102 136
  205. #define GPIO_103 137
  206. #define FST_SPI_CLK_FB 138
  207. #define GPIO_104 139
  208. #define GPIO_105 140
  209. #define GPIO_106 141
  210. #define GPIO_109 142
  211. #define GPIO_110 143
  212. #define GPIO_111 144
  213. #define GPIO_112 145
  214. #define GPIO_113 146
  215. #define GPIO_116 147
  216. #define GPIO_117 148
  217. #define GPIO_118 149
  218. #define GPIO_119 150
  219. #define GPIO_120 151
  220. #define GPIO_121 152
  221. #define GPIO_122 153
  222. #define GPIO_123 154
  223. /* West community pads */
  224. #define GPIO_124 155
  225. #define GPIO_125 156
  226. #define GPIO_126 157
  227. #define GPIO_127 158
  228. #define GPIO_128 159
  229. #define GPIO_129 160
  230. #define GPIO_130 161
  231. #define GPIO_131 162
  232. #define GPIO_132 163
  233. #define GPIO_133 164
  234. #define GPIO_134 165
  235. #define GPIO_135 166
  236. #define GPIO_136 167
  237. #define GPIO_137 168
  238. #define GPIO_138 169
  239. #define GPIO_139 170
  240. #define GPIO_146 171
  241. #define GPIO_147 172
  242. #define GPIO_148 173
  243. #define GPIO_149 174
  244. #define GPIO_150 175
  245. #define GPIO_151 176
  246. #define GPIO_152 177
  247. #define GPIO_153 178
  248. #define GPIO_154 179
  249. #define GPIO_155 180
  250. #define GPIO_209 181
  251. #define GPIO_210 182
  252. #define GPIO_211 183
  253. #define GPIO_212 184
  254. #define OSC_CLK_OUT_0 185
  255. #define OSC_CLK_OUT_1 186
  256. #define OSC_CLK_OUT_2 187
  257. #define OSC_CLK_OUT_3 188
  258. #define OSC_CLK_OUT_4 189
  259. #define PMU_AC_PRESENT 190
  260. #define PMU_BATLOW_B 191
  261. #define PMU_PLTRST_B 192
  262. #define PMU_PWRBTN_B 193
  263. #define PMU_RESETBUTTON_B 194
  264. #define PMU_SLP_S0_B 195
  265. #define PMU_SLP_S3_B 196
  266. #define PMU_SLP_S4_B 197
  267. #define PMU_SUSCLK 198
  268. #define PMU_WAKE_B 199
  269. #define SUS_STAT_B 200
  270. #define SUSPWRDNACK 201
  271. /* Southwest community pads */
  272. #define GPIO_205 202
  273. #define GPIO_206 203
  274. #define GPIO_207 204
  275. #define GPIO_208 205
  276. #define GPIO_156 206
  277. #define GPIO_157 207
  278. #define GPIO_158 208
  279. #define GPIO_159 209
  280. #define GPIO_160 210
  281. #define GPIO_161 211
  282. #define GPIO_162 212
  283. #define GPIO_163 213
  284. #define GPIO_164 214
  285. #define GPIO_165 215
  286. #define GPIO_166 216
  287. #define GPIO_167 217
  288. #define GPIO_168 218
  289. #define GPIO_169 219
  290. #define GPIO_170 220
  291. #define GPIO_171 221
  292. #define GPIO_172 222
  293. #define GPIO_179 223
  294. #define GPIO_173 224
  295. #define GPIO_174 225
  296. #define GPIO_175 226
  297. #define GPIO_176 227
  298. #define GPIO_177 228
  299. #define GPIO_178 229
  300. #define GPIO_186 230
  301. #define GPIO_182 231
  302. #define GPIO_183 232
  303. #define SMB_ALERTB 233
  304. #define SMB_CLK 234
  305. #define SMB_DATA 235
  306. #define LPC_ILB_SERIRQ 236
  307. #define LPC_CLKOUT0 237
  308. #define LPC_CLKOUT1 238
  309. #define LPC_AD0 239
  310. #define LPC_AD1 240
  311. #define LPC_AD2 241
  312. #define LPC_AD3 242
  313. #define LPC_CLKRUNB 243
  314. #define LPC_FRAMEB 244
  315. /* PERST_0 not defined */
  316. #define GPIO_PRT0_UDEF 0xFF
  317. #define TOTAL_PADS 245
  318. #define N_OFFSET GPIO_0
  319. #define NW_OFFSET GPIO_187
  320. #define W_OFFSET GPIO_124
  321. #define SW_OFFSET GPIO_205
  322. /* Macros for translating a global pad offset to a local offset */
  323. #define PAD_N(pad) (pad - N_OFFSET)
  324. #define PAD_NW(pad) (pad - NW_OFFSET)
  325. #define PAD_W(pad) (pad - W_OFFSET)
  326. #define PAD_SW(pad) (pad - SW_OFFSET)
  327. /* Linux names of the GPIO devices */
  328. #define GPIO_COMM_N_NAME "INT3452:00"
  329. #define GPIO_COMM_NW_NAME "INT3452:01"
  330. #define GPIO_COMM_W_NAME "INT3452:02"
  331. #define GPIO_COMM_SW_NAME "INT3452:03"
  332. /* Following is used in gpio asl */
  333. #define GPIO_COMM_NAME "INT3452"
  334. #define GPIO_COMM_0_DESC \
  335. "General Purpose Input/Output (GPIO) Controller - North"
  336. #define GPIO_COMM_1_DESC \
  337. "General Purpose Input/Output (GPIO) Controller - Northwest"
  338. #define GPIO_COMM_2_DESC \
  339. "General Purpose Input/Output (GPIO) Controller - West"
  340. #define GPIO_COMM_3_DESC \
  341. "General Purpose Input/Output (GPIO) Controller - Southwest"
  342. #define GPIO_COMM0_PID PID_GPIO_N
  343. #define GPIO_COMM1_PID PID_GPIO_NW
  344. #define GPIO_COMM2_PID PID_GPIO_W
  345. #define GPIO_COMM3_PID PID_GPIO_SW
  346. /*
  347. * IOxAPIC IRQs for the GPIOs, overlap is expected as we encourage to use
  348. * shared IRQ instead of direct IRQ, in case of overlapping, we can easily
  349. * program one of the overlap to shared IRQ to avoid the conflict.
  350. */
  351. /* NorthWest community pads */
  352. #define PMIC_I2C_SDA_IRQ 0x32
  353. #define GPIO_74_IRQ 0x33
  354. #define GPIO_75_IRQ 0x34
  355. #define GPIO_76_IRQ 0x35
  356. #define GPIO_77_IRQ 0x36
  357. #define GPIO_78_IRQ 0x37
  358. #define GPIO_79_IRQ 0x38
  359. #define GPIO_80_IRQ 0x39
  360. #define GPIO_81_IRQ 0x3A
  361. #define GPIO_82_IRQ 0x3B
  362. #define GPIO_83_IRQ 0x3C
  363. #define GPIO_84_IRQ 0x3D
  364. #define GPIO_85_IRQ 0x3E
  365. #define GPIO_86_IRQ 0x3F
  366. #define GPIO_87_IRQ 0x40
  367. #define GPIO_88_IRQ 0x41
  368. #define GPIO_89_IRQ 0x42
  369. #define GPIO_90_IRQ 0x43
  370. #define GPIO_91_IRQ 0x44
  371. #define GPIO_97_IRQ 0x49
  372. #define GPIO_98_IRQ 0x4A
  373. #define GPIO_99_IRQ 0x4B
  374. #define GPIO_100_IRQ 0x4C
  375. #define GPIO_101_IRQ 0x4D
  376. #define GPIO_102_IRQ 0x4E
  377. #define GPIO_103_IRQ 0x4F
  378. #define GPIO_104_IRQ 0x50
  379. #define GPIO_105_IRQ 0x51
  380. #define GPIO_106_IRQ 0x52
  381. #define GPIO_109_IRQ 0x54
  382. #define GPIO_110_IRQ 0x55
  383. #define GPIO_111_IRQ 0x56
  384. #define GPIO_112_IRQ 0x57
  385. #define GPIO_113_IRQ 0x58
  386. #define GPIO_116_IRQ 0x5B
  387. #define GPIO_117_IRQ 0x5C
  388. #define GPIO_118_IRQ 0x5D
  389. #define GPIO_119_IRQ 0x5E
  390. #define GPIO_120_IRQ 0x5F
  391. #define GPIO_121_IRQ 0x60
  392. #define GPIO_122_IRQ 0x61
  393. #define GPIO_123_IRQ 0x62
  394. /* North community pads */
  395. #define GPIO_0_IRQ 0x63
  396. #define GPIO_1_IRQ 0x64
  397. #define GPIO_2_IRQ 0x65
  398. #define GPIO_3_IRQ 0x66
  399. #define GPIO_4_IRQ 0x67
  400. #define GPIO_5_IRQ 0x68
  401. #define GPIO_6_IRQ 0x69
  402. #define GPIO_7_IRQ 0x6A
  403. #define GPIO_8_IRQ 0x6B
  404. #define GPIO_9_IRQ 0x6C
  405. #define GPIO_10_IRQ 0x6D
  406. #define GPIO_11_IRQ 0x6E
  407. #define GPIO_12_IRQ 0x6F
  408. #define GPIO_13_IRQ 0x70
  409. #define GPIO_14_IRQ 0x71
  410. #define GPIO_15_IRQ 0x72
  411. #define GPIO_16_IRQ 0x73
  412. #define GPIO_17_IRQ 0x74
  413. #define GPIO_18_IRQ 0x75
  414. #define GPIO_19_IRQ 0x76
  415. #define GPIO_20_IRQ 0x77
  416. #define GPIO_21_IRQ 0x32
  417. #define GPIO_22_IRQ 0x33
  418. #define GPIO_23_IRQ 0x34
  419. #define GPIO_24_IRQ 0x35
  420. #define GPIO_25_IRQ 0x36
  421. #define GPIO_26_IRQ 0x37
  422. #define GPIO_27_IRQ 0x38
  423. #define GPIO_28_IRQ 0x39
  424. #define GPIO_29_IRQ 0x3A
  425. #define GPIO_30_IRQ 0x3B
  426. #define GPIO_31_IRQ 0x3C
  427. #define GPIO_32_IRQ 0x3D
  428. #define GPIO_33_IRQ 0x3E
  429. #define GPIO_34_IRQ 0x3F
  430. #define GPIO_35_IRQ 0x40
  431. #define GPIO_36_IRQ 0x41
  432. #define GPIO_37_IRQ 0x42
  433. #define GPIO_38_IRQ 0x43
  434. #define GPIO_39_IRQ 0x44
  435. #define GPIO_40_IRQ 0x45
  436. #define GPIO_41_IRQ 0x46
  437. #define GPIO_42_IRQ 0x47
  438. #define GPIO_43_IRQ 0x48
  439. #define GPIO_44_IRQ 0x49
  440. #define GPIO_45_IRQ 0x4A
  441. #define GPIO_46_IRQ 0x4B
  442. #define GPIO_47_IRQ 0x4C
  443. #define GPIO_48_IRQ 0x4D
  444. #define GPIO_49_IRQ 0x4E
  445. #define GPIO_62_IRQ 0x5B
  446. #define GPIO_63_IRQ 0x5C
  447. #define GPIO_64_IRQ 0x5D
  448. #define GPIO_65_IRQ 0x5E
  449. #define GPIO_66_IRQ 0x5F
  450. #define GPIO_67_IRQ 0x60
  451. #define GPIO_68_IRQ 0x61
  452. #define GPIO_69_IRQ 0x62
  453. #define GPIO_70_IRQ 0x63
  454. #define GPIO_71_IRQ 0x64
  455. #define GPIO_72_IRQ 0x65
  456. #define GPIO_73_IRQ 0x66
  457. /* This is needed by ACPI */
  458. #define GPIO_NUM_PAD_CFG_REGS 2 /* DW0, DW1 */
  459. #endif /* _ASM_ARCH_GPIO_H_ */