Kconfig 46 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. select INIT_SP_RELATIVE
  13. help
  14. U-Boot expects to be linked to a specific hard-coded address, and to
  15. be loaded to and run from that address. This option lifts that
  16. restriction, thus allowing the code to be loaded to and executed
  17. from almost any address. This logic relies on the relocation
  18. information that is embedded in the binary to support U-Boot
  19. relocating itself to the top-of-RAM later during execution.
  20. config INIT_SP_RELATIVE
  21. bool "Specify the early stack pointer relative to the .bss section"
  22. help
  23. U-Boot typically uses a hard-coded value for the stack pointer
  24. before relocation. Enable this option to instead calculate the
  25. initial SP at run-time. This is useful to avoid hard-coding addresses
  26. into U-Boot, so that it can be loaded and executed at arbitrary
  27. addresses and thus avoid using arbitrary addresses at runtime.
  28. If this option is enabled, the early stack pointer is set to
  29. &_bss_start with a offset value added. The offset is specified by
  30. SYS_INIT_SP_BSS_OFFSET.
  31. config SYS_INIT_SP_BSS_OFFSET
  32. int "Early stack offset from the .bss base address"
  33. depends on INIT_SP_RELATIVE
  34. default 524288
  35. help
  36. This option's value is the offset added to &_bss_start in order to
  37. calculate the stack pointer. This offset should be large enough so
  38. that the early malloc region, global data (gd), and early stack usage
  39. do not overlap any appended DTB.
  40. config LINUX_KERNEL_IMAGE_HEADER
  41. bool
  42. help
  43. Place a Linux kernel image header at the start of the U-Boot binary.
  44. The format of the header is described in the Linux kernel source at
  45. Documentation/arm64/booting.txt. This feature is useful since the
  46. image header reports the amount of memory (BSS and similar) that
  47. U-Boot needs to use, but which isn't part of the binary.
  48. if LINUX_KERNEL_IMAGE_HEADER
  49. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  50. hex
  51. help
  52. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  53. TEXT_OFFSET value written to the Linux kernel image header.
  54. endif
  55. endif
  56. config GIC_V3_ITS
  57. bool "ARM GICV3 ITS"
  58. help
  59. ARM GICV3 Interrupt translation service (ITS).
  60. Basic support for programming locality specific peripheral
  61. interrupts (LPI) configuration tables and enable LPI tables.
  62. LPI configuration table can be used by u-boot or Linux.
  63. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  64. configuration table can not be re-programmed, unless GICV3 reset.
  65. config STATIC_RELA
  66. bool
  67. default y if ARM64 && !POSITION_INDEPENDENT
  68. config DMA_ADDR_T_64BIT
  69. bool
  70. default y if ARM64
  71. config HAS_VBAR
  72. bool
  73. config HAS_THUMB2
  74. bool
  75. # Used for compatibility with asm files copied from the kernel
  76. config ARM_ASM_UNIFIED
  77. bool
  78. default y
  79. # Used for compatibility with asm files copied from the kernel
  80. config THUMB2_KERNEL
  81. bool
  82. config SYS_ICACHE_OFF
  83. bool "Do not enable icache"
  84. default n
  85. help
  86. Do not enable instruction cache in U-Boot.
  87. config SPL_SYS_ICACHE_OFF
  88. bool "Do not enable icache in SPL"
  89. depends on SPL
  90. default SYS_ICACHE_OFF
  91. help
  92. Do not enable instruction cache in SPL.
  93. config SYS_DCACHE_OFF
  94. bool "Do not enable dcache"
  95. default n
  96. help
  97. Do not enable data cache in U-Boot.
  98. config SPL_SYS_DCACHE_OFF
  99. bool "Do not enable dcache in SPL"
  100. depends on SPL
  101. default SYS_DCACHE_OFF
  102. help
  103. Do not enable data cache in SPL.
  104. config SYS_ARM_CACHE_CP15
  105. bool "CP15 based cache enabling support"
  106. help
  107. Select this if your processor suports enabling caches by using
  108. CP15 registers.
  109. config SYS_ARM_MMU
  110. bool "MMU-based Paged Memory Management Support"
  111. select SYS_ARM_CACHE_CP15
  112. help
  113. Select if you want MMU-based virtualised addressing space
  114. support via paged memory management.
  115. config SYS_ARM_MPU
  116. bool 'Use the ARM v7 PMSA Compliant MPU'
  117. help
  118. Some ARM systems without an MMU have instead a Memory Protection
  119. Unit (MPU) that defines the type and permissions for regions of
  120. memory.
  121. If your CPU has an MPU then you should choose 'y' here unless you
  122. know that you do not want to use the MPU.
  123. # If set, the workarounds for these ARM errata are applied early during U-Boot
  124. # startup. Note that in general these options force the workarounds to be
  125. # applied; no CPU-type/version detection exists, unlike the similar options in
  126. # the Linux kernel. Do not set these options unless they apply! Also note that
  127. # the following can be machine-specific errata. These do have ability to
  128. # provide rudimentary version and machine-specific checks, but expect no
  129. # product checks:
  130. # CONFIG_ARM_ERRATA_430973
  131. # CONFIG_ARM_ERRATA_454179
  132. # CONFIG_ARM_ERRATA_621766
  133. # CONFIG_ARM_ERRATA_798870
  134. # CONFIG_ARM_ERRATA_801819
  135. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  136. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  137. config ARM_ERRATA_430973
  138. bool
  139. config ARM_ERRATA_454179
  140. bool
  141. config ARM_ERRATA_621766
  142. bool
  143. config ARM_ERRATA_716044
  144. bool
  145. config ARM_ERRATA_725233
  146. bool
  147. config ARM_ERRATA_742230
  148. bool
  149. config ARM_ERRATA_743622
  150. bool
  151. config ARM_ERRATA_751472
  152. bool
  153. config ARM_ERRATA_761320
  154. bool
  155. config ARM_ERRATA_773022
  156. bool
  157. config ARM_ERRATA_774769
  158. bool
  159. config ARM_ERRATA_794072
  160. bool
  161. config ARM_ERRATA_798870
  162. bool
  163. config ARM_ERRATA_801819
  164. bool
  165. config ARM_ERRATA_826974
  166. bool
  167. config ARM_ERRATA_828024
  168. bool
  169. config ARM_ERRATA_829520
  170. bool
  171. config ARM_ERRATA_833069
  172. bool
  173. config ARM_ERRATA_833471
  174. bool
  175. config ARM_ERRATA_845369
  176. bool
  177. config ARM_ERRATA_852421
  178. bool
  179. config ARM_ERRATA_852423
  180. bool
  181. config ARM_ERRATA_855873
  182. bool
  183. config ARM_CORTEX_A8_CVE_2017_5715
  184. bool
  185. config ARM_CORTEX_A15_CVE_2017_5715
  186. bool
  187. config CPU_ARM720T
  188. bool
  189. select SYS_CACHE_SHIFT_5
  190. imply SYS_ARM_MMU
  191. config CPU_ARM920T
  192. bool
  193. select SYS_CACHE_SHIFT_5
  194. imply SYS_ARM_MMU
  195. config CPU_ARM926EJS
  196. bool
  197. select SYS_CACHE_SHIFT_5
  198. imply SYS_ARM_MMU
  199. config CPU_ARM946ES
  200. bool
  201. select SYS_CACHE_SHIFT_5
  202. imply SYS_ARM_MMU
  203. config CPU_ARM1136
  204. bool
  205. select SYS_CACHE_SHIFT_5
  206. imply SYS_ARM_MMU
  207. config CPU_ARM1176
  208. bool
  209. select HAS_VBAR
  210. select SYS_CACHE_SHIFT_5
  211. imply SYS_ARM_MMU
  212. config CPU_V7A
  213. bool
  214. select HAS_THUMB2
  215. select HAS_VBAR
  216. select SYS_CACHE_SHIFT_6
  217. imply SYS_ARM_MMU
  218. config CPU_V7M
  219. bool
  220. select HAS_THUMB2
  221. select SYS_ARM_MPU
  222. select SYS_CACHE_SHIFT_5
  223. select SYS_THUMB_BUILD
  224. select THUMB2_KERNEL
  225. config CPU_V7R
  226. bool
  227. select HAS_THUMB2
  228. select SYS_ARM_CACHE_CP15
  229. select SYS_ARM_MPU
  230. select SYS_CACHE_SHIFT_6
  231. config CPU_PXA
  232. bool
  233. select SYS_CACHE_SHIFT_5
  234. imply SYS_ARM_MMU
  235. config CPU_SA1100
  236. bool
  237. select SYS_CACHE_SHIFT_5
  238. imply SYS_ARM_MMU
  239. config SYS_CPU
  240. default "arm720t" if CPU_ARM720T
  241. default "arm920t" if CPU_ARM920T
  242. default "arm926ejs" if CPU_ARM926EJS
  243. default "arm946es" if CPU_ARM946ES
  244. default "arm1136" if CPU_ARM1136
  245. default "arm1176" if CPU_ARM1176
  246. default "armv7" if CPU_V7A
  247. default "armv7" if CPU_V7R
  248. default "armv7m" if CPU_V7M
  249. default "pxa" if CPU_PXA
  250. default "sa1100" if CPU_SA1100
  251. default "armv8" if ARM64
  252. config SYS_ARM_ARCH
  253. int
  254. default 4 if CPU_ARM720T
  255. default 4 if CPU_ARM920T
  256. default 5 if CPU_ARM926EJS
  257. default 5 if CPU_ARM946ES
  258. default 6 if CPU_ARM1136
  259. default 6 if CPU_ARM1176
  260. default 7 if CPU_V7A
  261. default 7 if CPU_V7M
  262. default 7 if CPU_V7R
  263. default 5 if CPU_PXA
  264. default 4 if CPU_SA1100
  265. default 8 if ARM64
  266. config SYS_CACHE_SHIFT_5
  267. bool
  268. config SYS_CACHE_SHIFT_6
  269. bool
  270. config SYS_CACHE_SHIFT_7
  271. bool
  272. config SYS_CACHELINE_SIZE
  273. int
  274. default 128 if SYS_CACHE_SHIFT_7
  275. default 64 if SYS_CACHE_SHIFT_6
  276. default 32 if SYS_CACHE_SHIFT_5
  277. choice
  278. prompt "Select the ARM data write cache policy"
  279. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  280. TARGET_BCMNSP || CPU_PXA || RZA1
  281. default SYS_ARM_CACHE_WRITEBACK
  282. config SYS_ARM_CACHE_WRITEBACK
  283. bool "Write-back (WB)"
  284. help
  285. A write updates the cache only and marks the cache line as dirty.
  286. External memory is updated only when the line is evicted or explicitly
  287. cleaned.
  288. config SYS_ARM_CACHE_WRITETHROUGH
  289. bool "Write-through (WT)"
  290. help
  291. A write updates both the cache and the external memory system.
  292. This does not mark the cache line as dirty.
  293. config SYS_ARM_CACHE_WRITEALLOC
  294. bool "Write allocation (WA)"
  295. help
  296. A cache line is allocated on a write miss. This means that executing a
  297. store instruction on the processor might cause a burst read to occur.
  298. There is a linefill to obtain the data for the cache line, before the
  299. write is performed.
  300. endchoice
  301. config ARCH_CPU_INIT
  302. bool "Enable ARCH_CPU_INIT"
  303. help
  304. Some architectures require a call to arch_cpu_init().
  305. Say Y here to enable it
  306. config SYS_ARCH_TIMER
  307. bool "ARM Generic Timer support"
  308. depends on CPU_V7A || ARM64
  309. default y if ARM64
  310. help
  311. The ARM Generic Timer (aka arch-timer) provides an architected
  312. interface to a timer source on an SoC.
  313. It is mandatory for ARMv8 implementation and widely available
  314. on ARMv7 systems.
  315. config ARM_SMCCC
  316. bool "Support for ARM SMC Calling Convention (SMCCC)"
  317. depends on CPU_V7A || ARM64
  318. select ARM_PSCI_FW
  319. help
  320. Say Y here if you want to enable ARM SMC Calling Convention.
  321. This should be enabled if U-Boot needs to communicate with system
  322. firmware (for example, PSCI) according to SMCCC.
  323. config SEMIHOSTING
  324. bool "support boot from semihosting"
  325. help
  326. In emulated environments, semihosting is a way for
  327. the hosted environment to call out to the emulator to
  328. retrieve files from the host machine.
  329. config SYS_THUMB_BUILD
  330. bool "Build U-Boot using the Thumb instruction set"
  331. depends on !ARM64
  332. help
  333. Use this flag to build U-Boot using the Thumb instruction set for
  334. ARM architectures. Thumb instruction set provides better code
  335. density. For ARM architectures that support Thumb2 this flag will
  336. result in Thumb2 code generated by GCC.
  337. config SPL_SYS_THUMB_BUILD
  338. bool "Build SPL using the Thumb instruction set"
  339. default y if SYS_THUMB_BUILD
  340. depends on !ARM64 && SPL
  341. help
  342. Use this flag to build SPL using the Thumb instruction set for
  343. ARM architectures. Thumb instruction set provides better code
  344. density. For ARM architectures that support Thumb2 this flag will
  345. result in Thumb2 code generated by GCC.
  346. config TPL_SYS_THUMB_BUILD
  347. bool "Build TPL using the Thumb instruction set"
  348. default y if SYS_THUMB_BUILD
  349. depends on TPL && !ARM64
  350. help
  351. Use this flag to build TPL using the Thumb instruction set for
  352. ARM architectures. Thumb instruction set provides better code
  353. density. For ARM architectures that support Thumb2 this flag will
  354. result in Thumb2 code generated by GCC.
  355. config SYS_L2CACHE_OFF
  356. bool "L2cache off"
  357. help
  358. If SoC does not support L2CACHE or one does not want to enable
  359. L2CACHE, choose this option.
  360. config ENABLE_ARM_SOC_BOOT0_HOOK
  361. bool "prepare BOOT0 header"
  362. help
  363. If the SoC's BOOT0 requires a header area filled with (magic)
  364. values, then choose this option, and create a file included as
  365. <asm/arch/boot0.h> which contains the required assembler code.
  366. config ARM_CORTEX_CPU_IS_UP
  367. bool
  368. default n
  369. config USE_ARCH_MEMCPY
  370. bool "Use an assembly optimized implementation of memcpy"
  371. default y
  372. depends on !ARM64
  373. help
  374. Enable the generation of an optimized version of memcpy.
  375. Such an implementation may be faster under some conditions
  376. but may increase the binary size.
  377. config SPL_USE_ARCH_MEMCPY
  378. bool "Use an assembly optimized implementation of memcpy for SPL"
  379. default y if USE_ARCH_MEMCPY
  380. depends on !ARM64 && SPL
  381. help
  382. Enable the generation of an optimized version of memcpy.
  383. Such an implementation may be faster under some conditions
  384. but may increase the binary size.
  385. config TPL_USE_ARCH_MEMCPY
  386. bool "Use an assembly optimized implementation of memcpy for TPL"
  387. default y if USE_ARCH_MEMCPY
  388. depends on !ARM64 && TPL
  389. help
  390. Enable the generation of an optimized version of memcpy.
  391. Such an implementation may be faster under some conditions
  392. but may increase the binary size.
  393. config USE_ARCH_MEMSET
  394. bool "Use an assembly optimized implementation of memset"
  395. default y
  396. depends on !ARM64
  397. help
  398. Enable the generation of an optimized version of memset.
  399. Such an implementation may be faster under some conditions
  400. but may increase the binary size.
  401. config SPL_USE_ARCH_MEMSET
  402. bool "Use an assembly optimized implementation of memset for SPL"
  403. default y if USE_ARCH_MEMSET
  404. depends on !ARM64 && SPL
  405. help
  406. Enable the generation of an optimized version of memset.
  407. Such an implementation may be faster under some conditions
  408. but may increase the binary size.
  409. config TPL_USE_ARCH_MEMSET
  410. bool "Use an assembly optimized implementation of memset for TPL"
  411. default y if USE_ARCH_MEMSET
  412. depends on !ARM64 && TPL
  413. help
  414. Enable the generation of an optimized version of memset.
  415. Such an implementation may be faster under some conditions
  416. but may increase the binary size.
  417. config SET_STACK_SIZE
  418. bool "Enable an option to set max stack size that can be used"
  419. default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
  420. help
  421. This will enable an option to set max stack size that can be
  422. used by U-Boot.
  423. config STACK_SIZE
  424. hex "Define max stack size that can be used by U-Boot"
  425. depends on SET_STACK_SIZE
  426. default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
  427. default 0x1000000 if ARCH_ZYNQ
  428. help
  429. Define Max stack size that can be used by U-Boot so that the
  430. initrd_high will be calculated as base stack pointer minus this
  431. stack size.
  432. config ARM64_SUPPORT_AARCH32
  433. bool "ARM64 system support AArch32 execution state"
  434. depends on ARM64
  435. default y if !TARGET_THUNDERX_88XX
  436. help
  437. This ARM64 system supports AArch32 execution state.
  438. choice
  439. prompt "Target select"
  440. default TARGET_HIKEY
  441. config ARCH_AT91
  442. bool "Atmel AT91"
  443. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  444. select SPL_SEPARATE_BSS if SPL
  445. config TARGET_EDB93XX
  446. bool "Support edb93xx"
  447. select CPU_ARM920T
  448. select PL010_SERIAL
  449. config TARGET_ASPENITE
  450. bool "Support aspenite"
  451. select CPU_ARM926EJS
  452. config TARGET_GPLUGD
  453. bool "Support gplugd"
  454. select CPU_ARM926EJS
  455. config ARCH_DAVINCI
  456. bool "TI DaVinci"
  457. select CPU_ARM926EJS
  458. select SPL_DM_SPI if SPL
  459. imply CMD_SAVES
  460. help
  461. Support for TI's DaVinci platform.
  462. config ARCH_KIRKWOOD
  463. bool "Marvell Kirkwood"
  464. select ARCH_MISC_INIT
  465. select BOARD_EARLY_INIT_F
  466. select CPU_ARM926EJS
  467. config ARCH_MVEBU
  468. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  469. select DM
  470. select DM_ETH
  471. select DM_SERIAL
  472. select DM_SPI
  473. select DM_SPI_FLASH
  474. select SPL_DM_SPI if SPL
  475. select SPL_DM_SPI_FLASH if SPL
  476. select OF_CONTROL
  477. select OF_SEPARATE
  478. select SPI
  479. imply CMD_DM
  480. config TARGET_APF27
  481. bool "Support apf27"
  482. select CPU_ARM926EJS
  483. select SUPPORT_SPL
  484. config ARCH_ORION5X
  485. bool "Marvell Orion"
  486. select CPU_ARM926EJS
  487. config TARGET_SPEAR300
  488. bool "Support spear300"
  489. select BOARD_EARLY_INIT_F
  490. select CPU_ARM926EJS
  491. select PL011_SERIAL
  492. imply CMD_SAVES
  493. config TARGET_SPEAR310
  494. bool "Support spear310"
  495. select BOARD_EARLY_INIT_F
  496. select CPU_ARM926EJS
  497. select PL011_SERIAL
  498. imply CMD_SAVES
  499. config TARGET_SPEAR320
  500. bool "Support spear320"
  501. select BOARD_EARLY_INIT_F
  502. select CPU_ARM926EJS
  503. select PL011_SERIAL
  504. imply CMD_SAVES
  505. config TARGET_SPEAR600
  506. bool "Support spear600"
  507. select BOARD_EARLY_INIT_F
  508. select CPU_ARM926EJS
  509. select PL011_SERIAL
  510. imply CMD_SAVES
  511. config TARGET_STV0991
  512. bool "Support stv0991"
  513. select CPU_V7A
  514. select DM
  515. select DM_SERIAL
  516. select DM_SPI
  517. select DM_SPI_FLASH
  518. select PL01X_SERIAL
  519. select SPI
  520. select SPI_FLASH
  521. imply CMD_DM
  522. config TARGET_X600
  523. bool "Support x600"
  524. select BOARD_LATE_INIT
  525. select CPU_ARM926EJS
  526. select PL011_SERIAL
  527. select SUPPORT_SPL
  528. config TARGET_FLEA3
  529. bool "Support flea3"
  530. select CPU_ARM1136
  531. config TARGET_MX35PDK
  532. bool "Support mx35pdk"
  533. select BOARD_LATE_INIT
  534. select CPU_ARM1136
  535. config ARCH_BCM283X
  536. bool "Broadcom BCM283X family"
  537. select DM
  538. select DM_GPIO
  539. select DM_SERIAL
  540. select OF_CONTROL
  541. select PL01X_SERIAL
  542. select SERIAL_SEARCH_ALL
  543. imply CMD_DM
  544. imply FAT_WRITE
  545. config ARCH_BCM63158
  546. bool "Broadcom BCM63158 family"
  547. select DM
  548. select OF_CONTROL
  549. imply CMD_DM
  550. config ARCH_BCM68360
  551. bool "Broadcom BCM68360 family"
  552. select DM
  553. select OF_CONTROL
  554. imply CMD_DM
  555. config ARCH_BCM6858
  556. bool "Broadcom BCM6858 family"
  557. select DM
  558. select OF_CONTROL
  559. imply CMD_DM
  560. config TARGET_VEXPRESS_CA15_TC2
  561. bool "Support vexpress_ca15_tc2"
  562. select CPU_V7A
  563. select CPU_V7_HAS_NONSEC
  564. select CPU_V7_HAS_VIRT
  565. select PL011_SERIAL
  566. config ARCH_BCMSTB
  567. bool "Broadcom BCM7XXX family"
  568. select CPU_V7A
  569. select DM
  570. select OF_CONTROL
  571. select OF_PRIOR_STAGE
  572. imply CMD_DM
  573. help
  574. This enables support for Broadcom ARM-based set-top box
  575. chipsets, including the 7445 family of chips.
  576. config TARGET_VEXPRESS_CA5X2
  577. bool "Support vexpress_ca5x2"
  578. select CPU_V7A
  579. select PL011_SERIAL
  580. config TARGET_VEXPRESS_CA9X4
  581. bool "Support vexpress_ca9x4"
  582. select CPU_V7A
  583. select PL011_SERIAL
  584. config TARGET_BCM23550_W1D
  585. bool "Support bcm23550_w1d"
  586. select CPU_V7A
  587. imply CRC32_VERIFY
  588. imply FAT_WRITE
  589. config TARGET_BCM28155_AP
  590. bool "Support bcm28155_ap"
  591. select CPU_V7A
  592. imply CRC32_VERIFY
  593. imply FAT_WRITE
  594. config TARGET_BCMCYGNUS
  595. bool "Support bcmcygnus"
  596. select CPU_V7A
  597. imply BCM_SF2_ETH
  598. imply BCM_SF2_ETH_GMAC
  599. imply CMD_HASH
  600. imply CRC32_VERIFY
  601. imply FAT_WRITE
  602. imply HASH_VERIFY
  603. imply NETDEVICES
  604. config TARGET_BCMNSP
  605. bool "Support bcmnsp"
  606. select CPU_V7A
  607. config TARGET_BCMNS2
  608. bool "Support Broadcom Northstar2"
  609. select ARM64
  610. help
  611. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  612. ARMv8 Cortex-A57 processors targeting a broad range of networking
  613. applications.
  614. config ARCH_EXYNOS
  615. bool "Samsung EXYNOS"
  616. select DM
  617. select DM_GPIO
  618. select DM_I2C
  619. select DM_KEYBOARD
  620. select DM_SERIAL
  621. select DM_SPI
  622. select DM_SPI_FLASH
  623. select SPI
  624. imply SYS_THUMB_BUILD
  625. imply CMD_DM
  626. imply FAT_WRITE
  627. config ARCH_S5PC1XX
  628. bool "Samsung S5PC1XX"
  629. select CPU_V7A
  630. select DM
  631. select DM_GPIO
  632. select DM_I2C
  633. select DM_SERIAL
  634. imply CMD_DM
  635. config ARCH_HIGHBANK
  636. bool "Calxeda Highbank"
  637. select CPU_V7A
  638. select PL011_SERIAL
  639. config ARCH_INTEGRATOR
  640. bool "ARM Ltd. Integrator family"
  641. select DM
  642. select DM_SERIAL
  643. select PL01X_SERIAL
  644. imply CMD_DM
  645. config ARCH_IPQ40XX
  646. bool "Qualcomm IPQ40xx SoCs"
  647. select CPU_V7A
  648. select DM
  649. select DM_GPIO
  650. select DM_SERIAL
  651. select PINCTRL
  652. select CLK
  653. select OF_CONTROL
  654. imply CMD_DM
  655. config ARCH_KEYSTONE
  656. bool "TI Keystone"
  657. select CMD_POWEROFF
  658. select CPU_V7A
  659. select SUPPORT_SPL
  660. select SYS_ARCH_TIMER
  661. select SYS_THUMB_BUILD
  662. imply CMD_MTDPARTS
  663. imply CMD_SAVES
  664. imply FIT
  665. config ARCH_K3
  666. bool "Texas Instruments' K3 Architecture"
  667. select SPL
  668. select SUPPORT_SPL
  669. select FIT
  670. config ARCH_OMAP2PLUS
  671. bool "TI OMAP2+"
  672. select CPU_V7A
  673. select SPL_BOARD_INIT if SPL
  674. select SPL_STACK_R if SPL
  675. select SUPPORT_SPL
  676. imply FIT
  677. config ARCH_MESON
  678. bool "Amlogic Meson"
  679. imply DISTRO_DEFAULTS
  680. imply DM_RNG
  681. help
  682. Support for the Meson SoC family developed by Amlogic Inc.,
  683. targeted at media players and tablet computers. We currently
  684. support the S905 (GXBaby) 64-bit SoC.
  685. config ARCH_MEDIATEK
  686. bool "MediaTek SoCs"
  687. select DM
  688. select OF_CONTROL
  689. select SPL_DM if SPL
  690. select SPL_LIBCOMMON_SUPPORT if SPL
  691. select SPL_LIBGENERIC_SUPPORT if SPL
  692. select SPL_OF_CONTROL if SPL
  693. select SUPPORT_SPL
  694. help
  695. Support for the MediaTek SoCs family developed by MediaTek Inc.
  696. Please refer to doc/README.mediatek for more information.
  697. config ARCH_LPC32XX
  698. bool "NXP LPC32xx platform"
  699. select CPU_ARM926EJS
  700. select DM
  701. select DM_GPIO
  702. select DM_SERIAL
  703. select SPL_DM if SPL
  704. select SUPPORT_SPL
  705. imply CMD_DM
  706. config ARCH_IMX8
  707. bool "NXP i.MX8 platform"
  708. select ARM64
  709. select DM
  710. select OF_CONTROL
  711. select ENABLE_ARM_SOC_BOOT0_HOOK
  712. config ARCH_IMX8M
  713. bool "NXP i.MX8M platform"
  714. select ARM64
  715. select DM
  716. select SUPPORT_SPL
  717. imply CMD_DM
  718. config ARCH_IMXRT
  719. bool "NXP i.MXRT platform"
  720. select CPU_V7M
  721. select DM
  722. select DM_SERIAL
  723. select SUPPORT_SPL
  724. imply CMD_DM
  725. config ARCH_MX23
  726. bool "NXP i.MX23 family"
  727. select CPU_ARM926EJS
  728. select PL011_SERIAL
  729. select SUPPORT_SPL
  730. config ARCH_MX25
  731. bool "NXP MX25"
  732. select CPU_ARM926EJS
  733. imply MXC_GPIO
  734. config ARCH_MX28
  735. bool "NXP i.MX28 family"
  736. select CPU_ARM926EJS
  737. select PL011_SERIAL
  738. select SUPPORT_SPL
  739. config ARCH_MX31
  740. bool "NXP i.MX31 family"
  741. select CPU_ARM1136
  742. config ARCH_MX7ULP
  743. bool "NXP MX7ULP"
  744. select CPU_V7A
  745. select ROM_UNIFIED_SECTIONS
  746. imply MXC_GPIO
  747. imply SYS_THUMB_BUILD
  748. config ARCH_MX7
  749. bool "Freescale MX7"
  750. select ARCH_MISC_INIT
  751. select CPU_V7A
  752. select SYS_FSL_HAS_SEC if IMX_HAB
  753. select SYS_FSL_SEC_COMPAT_4
  754. select SYS_FSL_SEC_LE
  755. imply BOARD_EARLY_INIT_F
  756. imply MXC_GPIO
  757. imply SYS_THUMB_BUILD
  758. config ARCH_MX6
  759. bool "Freescale MX6"
  760. select CPU_V7A
  761. select SYS_FSL_HAS_SEC
  762. select SYS_FSL_SEC_COMPAT_4
  763. select SYS_FSL_SEC_LE
  764. imply MXC_GPIO
  765. imply SYS_THUMB_BUILD
  766. if ARCH_MX6
  767. config SPL_LDSCRIPT
  768. default "arch/arm/mach-omap2/u-boot-spl.lds"
  769. endif
  770. config ARCH_MX5
  771. bool "Freescale MX5"
  772. select BOARD_EARLY_INIT_F
  773. select CPU_V7A
  774. imply MXC_GPIO
  775. config ARCH_OWL
  776. bool "Actions Semi OWL SoCs"
  777. select DM
  778. select DM_ETH
  779. select DM_SERIAL
  780. select OWL_SERIAL
  781. select CLK
  782. select CLK_OWL
  783. select OF_CONTROL
  784. select SYS_RELOC_GD_ENV_ADDR
  785. imply CMD_DM
  786. config ARCH_QEMU
  787. bool "QEMU Virtual Platform"
  788. select ARCH_SUPPORT_TFABOOT
  789. select DM
  790. select DM_SERIAL
  791. select OF_CONTROL
  792. select PL01X_SERIAL
  793. imply CMD_DM
  794. imply DM_RTC
  795. imply RTC_PL031
  796. config ARCH_RMOBILE
  797. bool "Renesas ARM SoCs"
  798. select BOARD_EARLY_INIT_F if !RZA1
  799. select DM
  800. select DM_SERIAL
  801. imply CMD_DM
  802. imply FAT_WRITE
  803. imply SYS_THUMB_BUILD
  804. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  805. config TARGET_S32V234EVB
  806. bool "Support s32v234evb"
  807. select ARM64
  808. select SYS_FSL_ERRATUM_ESDHC111
  809. config ARCH_SNAPDRAGON
  810. bool "Qualcomm Snapdragon SoCs"
  811. select ARM64
  812. select DM
  813. select DM_GPIO
  814. select DM_SERIAL
  815. select MSM_SMEM
  816. select OF_CONTROL
  817. select OF_SEPARATE
  818. select SMEM
  819. select SPMI
  820. imply CMD_DM
  821. config ARCH_SOCFPGA
  822. bool "Altera SOCFPGA family"
  823. select ARCH_EARLY_INIT_R
  824. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  825. select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  826. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  827. select DM
  828. select DM_SERIAL
  829. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  830. select OF_CONTROL
  831. select SPL_DM_RESET if DM_RESET
  832. select SPL_DM_SERIAL
  833. select SPL_LIBCOMMON_SUPPORT
  834. select SPL_LIBGENERIC_SUPPORT
  835. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  836. select SPL_OF_CONTROL
  837. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
  838. select SPL_SERIAL_SUPPORT
  839. select SPL_SYSRESET
  840. select SPL_WATCHDOG_SUPPORT
  841. select SUPPORT_SPL
  842. select SYS_NS16550
  843. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  844. select SYSRESET
  845. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  846. select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
  847. imply CMD_DM
  848. imply CMD_MTDPARTS
  849. imply CRC32_VERIFY
  850. imply DM_SPI
  851. imply DM_SPI_FLASH
  852. imply FAT_WRITE
  853. imply SPL
  854. imply SPL_DM
  855. imply SPL_DM_SPI
  856. imply SPL_DM_SPI_FLASH
  857. imply SPL_LIBDISK_SUPPORT
  858. imply SPL_MMC_SUPPORT
  859. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  860. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  861. imply SPL_SPI_FLASH_SUPPORT
  862. imply SPL_SPI_SUPPORT
  863. imply L2X0_CACHE
  864. config ARCH_SUNXI
  865. bool "Support sunxi (Allwinner) SoCs"
  866. select BINMAN
  867. select CMD_GPIO
  868. select CMD_MMC if MMC
  869. select CMD_USB if DISTRO_DEFAULTS
  870. select CLK
  871. select DM
  872. select DM_ETH
  873. select DM_GPIO
  874. select DM_KEYBOARD
  875. select DM_MMC if MMC
  876. select DM_SCSI if SCSI
  877. select DM_SERIAL
  878. select DM_USB if DISTRO_DEFAULTS
  879. select OF_BOARD_SETUP
  880. select OF_CONTROL
  881. select OF_SEPARATE
  882. select SPECIFY_CONSOLE_INDEX
  883. select SPL_STACK_R if SPL
  884. select SPL_SYS_MALLOC_SIMPLE if SPL
  885. select SPL_SYS_THUMB_BUILD if !ARM64
  886. select SUNXI_GPIO
  887. select SYS_NS16550
  888. select SYS_THUMB_BUILD if !ARM64
  889. select USB if DISTRO_DEFAULTS
  890. select USB_KEYBOARD if DISTRO_DEFAULTS
  891. select USB_STORAGE if DISTRO_DEFAULTS
  892. select SPL_USE_TINY_PRINTF
  893. select USE_PREBOOT
  894. select SYS_RELOC_GD_ENV_ADDR
  895. imply CMD_DM
  896. imply CMD_GPT
  897. imply CMD_UBI if MTD_RAW_NAND
  898. imply DISTRO_DEFAULTS
  899. imply FAT_WRITE
  900. imply FIT
  901. imply OF_LIBFDT_OVERLAY
  902. imply PRE_CONSOLE_BUFFER
  903. imply SPL_GPIO_SUPPORT
  904. imply SPL_LIBCOMMON_SUPPORT
  905. imply SPL_LIBGENERIC_SUPPORT
  906. imply SPL_MMC_SUPPORT if MMC
  907. imply SPL_POWER_SUPPORT
  908. imply SPL_SERIAL_SUPPORT
  909. imply USB_GADGET
  910. config ARCH_U8500
  911. bool "ST-Ericsson U8500 Series"
  912. select CPU_V7A
  913. select DM
  914. select DM_GPIO
  915. select DM_MMC if MMC
  916. select DM_SERIAL
  917. select DM_USB if USB
  918. select OF_CONTROL
  919. select SYSRESET
  920. select TIMER
  921. imply ARM_PL180_MMCI
  922. imply DM_RTC
  923. imply NOMADIK_MTU_TIMER
  924. imply PL01X_SERIAL
  925. imply RTC_PL031
  926. imply SYSRESET_SYSCON
  927. config ARCH_VERSAL
  928. bool "Support Xilinx Versal Platform"
  929. select ARM64
  930. select CLK
  931. select DM
  932. select DM_ETH if NET
  933. select DM_MMC if MMC
  934. select DM_SERIAL
  935. select OF_CONTROL
  936. imply BOARD_LATE_INIT
  937. config ARCH_VF610
  938. bool "Freescale Vybrid"
  939. select CPU_V7A
  940. select SYS_FSL_ERRATUM_ESDHC111
  941. imply CMD_MTDPARTS
  942. imply MTD_RAW_NAND
  943. config ARCH_ZYNQ
  944. bool "Xilinx Zynq based platform"
  945. select CLK
  946. select CLK_ZYNQ
  947. select CPU_V7A
  948. select DM
  949. select DM_ETH if NET
  950. select DM_MMC if MMC
  951. select DM_SERIAL
  952. select DM_SPI
  953. select DM_SPI_FLASH
  954. select DM_USB if USB
  955. select OF_CONTROL
  956. select SPI
  957. select SPL_BOARD_INIT if SPL
  958. select SPL_CLK if SPL
  959. select SPL_DM if SPL
  960. select SPL_DM_SPI if SPL
  961. select SPL_DM_SPI_FLASH if SPL
  962. select SPL_OF_CONTROL if SPL
  963. select SPL_SEPARATE_BSS if SPL
  964. select SUPPORT_SPL
  965. imply ARCH_EARLY_INIT_R
  966. imply BOARD_LATE_INIT
  967. imply CMD_CLK
  968. imply CMD_DM
  969. imply CMD_SPL
  970. imply FAT_WRITE
  971. config ARCH_ZYNQMP_R5
  972. bool "Xilinx ZynqMP R5 based platform"
  973. select CLK
  974. select CPU_V7R
  975. select DM
  976. select DM_ETH if NET
  977. select DM_MMC if MMC
  978. select DM_SERIAL
  979. select OF_CONTROL
  980. imply CMD_DM
  981. imply DM_USB_GADGET
  982. config ARCH_ZYNQMP
  983. bool "Xilinx ZynqMP based platform"
  984. select ARM64
  985. select CLK
  986. select DM
  987. select DM_ETH if NET
  988. select DM_MAILBOX
  989. select DM_MMC if MMC
  990. select DM_SERIAL
  991. select DM_SPI if SPI
  992. select DM_SPI_FLASH if DM_SPI
  993. select DM_USB if USB
  994. select FIRMWARE
  995. select OF_CONTROL
  996. select SPL_BOARD_INIT if SPL
  997. select SPL_CLK if SPL
  998. select SPL_DM_SPI if SPI
  999. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  1000. select SPL_DM_MAILBOX if SPL
  1001. select SPL_FIRMWARE if SPL
  1002. select SPL_SEPARATE_BSS if SPL
  1003. select SUPPORT_SPL
  1004. select ZYNQMP_IPI
  1005. imply BOARD_LATE_INIT
  1006. imply CMD_DM
  1007. imply FAT_WRITE
  1008. imply MP
  1009. imply DM_USB_GADGET
  1010. config ARCH_TEGRA
  1011. bool "NVIDIA Tegra"
  1012. imply DISTRO_DEFAULTS
  1013. imply FAT_WRITE
  1014. config TARGET_VEXPRESS64_AEMV8A
  1015. bool "Support vexpress_aemv8a"
  1016. select ARM64
  1017. select PL01X_SERIAL
  1018. config TARGET_VEXPRESS64_BASE_FVP
  1019. bool "Support Versatile Express ARMv8a FVP BASE model"
  1020. select ARM64
  1021. select PL01X_SERIAL
  1022. select SEMIHOSTING
  1023. config TARGET_VEXPRESS64_JUNO
  1024. bool "Support Versatile Express Juno Development Platform"
  1025. select ARM64
  1026. select PL01X_SERIAL
  1027. select DM
  1028. select OF_CONTROL
  1029. select OF_BOARD
  1030. select CLK
  1031. select DM_SERIAL
  1032. select ARM_PSCI_FW
  1033. select PSCI_RESET
  1034. select DM_ETH
  1035. select BLK
  1036. select USB
  1037. select DM_USB
  1038. config TARGET_LS2080A_EMU
  1039. bool "Support ls2080a_emu"
  1040. select ARCH_LS2080A
  1041. select ARM64
  1042. select ARMV8_MULTIENTRY
  1043. select FSL_DDR_SYNC_REFRESH
  1044. help
  1045. Support for Freescale LS2080A_EMU platform.
  1046. The LS2080A Development System (EMULATOR) is a pre-silicon
  1047. development platform that supports the QorIQ LS2080A
  1048. Layerscape Architecture processor.
  1049. config TARGET_LS2080A_SIMU
  1050. bool "Support ls2080a_simu"
  1051. select ARCH_LS2080A
  1052. select ARM64
  1053. select ARMV8_MULTIENTRY
  1054. select BOARD_LATE_INIT
  1055. help
  1056. Support for Freescale LS2080A_SIMU platform.
  1057. The LS2080A Development System (QDS) is a pre silicon
  1058. development platform that supports the QorIQ LS2080A
  1059. Layerscape Architecture processor.
  1060. config TARGET_LS1088AQDS
  1061. bool "Support ls1088aqds"
  1062. select ARCH_LS1088A
  1063. select ARM64
  1064. select ARMV8_MULTIENTRY
  1065. select ARCH_SUPPORT_TFABOOT
  1066. select BOARD_LATE_INIT
  1067. select SUPPORT_SPL
  1068. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1069. help
  1070. Support for NXP LS1088AQDS platform.
  1071. The LS1088A Development System (QDS) is a high-performance
  1072. development platform that supports the QorIQ LS1088A
  1073. Layerscape Architecture processor.
  1074. config TARGET_LS2080AQDS
  1075. bool "Support ls2080aqds"
  1076. select ARCH_LS2080A
  1077. select ARM64
  1078. select ARMV8_MULTIENTRY
  1079. select ARCH_SUPPORT_TFABOOT
  1080. select BOARD_LATE_INIT
  1081. select SUPPORT_SPL
  1082. imply SCSI
  1083. imply SCSI_AHCI
  1084. select FSL_DDR_BIST
  1085. select FSL_DDR_INTERACTIVE if !SPL
  1086. help
  1087. Support for Freescale LS2080AQDS platform.
  1088. The LS2080A Development System (QDS) is a high-performance
  1089. development platform that supports the QorIQ LS2080A
  1090. Layerscape Architecture processor.
  1091. config TARGET_LS2080ARDB
  1092. bool "Support ls2080ardb"
  1093. select ARCH_LS2080A
  1094. select ARM64
  1095. select ARMV8_MULTIENTRY
  1096. select ARCH_SUPPORT_TFABOOT
  1097. select BOARD_LATE_INIT
  1098. select SUPPORT_SPL
  1099. select FSL_DDR_BIST
  1100. select FSL_DDR_INTERACTIVE if !SPL
  1101. imply SCSI
  1102. imply SCSI_AHCI
  1103. help
  1104. Support for Freescale LS2080ARDB platform.
  1105. The LS2080A Reference design board (RDB) is a high-performance
  1106. development platform that supports the QorIQ LS2080A
  1107. Layerscape Architecture processor.
  1108. config TARGET_LS2081ARDB
  1109. bool "Support ls2081ardb"
  1110. select ARCH_LS2080A
  1111. select ARM64
  1112. select ARMV8_MULTIENTRY
  1113. select BOARD_LATE_INIT
  1114. select SUPPORT_SPL
  1115. help
  1116. Support for Freescale LS2081ARDB platform.
  1117. The LS2081A Reference design board (RDB) is a high-performance
  1118. development platform that supports the QorIQ LS2081A/LS2041A
  1119. Layerscape Architecture processor.
  1120. config TARGET_LX2160ARDB
  1121. bool "Support lx2160ardb"
  1122. select ARCH_LX2160A
  1123. select ARM64
  1124. select ARMV8_MULTIENTRY
  1125. select ARCH_SUPPORT_TFABOOT
  1126. select BOARD_LATE_INIT
  1127. help
  1128. Support for NXP LX2160ARDB platform.
  1129. The lx2160ardb (LX2160A Reference design board (RDB)
  1130. is a high-performance development platform that supports the
  1131. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1132. config TARGET_LX2160AQDS
  1133. bool "Support lx2160aqds"
  1134. select ARCH_LX2160A
  1135. select ARM64
  1136. select ARMV8_MULTIENTRY
  1137. select ARCH_SUPPORT_TFABOOT
  1138. select BOARD_LATE_INIT
  1139. help
  1140. Support for NXP LX2160AQDS platform.
  1141. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1142. is a high-performance development platform that supports the
  1143. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1144. config TARGET_HIKEY
  1145. bool "Support HiKey 96boards Consumer Edition Platform"
  1146. select ARM64
  1147. select DM
  1148. select DM_GPIO
  1149. select DM_SERIAL
  1150. select OF_CONTROL
  1151. select PL01X_SERIAL
  1152. select SPECIFY_CONSOLE_INDEX
  1153. imply CMD_DM
  1154. help
  1155. Support for HiKey 96boards platform. It features a HI6220
  1156. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1157. config TARGET_HIKEY960
  1158. bool "Support HiKey960 96boards Consumer Edition Platform"
  1159. select ARM64
  1160. select DM
  1161. select DM_SERIAL
  1162. select OF_CONTROL
  1163. select PL01X_SERIAL
  1164. imply CMD_DM
  1165. help
  1166. Support for HiKey960 96boards platform. It features a HI3660
  1167. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1168. config TARGET_POPLAR
  1169. bool "Support Poplar 96boards Enterprise Edition Platform"
  1170. select ARM64
  1171. select DM
  1172. select DM_SERIAL
  1173. select DM_USB
  1174. select OF_CONTROL
  1175. select PL01X_SERIAL
  1176. imply CMD_DM
  1177. help
  1178. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1179. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1180. making it capable of running any commercial set-top solution based on
  1181. Linux or Android.
  1182. config TARGET_LS1012AQDS
  1183. bool "Support ls1012aqds"
  1184. select ARCH_LS1012A
  1185. select ARM64
  1186. select ARCH_SUPPORT_TFABOOT
  1187. select BOARD_LATE_INIT
  1188. help
  1189. Support for Freescale LS1012AQDS platform.
  1190. The LS1012A Development System (QDS) is a high-performance
  1191. development platform that supports the QorIQ LS1012A
  1192. Layerscape Architecture processor.
  1193. config TARGET_LS1012ARDB
  1194. bool "Support ls1012ardb"
  1195. select ARCH_LS1012A
  1196. select ARM64
  1197. select ARCH_SUPPORT_TFABOOT
  1198. select BOARD_LATE_INIT
  1199. imply SCSI
  1200. imply SCSI_AHCI
  1201. help
  1202. Support for Freescale LS1012ARDB platform.
  1203. The LS1012A Reference design board (RDB) is a high-performance
  1204. development platform that supports the QorIQ LS1012A
  1205. Layerscape Architecture processor.
  1206. config TARGET_LS1012A2G5RDB
  1207. bool "Support ls1012a2g5rdb"
  1208. select ARCH_LS1012A
  1209. select ARM64
  1210. select ARCH_SUPPORT_TFABOOT
  1211. select BOARD_LATE_INIT
  1212. imply SCSI
  1213. help
  1214. Support for Freescale LS1012A2G5RDB platform.
  1215. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1216. development platform that supports the QorIQ LS1012A
  1217. Layerscape Architecture processor.
  1218. config TARGET_LS1012AFRWY
  1219. bool "Support ls1012afrwy"
  1220. select ARCH_LS1012A
  1221. select ARM64
  1222. select ARCH_SUPPORT_TFABOOT
  1223. select BOARD_LATE_INIT
  1224. imply SCSI
  1225. imply SCSI_AHCI
  1226. help
  1227. Support for Freescale LS1012AFRWY platform.
  1228. The LS1012A FRWY board (FRWY) is a high-performance
  1229. development platform that supports the QorIQ LS1012A
  1230. Layerscape Architecture processor.
  1231. config TARGET_LS1012AFRDM
  1232. bool "Support ls1012afrdm"
  1233. select ARCH_LS1012A
  1234. select ARM64
  1235. select ARCH_SUPPORT_TFABOOT
  1236. help
  1237. Support for Freescale LS1012AFRDM platform.
  1238. The LS1012A Freedom board (FRDM) is a high-performance
  1239. development platform that supports the QorIQ LS1012A
  1240. Layerscape Architecture processor.
  1241. config TARGET_LS1028AQDS
  1242. bool "Support ls1028aqds"
  1243. select ARCH_LS1028A
  1244. select ARM64
  1245. select ARMV8_MULTIENTRY
  1246. select ARCH_SUPPORT_TFABOOT
  1247. select BOARD_LATE_INIT
  1248. help
  1249. Support for Freescale LS1028AQDS platform
  1250. The LS1028A Development System (QDS) is a high-performance
  1251. development platform that supports the QorIQ LS1028A
  1252. Layerscape Architecture processor.
  1253. config TARGET_LS1028ARDB
  1254. bool "Support ls1028ardb"
  1255. select ARCH_LS1028A
  1256. select ARM64
  1257. select ARMV8_MULTIENTRY
  1258. select ARCH_SUPPORT_TFABOOT
  1259. select BOARD_LATE_INIT
  1260. help
  1261. Support for Freescale LS1028ARDB platform
  1262. The LS1028A Development System (RDB) is a high-performance
  1263. development platform that supports the QorIQ LS1028A
  1264. Layerscape Architecture processor.
  1265. config TARGET_LS1088ARDB
  1266. bool "Support ls1088ardb"
  1267. select ARCH_LS1088A
  1268. select ARM64
  1269. select ARMV8_MULTIENTRY
  1270. select ARCH_SUPPORT_TFABOOT
  1271. select BOARD_LATE_INIT
  1272. select SUPPORT_SPL
  1273. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1274. help
  1275. Support for NXP LS1088ARDB platform.
  1276. The LS1088A Reference design board (RDB) is a high-performance
  1277. development platform that supports the QorIQ LS1088A
  1278. Layerscape Architecture processor.
  1279. config TARGET_LS1021AQDS
  1280. bool "Support ls1021aqds"
  1281. select ARCH_LS1021A
  1282. select ARCH_SUPPORT_PSCI
  1283. select BOARD_EARLY_INIT_F
  1284. select BOARD_LATE_INIT
  1285. select CPU_V7A
  1286. select CPU_V7_HAS_NONSEC
  1287. select CPU_V7_HAS_VIRT
  1288. select LS1_DEEP_SLEEP
  1289. select SUPPORT_SPL
  1290. select SYS_FSL_DDR
  1291. select FSL_DDR_INTERACTIVE
  1292. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1293. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1294. imply SCSI
  1295. config TARGET_LS1021ATWR
  1296. bool "Support ls1021atwr"
  1297. select ARCH_LS1021A
  1298. select ARCH_SUPPORT_PSCI
  1299. select BOARD_EARLY_INIT_F
  1300. select BOARD_LATE_INIT
  1301. select CPU_V7A
  1302. select CPU_V7_HAS_NONSEC
  1303. select CPU_V7_HAS_VIRT
  1304. select LS1_DEEP_SLEEP
  1305. select SUPPORT_SPL
  1306. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1307. imply SCSI
  1308. config TARGET_LS1021ATSN
  1309. bool "Support ls1021atsn"
  1310. select ARCH_LS1021A
  1311. select ARCH_SUPPORT_PSCI
  1312. select BOARD_EARLY_INIT_F
  1313. select BOARD_LATE_INIT
  1314. select CPU_V7A
  1315. select CPU_V7_HAS_NONSEC
  1316. select CPU_V7_HAS_VIRT
  1317. select LS1_DEEP_SLEEP
  1318. select SUPPORT_SPL
  1319. imply SCSI
  1320. config TARGET_LS1021AIOT
  1321. bool "Support ls1021aiot"
  1322. select ARCH_LS1021A
  1323. select ARCH_SUPPORT_PSCI
  1324. select BOARD_LATE_INIT
  1325. select CPU_V7A
  1326. select CPU_V7_HAS_NONSEC
  1327. select CPU_V7_HAS_VIRT
  1328. select SUPPORT_SPL
  1329. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1330. imply SCSI
  1331. help
  1332. Support for Freescale LS1021AIOT platform.
  1333. The LS1021A Freescale board (IOT) is a high-performance
  1334. development platform that supports the QorIQ LS1021A
  1335. Layerscape Architecture processor.
  1336. config TARGET_LS1043AQDS
  1337. bool "Support ls1043aqds"
  1338. select ARCH_LS1043A
  1339. select ARM64
  1340. select ARMV8_MULTIENTRY
  1341. select ARCH_SUPPORT_TFABOOT
  1342. select BOARD_EARLY_INIT_F
  1343. select BOARD_LATE_INIT
  1344. select SUPPORT_SPL
  1345. select FSL_DDR_INTERACTIVE if !SPL
  1346. select FSL_DSPI if !SPL_NO_DSPI
  1347. select DM_SPI_FLASH if FSL_DSPI
  1348. imply SCSI
  1349. imply SCSI_AHCI
  1350. help
  1351. Support for Freescale LS1043AQDS platform.
  1352. config TARGET_LS1043ARDB
  1353. bool "Support ls1043ardb"
  1354. select ARCH_LS1043A
  1355. select ARM64
  1356. select ARMV8_MULTIENTRY
  1357. select ARCH_SUPPORT_TFABOOT
  1358. select BOARD_EARLY_INIT_F
  1359. select BOARD_LATE_INIT
  1360. select SUPPORT_SPL
  1361. select FSL_DSPI if !SPL_NO_DSPI
  1362. select DM_SPI_FLASH if FSL_DSPI
  1363. help
  1364. Support for Freescale LS1043ARDB platform.
  1365. config TARGET_LS1046AQDS
  1366. bool "Support ls1046aqds"
  1367. select ARCH_LS1046A
  1368. select ARM64
  1369. select ARMV8_MULTIENTRY
  1370. select ARCH_SUPPORT_TFABOOT
  1371. select BOARD_EARLY_INIT_F
  1372. select BOARD_LATE_INIT
  1373. select DM_SPI_FLASH if DM_SPI
  1374. select SUPPORT_SPL
  1375. select FSL_DDR_BIST if !SPL
  1376. select FSL_DDR_INTERACTIVE if !SPL
  1377. select FSL_DDR_INTERACTIVE if !SPL
  1378. imply SCSI
  1379. help
  1380. Support for Freescale LS1046AQDS platform.
  1381. The LS1046A Development System (QDS) is a high-performance
  1382. development platform that supports the QorIQ LS1046A
  1383. Layerscape Architecture processor.
  1384. config TARGET_LS1046ARDB
  1385. bool "Support ls1046ardb"
  1386. select ARCH_LS1046A
  1387. select ARM64
  1388. select ARMV8_MULTIENTRY
  1389. select ARCH_SUPPORT_TFABOOT
  1390. select BOARD_EARLY_INIT_F
  1391. select BOARD_LATE_INIT
  1392. select DM_SPI_FLASH if DM_SPI
  1393. select POWER_MC34VR500
  1394. select SUPPORT_SPL
  1395. select FSL_DDR_BIST
  1396. select FSL_DDR_INTERACTIVE if !SPL
  1397. imply SCSI
  1398. help
  1399. Support for Freescale LS1046ARDB platform.
  1400. The LS1046A Reference Design Board (RDB) is a high-performance
  1401. development platform that supports the QorIQ LS1046A
  1402. Layerscape Architecture processor.
  1403. config TARGET_LS1046AFRWY
  1404. bool "Support ls1046afrwy"
  1405. select ARCH_LS1046A
  1406. select ARM64
  1407. select ARMV8_MULTIENTRY
  1408. select ARCH_SUPPORT_TFABOOT
  1409. select BOARD_EARLY_INIT_F
  1410. select BOARD_LATE_INIT
  1411. select DM_SPI_FLASH if DM_SPI
  1412. imply SCSI
  1413. help
  1414. Support for Freescale LS1046AFRWY platform.
  1415. The LS1046A Freeway Board (FRWY) is a high-performance
  1416. development platform that supports the QorIQ LS1046A
  1417. Layerscape Architecture processor.
  1418. config TARGET_COLIBRI_PXA270
  1419. bool "Support colibri_pxa270"
  1420. select CPU_PXA
  1421. config ARCH_UNIPHIER
  1422. bool "Socionext UniPhier SoCs"
  1423. select BOARD_LATE_INIT
  1424. select DM
  1425. select DM_ETH
  1426. select DM_GPIO
  1427. select DM_I2C
  1428. select DM_MMC
  1429. select DM_MTD
  1430. select DM_RESET
  1431. select DM_SERIAL
  1432. select DM_USB
  1433. select OF_BOARD_SETUP
  1434. select OF_CONTROL
  1435. select OF_LIBFDT
  1436. select PINCTRL
  1437. select SPL_BOARD_INIT if SPL
  1438. select SPL_DM if SPL
  1439. select SPL_LIBCOMMON_SUPPORT if SPL
  1440. select SPL_LIBGENERIC_SUPPORT if SPL
  1441. select SPL_OF_CONTROL if SPL
  1442. select SPL_PINCTRL if SPL
  1443. select SUPPORT_SPL
  1444. imply CMD_DM
  1445. imply DISTRO_DEFAULTS
  1446. imply FAT_WRITE
  1447. help
  1448. Support for UniPhier SoC family developed by Socionext Inc.
  1449. (formerly, System LSI Business Division of Panasonic Corporation)
  1450. config ARCH_STM32
  1451. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1452. select CPU_V7M
  1453. select DM
  1454. select DM_SERIAL
  1455. imply CMD_DM
  1456. config ARCH_STI
  1457. bool "Support STMicrolectronics SoCs"
  1458. select BLK
  1459. select CPU_V7A
  1460. select DM
  1461. select DM_MMC
  1462. select DM_RESET
  1463. select DM_SERIAL
  1464. imply CMD_DM
  1465. help
  1466. Support for STMicroelectronics STiH407/10 SoC family.
  1467. This SoC is used on Linaro 96Board STiH410-B2260
  1468. config ARCH_STM32MP
  1469. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1470. select ARCH_MISC_INIT
  1471. select ARCH_SUPPORT_TFABOOT
  1472. select BOARD_LATE_INIT
  1473. select CLK
  1474. select DM
  1475. select DM_GPIO
  1476. select DM_RESET
  1477. select DM_SERIAL
  1478. select MISC
  1479. select OF_CONTROL
  1480. select OF_LIBFDT
  1481. select OF_SYSTEM_SETUP
  1482. select PINCTRL
  1483. select REGMAP
  1484. select SUPPORT_SPL
  1485. select SYSCON
  1486. select SYSRESET
  1487. select SYS_THUMB_BUILD
  1488. imply SPL_SYSRESET
  1489. imply CMD_DM
  1490. imply CMD_POWEROFF
  1491. imply OF_LIBFDT_OVERLAY
  1492. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1493. imply USE_PREBOOT
  1494. help
  1495. Support for STM32MP SoC family developed by STMicroelectronics,
  1496. MPUs based on ARM cortex A core
  1497. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1498. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1499. chain.
  1500. SPL is the unsecure FSBL for the basic boot chain.
  1501. config ARCH_ROCKCHIP
  1502. bool "Support Rockchip SoCs"
  1503. select BLK
  1504. select BINMAN if !ARM64
  1505. select DM
  1506. select DM_GPIO
  1507. select DM_I2C
  1508. select DM_MMC
  1509. select DM_PWM
  1510. select DM_REGULATOR
  1511. select DM_SERIAL
  1512. select DM_SPI
  1513. select DM_SPI_FLASH
  1514. select DM_USB if USB
  1515. select ENABLE_ARM_SOC_BOOT0_HOOK
  1516. select OF_CONTROL
  1517. select SPI
  1518. select SPL_DM if SPL
  1519. select SPL_DM_SPI if SPL
  1520. select SPL_DM_SPI_FLASH if SPL
  1521. select SYS_MALLOC_F
  1522. select SYS_THUMB_BUILD if !ARM64
  1523. imply ADC
  1524. imply CMD_DM
  1525. imply DEBUG_UART_BOARD_INIT
  1526. imply DISTRO_DEFAULTS
  1527. imply FAT_WRITE
  1528. imply SARADC_ROCKCHIP
  1529. imply SPL_SYSRESET
  1530. imply SPL_SYS_MALLOC_SIMPLE
  1531. imply SYS_NS16550
  1532. imply TPL_SYSRESET
  1533. imply USB_FUNCTION_FASTBOOT
  1534. config TARGET_THUNDERX_88XX
  1535. bool "Support ThunderX 88xx"
  1536. select ARM64
  1537. select OF_CONTROL
  1538. select PL01X_SERIAL
  1539. select SYS_CACHE_SHIFT_7
  1540. config ARCH_ASPEED
  1541. bool "Support Aspeed SoCs"
  1542. select DM
  1543. select OF_CONTROL
  1544. imply CMD_DM
  1545. config TARGET_DURIAN
  1546. bool "Support Phytium Durian Platform"
  1547. select ARM64
  1548. help
  1549. Support for durian platform.
  1550. It has 2GB Sdram, uart and pcie.
  1551. config TARGET_PRESIDIO_ASIC
  1552. bool "Support Cortina Presidio ASIC Platform"
  1553. select ARM64
  1554. endchoice
  1555. config ARCH_SUPPORT_TFABOOT
  1556. bool
  1557. config TFABOOT
  1558. bool "Support for booting from TF-A"
  1559. depends on ARCH_SUPPORT_TFABOOT
  1560. default n
  1561. help
  1562. Enabling this will make a U-Boot binary that is capable of being
  1563. booted via TF-A (Trusted Firmware for Cortex-A).
  1564. config TI_SECURE_DEVICE
  1565. bool "HS Device Type Support"
  1566. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1567. help
  1568. If a high secure (HS) device type is being used, this config
  1569. must be set. This option impacts various aspects of the
  1570. build system (to create signed boot images that can be
  1571. authenticated) and the code. See the doc/README.ti-secure
  1572. file for further details.
  1573. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1574. config ISW_ENTRY_ADDR
  1575. hex "Address in memory or XIP address of bootloader entry point"
  1576. default 0x402F4000 if AM43XX
  1577. default 0x402F0400 if AM33XX
  1578. default 0x40301350 if OMAP54XX
  1579. help
  1580. After any reset, the boot ROM searches the boot media for a valid
  1581. boot image. For non-XIP devices, the ROM then copies the image into
  1582. internal memory. For all boot modes, after the ROM processes the
  1583. boot image it eventually computes the entry point address depending
  1584. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1585. image headers.
  1586. endif
  1587. source "arch/arm/mach-aspeed/Kconfig"
  1588. source "arch/arm/mach-at91/Kconfig"
  1589. source "arch/arm/mach-bcm283x/Kconfig"
  1590. source "arch/arm/mach-bcmstb/Kconfig"
  1591. source "arch/arm/mach-davinci/Kconfig"
  1592. source "arch/arm/mach-exynos/Kconfig"
  1593. source "arch/arm/mach-highbank/Kconfig"
  1594. source "arch/arm/mach-integrator/Kconfig"
  1595. source "arch/arm/mach-ipq40xx/Kconfig"
  1596. source "arch/arm/mach-k3/Kconfig"
  1597. source "arch/arm/mach-keystone/Kconfig"
  1598. source "arch/arm/mach-kirkwood/Kconfig"
  1599. source "arch/arm/mach-lpc32xx/Kconfig"
  1600. source "arch/arm/mach-mvebu/Kconfig"
  1601. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1602. source "arch/arm/mach-imx/mx2/Kconfig"
  1603. source "arch/arm/mach-imx/mx3/Kconfig"
  1604. source "arch/arm/mach-imx/mx5/Kconfig"
  1605. source "arch/arm/mach-imx/mx6/Kconfig"
  1606. source "arch/arm/mach-imx/mx7/Kconfig"
  1607. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1608. source "arch/arm/mach-imx/imx8/Kconfig"
  1609. source "arch/arm/mach-imx/imx8m/Kconfig"
  1610. source "arch/arm/mach-imx/imxrt/Kconfig"
  1611. source "arch/arm/mach-imx/mxs/Kconfig"
  1612. source "arch/arm/mach-omap2/Kconfig"
  1613. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1614. source "arch/arm/mach-orion5x/Kconfig"
  1615. source "arch/arm/mach-owl/Kconfig"
  1616. source "arch/arm/mach-rmobile/Kconfig"
  1617. source "arch/arm/mach-meson/Kconfig"
  1618. source "arch/arm/mach-mediatek/Kconfig"
  1619. source "arch/arm/mach-qemu/Kconfig"
  1620. source "arch/arm/mach-rockchip/Kconfig"
  1621. source "arch/arm/mach-s5pc1xx/Kconfig"
  1622. source "arch/arm/mach-snapdragon/Kconfig"
  1623. source "arch/arm/mach-socfpga/Kconfig"
  1624. source "arch/arm/mach-sti/Kconfig"
  1625. source "arch/arm/mach-stm32/Kconfig"
  1626. source "arch/arm/mach-stm32mp/Kconfig"
  1627. source "arch/arm/mach-sunxi/Kconfig"
  1628. source "arch/arm/mach-tegra/Kconfig"
  1629. source "arch/arm/mach-u8500/Kconfig"
  1630. source "arch/arm/mach-uniphier/Kconfig"
  1631. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1632. source "arch/arm/mach-zynq/Kconfig"
  1633. source "arch/arm/mach-zynqmp/Kconfig"
  1634. source "arch/arm/mach-versal/Kconfig"
  1635. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1636. source "arch/arm/cpu/armv7/Kconfig"
  1637. source "arch/arm/cpu/armv8/Kconfig"
  1638. source "arch/arm/mach-imx/Kconfig"
  1639. source "board/bosch/shc/Kconfig"
  1640. source "board/bosch/guardian/Kconfig"
  1641. source "board/CarMediaLab/flea3/Kconfig"
  1642. source "board/Marvell/aspenite/Kconfig"
  1643. source "board/Marvell/gplugd/Kconfig"
  1644. source "board/armadeus/apf27/Kconfig"
  1645. source "board/armltd/vexpress/Kconfig"
  1646. source "board/armltd/vexpress64/Kconfig"
  1647. source "board/cortina/presidio-asic/Kconfig"
  1648. source "board/broadcom/bcm23550_w1d/Kconfig"
  1649. source "board/broadcom/bcm28155_ap/Kconfig"
  1650. source "board/broadcom/bcm963158/Kconfig"
  1651. source "board/broadcom/bcm968360bg/Kconfig"
  1652. source "board/broadcom/bcm968580xref/Kconfig"
  1653. source "board/broadcom/bcmcygnus/Kconfig"
  1654. source "board/broadcom/bcmnsp/Kconfig"
  1655. source "board/broadcom/bcmns2/Kconfig"
  1656. source "board/cavium/thunderx/Kconfig"
  1657. source "board/cirrus/edb93xx/Kconfig"
  1658. source "board/eets/pdu001/Kconfig"
  1659. source "board/emulation/qemu-arm/Kconfig"
  1660. source "board/freescale/ls2080a/Kconfig"
  1661. source "board/freescale/ls2080aqds/Kconfig"
  1662. source "board/freescale/ls2080ardb/Kconfig"
  1663. source "board/freescale/ls1088a/Kconfig"
  1664. source "board/freescale/ls1028a/Kconfig"
  1665. source "board/freescale/ls1021aqds/Kconfig"
  1666. source "board/freescale/ls1043aqds/Kconfig"
  1667. source "board/freescale/ls1021atwr/Kconfig"
  1668. source "board/freescale/ls1021atsn/Kconfig"
  1669. source "board/freescale/ls1021aiot/Kconfig"
  1670. source "board/freescale/ls1046aqds/Kconfig"
  1671. source "board/freescale/ls1043ardb/Kconfig"
  1672. source "board/freescale/ls1046ardb/Kconfig"
  1673. source "board/freescale/ls1046afrwy/Kconfig"
  1674. source "board/freescale/ls1012aqds/Kconfig"
  1675. source "board/freescale/ls1012ardb/Kconfig"
  1676. source "board/freescale/ls1012afrdm/Kconfig"
  1677. source "board/freescale/lx2160a/Kconfig"
  1678. source "board/freescale/mx35pdk/Kconfig"
  1679. source "board/freescale/s32v234evb/Kconfig"
  1680. source "board/grinn/chiliboard/Kconfig"
  1681. source "board/hisilicon/hikey/Kconfig"
  1682. source "board/hisilicon/hikey960/Kconfig"
  1683. source "board/hisilicon/poplar/Kconfig"
  1684. source "board/isee/igep003x/Kconfig"
  1685. source "board/spear/spear300/Kconfig"
  1686. source "board/spear/spear310/Kconfig"
  1687. source "board/spear/spear320/Kconfig"
  1688. source "board/spear/spear600/Kconfig"
  1689. source "board/spear/x600/Kconfig"
  1690. source "board/st/stv0991/Kconfig"
  1691. source "board/tcl/sl50/Kconfig"
  1692. source "board/toradex/colibri_pxa270/Kconfig"
  1693. source "board/variscite/dart_6ul/Kconfig"
  1694. source "board/vscom/baltos/Kconfig"
  1695. source "board/xilinx/Kconfig"
  1696. source "board/xilinx/zynq/Kconfig"
  1697. source "board/xilinx/zynqmp/Kconfig"
  1698. source "board/phytium/durian/Kconfig"
  1699. source "arch/arm/Kconfig.debug"
  1700. endmenu
  1701. config SPL_LDSCRIPT
  1702. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1703. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1704. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64