s32v234evb.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2013-2015, Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <asm/io.h>
  7. #include <asm/arch/imx-regs.h>
  8. #include <asm/arch/siul.h>
  9. #include <asm/arch/lpddr2.h>
  10. #include <asm/arch/clock.h>
  11. #include <mmc.h>
  12. #include <fsl_esdhc_imx.h>
  13. #include <miiphy.h>
  14. #include <netdev.h>
  15. #include <i2c.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. void setup_iomux_ddr(void)
  18. {
  19. lpddr2_config_iomux(DDR0);
  20. lpddr2_config_iomux(DDR1);
  21. }
  22. void ddr_phy_init(void)
  23. {
  24. }
  25. void ddr_ctrl_init(void)
  26. {
  27. config_mmdc(0);
  28. config_mmdc(1);
  29. }
  30. int dram_init(void)
  31. {
  32. setup_iomux_ddr();
  33. ddr_ctrl_init();
  34. gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
  35. return 0;
  36. }
  37. static void setup_iomux_uart(void)
  38. {
  39. /* Muxing for linflex */
  40. /* Replace the magic values after bringup */
  41. /* set TXD - MSCR[12] PA12 */
  42. writel(SIUL2_UART_TXD, SIUL2_MSCRn(SIUL2_UART0_TXD_PAD));
  43. /* set RXD - MSCR[11] - PA11 */
  44. writel(SIUL2_UART_MSCR_RXD, SIUL2_MSCRn(SIUL2_UART0_MSCR_RXD_PAD));
  45. /* set RXD - IMCR[200] - 200 */
  46. writel(SIUL2_UART_IMCR_RXD, SIUL2_IMCRn(SIUL2_UART0_IMCR_RXD_PAD));
  47. }
  48. static void setup_iomux_enet(void)
  49. {
  50. }
  51. static void setup_iomux_i2c(void)
  52. {
  53. }
  54. #ifdef CONFIG_SYS_USE_NAND
  55. void setup_iomux_nfc(void)
  56. {
  57. }
  58. #endif
  59. #ifdef CONFIG_FSL_ESDHC_IMX
  60. struct fsl_esdhc_cfg esdhc_cfg[1] = {
  61. {USDHC_BASE_ADDR},
  62. };
  63. int board_mmc_getcd(struct mmc *mmc)
  64. {
  65. /* eSDHC1 is always present */
  66. return 1;
  67. }
  68. int board_mmc_init(bd_t * bis)
  69. {
  70. esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_USDHC_CLK);
  71. /* Set iomux PADS for USDHC */
  72. /* PK6 pad: uSDHC clk */
  73. writel(SIUL2_USDHC_PAD_CTRL_CLK, SIUL2_MSCRn(150));
  74. writel(0x3, SIUL2_MSCRn(902));
  75. /* PK7 pad: uSDHC CMD */
  76. writel(SIUL2_USDHC_PAD_CTRL_CMD, SIUL2_MSCRn(151));
  77. writel(0x3, SIUL2_MSCRn(901));
  78. /* PK8 pad: uSDHC DAT0 */
  79. writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(152));
  80. writel(0x3, SIUL2_MSCRn(903));
  81. /* PK9 pad: uSDHC DAT1 */
  82. writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(153));
  83. writel(0x3, SIUL2_MSCRn(904));
  84. /* PK10 pad: uSDHC DAT2 */
  85. writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(154));
  86. writel(0x3, SIUL2_MSCRn(905));
  87. /* PK11 pad: uSDHC DAT3 */
  88. writel(SIUL2_USDHC_PAD_CTRL_DAT0_3, SIUL2_MSCRn(155));
  89. writel(0x3, SIUL2_MSCRn(906));
  90. /* PK15 pad: uSDHC DAT4 */
  91. writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(159));
  92. writel(0x3, SIUL2_MSCRn(907));
  93. /* PL0 pad: uSDHC DAT5 */
  94. writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(160));
  95. writel(0x3, SIUL2_MSCRn(908));
  96. /* PL1 pad: uSDHC DAT6 */
  97. writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(161));
  98. writel(0x3, SIUL2_MSCRn(909));
  99. /* PL2 pad: uSDHC DAT7 */
  100. writel(SIUL2_USDHC_PAD_CTRL_DAT4_7, SIUL2_MSCRn(162));
  101. writel(0x3, SIUL2_MSCRn(910));
  102. return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
  103. }
  104. #endif
  105. static void mscm_init(void)
  106. {
  107. struct mscm_ir *mscmir = (struct mscm_ir *)MSCM_BASE_ADDR;
  108. int i;
  109. for (i = 0; i < MSCM_IRSPRC_NUM; i++)
  110. writew(MSCM_IRSPRC_CPn_EN, &mscmir->irsprc[i]);
  111. }
  112. int board_phy_config(struct phy_device *phydev)
  113. {
  114. if (phydev->drv->config)
  115. phydev->drv->config(phydev);
  116. return 0;
  117. }
  118. int board_early_init_f(void)
  119. {
  120. clock_init();
  121. mscm_init();
  122. setup_iomux_uart();
  123. setup_iomux_enet();
  124. setup_iomux_i2c();
  125. #ifdef CONFIG_SYS_USE_NAND
  126. setup_iomux_nfc();
  127. #endif
  128. return 0;
  129. }
  130. int board_init(void)
  131. {
  132. /* address of boot parameters */
  133. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  134. return 0;
  135. }
  136. int checkboard(void)
  137. {
  138. puts("Board: s32v234evb\n");
  139. return 0;
  140. }