sbc.c 1.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011-2015 Panasonic Corporation
  4. * Copyright (C) 2015-2017 Socionext Inc.
  5. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  6. */
  7. #include <linux/io.h>
  8. #include <asm/global_data.h>
  9. #include "../init.h"
  10. #include "sbc-regs.h"
  11. /* slower but LED works */
  12. #define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000
  13. #define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00
  14. #define SBCTRL2_SAVEPIN_PERI_VALUE 0x34000009
  15. #define SBCTRL4_SAVEPIN_PERI_VALUE 0x02110110
  16. /* faster but LED does not work */
  17. #define SBCTRL0_SAVEPIN_MEM_VALUE 0x55450000
  18. #define SBCTRL1_SAVEPIN_MEM_VALUE 0x06057700
  19. #define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009
  20. #define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210
  21. int uniphier_sbc_is_enabled(void)
  22. {
  23. DECLARE_GLOBAL_DATA_PTR;
  24. const void *fdt = gd->fdt_blob;
  25. int offset;
  26. offset = fdt_node_offset_by_compatible(fdt, 0,
  27. "socionext,uniphier-system-bus");
  28. if (offset < 0)
  29. return 0;
  30. return fdtdec_get_is_enabled(fdt, offset);
  31. }
  32. void uniphier_sbc_init_savepin(void)
  33. {
  34. /*
  35. * Only CS1 is connected to support card.
  36. * BKSZ[1:0] should be set to "01".
  37. */
  38. writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
  39. writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
  40. writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
  41. writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
  42. if (uniphier_sbc_boot_is_swapped()) {
  43. /*
  44. * Boot Swap On: boot from external NOR/SRAM
  45. * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
  46. *
  47. * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
  48. * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
  49. */
  50. writel(0x0000bc01, SBBASE0);
  51. } else {
  52. /*
  53. * Boot Swap Off: boot from mask ROM
  54. * 0x40000000-0x41ffffff: mask ROM
  55. * 0x42000000-0x43efffff: memory bank (31MB)
  56. * 0x43f00000-0x43ffffff: peripherals (1MB)
  57. */
  58. writel(0x0000be01, SBBASE0); /* dummy */
  59. writel(0x0200be01, SBBASE1);
  60. }
  61. }