_ashrdi3.S 1.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * This code was copied from arch/powerpc/kernel/misc_32.S in the Linux
  4. * kernel sources (commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, also
  5. * known as 2.6.38-rc5). The source file copyrights are as follows:
  6. *
  7. * (C) Copyright 1995-1996 Gary Thomas (gdt@linuxppc.org)
  8. *
  9. * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
  10. * and Paul Mackerras.
  11. */
  12. #include <ppc_asm.tmpl>
  13. #include <ppc_defs.h>
  14. #include <config.h>
  15. /*
  16. * Extended precision shifts.
  17. *
  18. * Updated to be valid for shift counts from 0 to 63 inclusive.
  19. * -- Gabriel
  20. *
  21. * R3/R4 has 64 bit value
  22. * R5 has shift count
  23. * result in R3/R4
  24. *
  25. * ashrdi3: arithmetic right shift (sign propagation)
  26. * lshrdi3: logical right shift
  27. * ashldi3: left shift
  28. */
  29. .globl __ashrdi3
  30. __ashrdi3:
  31. subfic r6,r5,32
  32. srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
  33. addi r7,r5,32 # could be xori, or addi with -32
  34. slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
  35. rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
  36. sraw r7,r3,r7 # t2 = MSW >> (count-32)
  37. or r4,r4,r6 # LSW |= t1
  38. slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
  39. sraw r3,r3,r5 # MSW = MSW >> count
  40. or r4,r4,r7 # LSW |= t2
  41. blr