traps.c 6.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * linux/arch/powerpc/kernel/traps.c
  4. *
  5. * Copyright 2007 Freescale Semiconductor.
  6. * Copyright (C) 2003 Motorola
  7. * Modified by Xianghua Xiao(x.xiao@motorola.com)
  8. *
  9. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10. *
  11. * Modified by Cort Dougan (cort@cs.nmt.edu)
  12. * and Paul Mackerras (paulus@cs.anu.edu.au)
  13. *
  14. * (C) Copyright 2000
  15. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  16. */
  17. /*
  18. * This file handles the architecture-dependent parts of hardware exceptions
  19. */
  20. #include <common.h>
  21. #include <asm/ptrace.h>
  22. #include <command.h>
  23. #include <init.h>
  24. #include <irq_func.h>
  25. #include <kgdb.h>
  26. #include <asm/processor.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. /* Returns 0 if exception not found and fixup otherwise. */
  29. extern unsigned long search_exception_table(unsigned long);
  30. /*
  31. * End of addressable memory. This may be less than the actual
  32. * amount of memory on the system if we're unable to keep all
  33. * the memory mapped in.
  34. */
  35. #define END_OF_MEM (gd->ram_base + get_effective_memsize())
  36. static __inline__ void set_tsr(unsigned long val)
  37. {
  38. asm volatile("mtspr 0x150, %0" : : "r" (val));
  39. }
  40. static __inline__ unsigned long get_esr(void)
  41. {
  42. unsigned long val;
  43. asm volatile("mfspr %0, 0x03e" : "=r" (val) :);
  44. return val;
  45. }
  46. #define ESR_MCI 0x80000000
  47. #define ESR_PIL 0x08000000
  48. #define ESR_PPR 0x04000000
  49. #define ESR_PTR 0x02000000
  50. #define ESR_DST 0x00800000
  51. #define ESR_DIZ 0x00400000
  52. #define ESR_U0F 0x00008000
  53. #if defined(CONFIG_CMD_BEDBUG)
  54. extern void do_bedbug_breakpoint(struct pt_regs *);
  55. #endif
  56. /*
  57. * Trap & Exception support
  58. */
  59. static void print_backtrace(unsigned long *sp)
  60. {
  61. int cnt = 0;
  62. unsigned long i;
  63. printf("Call backtrace: ");
  64. while (sp) {
  65. if ((uint)sp > END_OF_MEM)
  66. break;
  67. i = sp[1];
  68. if (cnt++ % 7 == 0)
  69. printf("\n");
  70. printf("%08lX ", i);
  71. if (cnt > 32) break;
  72. sp = (unsigned long *)*sp;
  73. }
  74. printf("\n");
  75. }
  76. void show_regs(struct pt_regs *regs)
  77. {
  78. int i;
  79. printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
  80. regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
  81. printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
  82. regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
  83. regs->msr & MSR_FP ? 1 : 0,regs->msr&MSR_ME ? 1 : 0,
  84. regs->msr&MSR_IR ? 1 : 0,
  85. regs->msr&MSR_DR ? 1 : 0);
  86. printf("\n");
  87. for (i = 0; i < 32; i++) {
  88. if ((i % 8) == 0)
  89. {
  90. printf("GPR%02d: ", i);
  91. }
  92. printf("%08lX ", regs->gpr[i]);
  93. if ((i % 8) == 7)
  94. {
  95. printf("\n");
  96. }
  97. }
  98. }
  99. static void _exception(int signr, struct pt_regs *regs)
  100. {
  101. show_regs(regs);
  102. print_backtrace((unsigned long *)regs->gpr[1]);
  103. panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
  104. }
  105. void CritcalInputException(struct pt_regs *regs)
  106. {
  107. panic("Critical Input Exception");
  108. }
  109. int machinecheck_count = 0;
  110. int machinecheck_error = 0;
  111. void MachineCheckException(struct pt_regs *regs)
  112. {
  113. unsigned long fixup;
  114. unsigned int mcsr, mcsrr0, mcsrr1, mcar;
  115. /* Probing PCI using config cycles cause this exception
  116. * when a device is not present. Catch it and return to
  117. * the PCI exception handler.
  118. */
  119. if ((fixup = search_exception_table(regs->nip)) != 0) {
  120. regs->nip = fixup;
  121. return;
  122. }
  123. mcsrr0 = mfspr(SPRN_MCSRR0);
  124. mcsrr1 = mfspr(SPRN_MCSRR1);
  125. mcsr = mfspr(SPRN_MCSR);
  126. mcar = mfspr(SPRN_MCAR);
  127. machinecheck_count++;
  128. machinecheck_error=1;
  129. #if defined(CONFIG_CMD_KGDB)
  130. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  131. return;
  132. #endif
  133. printf("Machine check in kernel mode.\n");
  134. printf("Caused by (from mcsr): ");
  135. printf("mcsr = 0x%08x\n", mcsr);
  136. if (mcsr & 0x80000000)
  137. printf("Machine check input pin\n");
  138. if (mcsr & 0x40000000)
  139. printf("Instruction cache parity error\n");
  140. if (mcsr & 0x20000000)
  141. printf("Data cache push parity error\n");
  142. if (mcsr & 0x10000000)
  143. printf("Data cache parity error\n");
  144. if (mcsr & 0x00000080)
  145. printf("Bus instruction address error\n");
  146. if (mcsr & 0x00000040)
  147. printf("Bus Read address error\n");
  148. if (mcsr & 0x00000020)
  149. printf("Bus Write address error\n");
  150. if (mcsr & 0x00000010)
  151. printf("Bus Instruction data bus error\n");
  152. if (mcsr & 0x00000008)
  153. printf("Bus Read data bus error\n");
  154. if (mcsr & 0x00000004)
  155. printf("Bus Write bus error\n");
  156. if (mcsr & 0x00000002)
  157. printf("Bus Instruction parity error\n");
  158. if (mcsr & 0x00000001)
  159. printf("Bus Read parity error\n");
  160. show_regs(regs);
  161. printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
  162. mcsr, mcsrr0, mcsrr1, mcar);
  163. print_backtrace((unsigned long *)regs->gpr[1]);
  164. if (machinecheck_count > 10) {
  165. panic("machine check count too high\n");
  166. }
  167. if (machinecheck_count > 1) {
  168. regs->nip += 4; /* skip offending instruction */
  169. printf("Skipping current instr, Returning to 0x%08lx\n",
  170. regs->nip);
  171. } else {
  172. printf("Returning back to 0x%08lx\n",regs->nip);
  173. }
  174. }
  175. void AlignmentException(struct pt_regs *regs)
  176. {
  177. #if defined(CONFIG_CMD_KGDB)
  178. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  179. return;
  180. #endif
  181. show_regs(regs);
  182. print_backtrace((unsigned long *)regs->gpr[1]);
  183. panic("Alignment Exception");
  184. }
  185. void ProgramCheckException(struct pt_regs *regs)
  186. {
  187. long esr_val;
  188. #if defined(CONFIG_CMD_KGDB)
  189. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  190. return;
  191. #endif
  192. show_regs(regs);
  193. esr_val = get_esr();
  194. if( esr_val & ESR_PIL )
  195. printf( "** Illegal Instruction **\n" );
  196. else if( esr_val & ESR_PPR )
  197. printf( "** Privileged Instruction **\n" );
  198. else if( esr_val & ESR_PTR )
  199. printf( "** Trap Instruction **\n" );
  200. print_backtrace((unsigned long *)regs->gpr[1]);
  201. panic("Program Check Exception");
  202. }
  203. void PITException(struct pt_regs *regs)
  204. {
  205. /*
  206. * Reset PIT interrupt
  207. */
  208. set_tsr(0x0c000000);
  209. /*
  210. * Call timer_interrupt routine in interrupts.c
  211. */
  212. timer_interrupt(NULL);
  213. }
  214. void UnknownException(struct pt_regs *regs)
  215. {
  216. #if defined(CONFIG_CMD_KGDB)
  217. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  218. return;
  219. #endif
  220. printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
  221. regs->nip, regs->msr, regs->trap);
  222. _exception(0, regs);
  223. }
  224. void ExtIntException(struct pt_regs *regs)
  225. {
  226. volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC8xxx_PIC_ADDR);
  227. uint vect;
  228. #if defined(CONFIG_CMD_KGDB)
  229. if (debugger_exception_handler && (*debugger_exception_handler)(regs))
  230. return;
  231. #endif
  232. printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
  233. regs->nip, regs->msr, regs->trap);
  234. vect = pic->iack0;
  235. printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect);
  236. show_regs(regs);
  237. print_backtrace((unsigned long *)regs->gpr[1]);
  238. }
  239. void DebugException(struct pt_regs *regs)
  240. {
  241. printf("Debugger trap at @ %lx\n", regs->nip );
  242. show_regs(regs);
  243. #if defined(CONFIG_CMD_BEDBUG)
  244. do_bedbug_breakpoint( regs );
  245. #endif
  246. }