display5.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 DENX Software Engineering
  4. * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <fdt_support.h>
  9. #include <init.h>
  10. #include <log.h>
  11. #include <asm/io.h>
  12. #include <asm/arch/clock.h>
  13. #include <asm/arch/imx-regs.h>
  14. #include <asm/arch/iomux.h>
  15. #include <asm/arch/mx6-pins.h>
  16. #include <asm/arch/mx6-ddr.h>
  17. #include <asm/arch/sys_proto.h>
  18. #include <env.h>
  19. #include <errno.h>
  20. #include <asm/gpio.h>
  21. #include <malloc.h>
  22. #include <asm/mach-imx/iomux-v3.h>
  23. #include <asm/mach-imx/boot_mode.h>
  24. #include <miiphy.h>
  25. #include <netdev.h>
  26. #include <i2c.h>
  27. #include <linux/delay.h>
  28. #include <dm/platform_data/serial_mxc.h>
  29. #include <dm/platdata.h>
  30. #include "common.h"
  31. DECLARE_GLOBAL_DATA_PTR;
  32. static bool hw_ids_valid;
  33. static bool sw_ids_valid;
  34. static u32 cpu_id;
  35. static u32 unit_id;
  36. const char *gpio_table_sw_names[] = {
  37. "GPIO2_4", "GPIO2_5", "GPIO2_6", "GPIO2_7"
  38. };
  39. const char *gpio_table_sw_ids_names[] = {
  40. "sw0", "sw1", "sw2", "sw3"
  41. };
  42. const char *gpio_table_hw_names[] = {
  43. "GPIO6_7", "GPIO6_9", "GPIO6_10", "GPIO6_11",
  44. "GPIO4_7", "GPIO4_11", "GPIO4_13", "GPIO4_15"
  45. };
  46. const char *gpio_table_hw_ids_names[] = {
  47. "hw0", "hw1", "hw2", "hw3", "hw4", "hw5", "hw6", "hw7"
  48. };
  49. static int get_board_id(const char **pin_names, const char **ids_names,
  50. int size, bool *valid, u32 *id)
  51. {
  52. struct gpio_desc desc;
  53. int i, ret, val;
  54. *valid = false;
  55. for (i = 0; i < size; i++) {
  56. memset(&desc, 0, sizeof(desc));
  57. ret = dm_gpio_lookup_name(pin_names[i], &desc);
  58. if (ret) {
  59. printf("Can't lookup request SWx gpios\n");
  60. return ret;
  61. }
  62. ret = dm_gpio_request(&desc, ids_names[i]);
  63. if (ret) {
  64. printf("Can't lookup request SWx gpios\n");
  65. return ret;
  66. }
  67. dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN);
  68. val = dm_gpio_get_value(&desc);
  69. if (val < 0) {
  70. printf("Can't get SW%d ID\n", i);
  71. *id = 0;
  72. return val;
  73. }
  74. *id |= val << i;
  75. }
  76. *valid = true;
  77. return 0;
  78. }
  79. int dram_init(void)
  80. {
  81. gd->ram_size = imx_ddr_size();
  82. return 0;
  83. }
  84. iomux_v3_cfg_t const misc_pads[] = {
  85. /* Prod ID GPIO pins */
  86. MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
  87. MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL),
  88. MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL),
  89. MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
  90. /* HW revision GPIO pins */
  91. MX6_PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
  92. MX6_PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL),
  93. MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
  94. MX6_PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
  95. MX6_PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL),
  96. MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
  97. MX6_PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
  98. MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL),
  99. /* XTALOSC */
  100. MX6_PAD_GPIO_3__XTALOSC_REF_CLK_24M | MUX_PAD_CTRL(NO_PAD_CTRL),
  101. /* Emergency recovery pin */
  102. MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
  103. };
  104. /*
  105. * Do not overwrite the console
  106. * Always use serial for U-Boot console
  107. */
  108. int overwrite_console(void)
  109. {
  110. return 1;
  111. }
  112. #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  113. int ft_board_setup(void *blob, struct bd_info *bd)
  114. {
  115. fdt_fixup_ethernet(blob);
  116. return 0;
  117. }
  118. #endif
  119. int board_phy_config(struct phy_device *phydev)
  120. {
  121. /* display5 due to PCB routing can only work with 100 Mbps */
  122. phydev->advertising &= ~(ADVERTISED_1000baseX_Half |
  123. ADVERTISED_1000baseX_Full |
  124. SUPPORTED_1000baseT_Half |
  125. SUPPORTED_1000baseT_Full);
  126. if (phydev->drv->config)
  127. return phydev->drv->config(phydev);
  128. return 0;
  129. }
  130. int board_init(void)
  131. {
  132. struct gpio_desc phy_int_gbe, spi2_wp;
  133. int ret;
  134. debug("board init\n");
  135. /* address of boot parameters */
  136. gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
  137. /* Setup misc (application specific) stuff */
  138. SETUP_IOMUX_PADS(misc_pads);
  139. get_board_id(gpio_table_sw_names, &gpio_table_sw_ids_names[0],
  140. ARRAY_SIZE(gpio_table_sw_names), &sw_ids_valid, &unit_id);
  141. debug("SWx unit_id 0x%x\n", unit_id);
  142. get_board_id(gpio_table_hw_names, &gpio_table_hw_ids_names[0],
  143. ARRAY_SIZE(gpio_table_hw_names), &hw_ids_valid, &cpu_id);
  144. debug("HWx cpu_id 0x%x\n", cpu_id);
  145. if (hw_ids_valid && sw_ids_valid)
  146. printf("ID: unit type 0x%x rev 0x%x\n", unit_id, cpu_id);
  147. udelay(25);
  148. /* Setup low level FEC (ETH) */
  149. ret = dm_gpio_lookup_name("GPIO1_28", &phy_int_gbe);
  150. if (ret) {
  151. printf("Cannot get GPIO1_28\n");
  152. } else {
  153. ret = dm_gpio_request(&phy_int_gbe, "INT_GBE");
  154. if (!ret)
  155. dm_gpio_set_dir_flags(&phy_int_gbe, GPIOD_IS_IN);
  156. }
  157. iomuxc_set_rgmii_io_voltage(DDR_SEL_1P5V_IO);
  158. enable_fec_anatop_clock(0, ENET_125MHZ);
  159. /* Setup #WP for SPI-NOR memory */
  160. ret = dm_gpio_lookup_name("GPIO7_0", &spi2_wp);
  161. if (ret) {
  162. printf("Cannot get GPIO7_0\n");
  163. } else {
  164. ret = dm_gpio_request(&spi2_wp, "spi2_#wp");
  165. if (!ret)
  166. dm_gpio_set_dir_flags(&spi2_wp, GPIOD_IS_OUT |
  167. GPIOD_IS_OUT_ACTIVE);
  168. }
  169. return 0;
  170. }
  171. #ifdef CONFIG_CMD_BMODE
  172. static const struct boot_mode board_boot_modes[] = {
  173. /* eMMC, USDHC-4, 8-bit bus width */
  174. /* SPI-NOR, ECSPI-2 SS0, 3-bytes addressing */
  175. {"emmc", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)},
  176. {"spinor", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x09)},
  177. {NULL, 0},
  178. };
  179. static void setup_boot_modes(void)
  180. {
  181. add_board_boot_modes(board_boot_modes);
  182. }
  183. #else
  184. static inline void setup_boot_modes(void) {}
  185. #endif
  186. int misc_init_r(void)
  187. {
  188. struct gpio_desc em_pad;
  189. int ret;
  190. setup_boot_modes();
  191. ret = dm_gpio_lookup_name("GPIO3_29", &em_pad);
  192. if (ret) {
  193. printf("Can't find emergency PAD gpio\n");
  194. return ret;
  195. }
  196. ret = dm_gpio_request(&em_pad, "Emergency_PAD");
  197. if (ret) {
  198. printf("Can't request emergency PAD gpio\n");
  199. return ret;
  200. }
  201. dm_gpio_set_dir_flags(&em_pad, GPIOD_IS_IN);
  202. return 0;
  203. }