stm32mp1.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <adc.h>
  7. #include <bootm.h>
  8. #include <clk.h>
  9. #include <config.h>
  10. #include <dm.h>
  11. #include <env.h>
  12. #include <env_internal.h>
  13. #include <g_dnl.h>
  14. #include <generic-phy.h>
  15. #include <hang.h>
  16. #include <i2c.h>
  17. #include <init.h>
  18. #include <led.h>
  19. #include <memalign.h>
  20. #include <misc.h>
  21. #include <mtd.h>
  22. #include <mtd_node.h>
  23. #include <netdev.h>
  24. #include <phy.h>
  25. #include <remoteproc.h>
  26. #include <reset.h>
  27. #include <syscon.h>
  28. #include <usb.h>
  29. #include <watchdog.h>
  30. #include <asm/io.h>
  31. #include <asm/gpio.h>
  32. #include <asm/arch/stm32.h>
  33. #include <asm/arch/sys_proto.h>
  34. #include <jffs2/load_kernel.h>
  35. #include <power/regulator.h>
  36. #include <usb/dwc2_udc.h>
  37. /* SYSCFG registers */
  38. #define SYSCFG_BOOTR 0x00
  39. #define SYSCFG_PMCSETR 0x04
  40. #define SYSCFG_IOCTRLSETR 0x18
  41. #define SYSCFG_ICNR 0x1C
  42. #define SYSCFG_CMPCR 0x20
  43. #define SYSCFG_CMPENSETR 0x24
  44. #define SYSCFG_PMCCLRR 0x44
  45. #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
  46. #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
  47. #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
  48. #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
  49. #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
  50. #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
  51. #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
  52. #define SYSCFG_CMPCR_SW_CTRL BIT(1)
  53. #define SYSCFG_CMPCR_READY BIT(8)
  54. #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
  55. #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
  56. #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
  57. #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
  58. #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
  59. #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
  60. #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
  61. #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
  62. /*
  63. * Get a global data pointer
  64. */
  65. DECLARE_GLOBAL_DATA_PTR;
  66. #define USB_LOW_THRESHOLD_UV 200000
  67. #define USB_WARNING_LOW_THRESHOLD_UV 660000
  68. #define USB_START_LOW_THRESHOLD_UV 1230000
  69. #define USB_START_HIGH_THRESHOLD_UV 2150000
  70. int checkboard(void)
  71. {
  72. int ret;
  73. char *mode;
  74. u32 otp;
  75. struct udevice *dev;
  76. const char *fdt_compat;
  77. int fdt_compat_len;
  78. if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
  79. mode = "trusted with OP-TEE";
  80. else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
  81. mode = "trusted";
  82. else
  83. mode = "basic";
  84. printf("Board: stm32mp1 in %s mode", mode);
  85. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  86. &fdt_compat_len);
  87. if (fdt_compat && fdt_compat_len)
  88. printf(" (%s)", fdt_compat);
  89. puts("\n");
  90. ret = uclass_get_device_by_driver(UCLASS_MISC,
  91. DM_GET_DRIVER(stm32mp_bsec),
  92. &dev);
  93. if (!ret)
  94. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  95. &otp, sizeof(otp));
  96. if (ret > 0 && otp) {
  97. printf("Board: MB%04x Var%d Rev.%c-%02d\n",
  98. otp >> 16,
  99. (otp >> 12) & 0xF,
  100. ((otp >> 8) & 0xF) - 1 + 'A',
  101. otp & 0xF);
  102. }
  103. return 0;
  104. }
  105. static void board_key_check(void)
  106. {
  107. #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
  108. ofnode node;
  109. struct gpio_desc gpio;
  110. enum forced_boot_mode boot_mode = BOOT_NORMAL;
  111. node = ofnode_path("/config");
  112. if (!ofnode_valid(node)) {
  113. debug("%s: no /config node?\n", __func__);
  114. return;
  115. }
  116. #ifdef CONFIG_FASTBOOT
  117. if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
  118. &gpio, GPIOD_IS_IN)) {
  119. debug("%s: could not find a /config/st,fastboot-gpios\n",
  120. __func__);
  121. } else {
  122. if (dm_gpio_get_value(&gpio)) {
  123. puts("Fastboot key pressed, ");
  124. boot_mode = BOOT_FASTBOOT;
  125. }
  126. dm_gpio_free(NULL, &gpio);
  127. }
  128. #endif
  129. #ifdef CONFIG_CMD_STM32PROG
  130. if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
  131. &gpio, GPIOD_IS_IN)) {
  132. debug("%s: could not find a /config/st,stm32prog-gpios\n",
  133. __func__);
  134. } else {
  135. if (dm_gpio_get_value(&gpio)) {
  136. puts("STM32Programmer key pressed, ");
  137. boot_mode = BOOT_STM32PROG;
  138. }
  139. dm_gpio_free(NULL, &gpio);
  140. }
  141. #endif
  142. if (boot_mode != BOOT_NORMAL) {
  143. puts("entering download mode...\n");
  144. clrsetbits_le32(TAMP_BOOT_CONTEXT,
  145. TAMP_BOOT_FORCED_MASK,
  146. boot_mode);
  147. }
  148. #endif
  149. }
  150. #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
  151. /* STMicroelectronics STUSB1600 Type-C controller */
  152. #define STUSB1600_CC_CONNECTION_STATUS 0x0E
  153. /* STUSB1600_CC_CONNECTION_STATUS bitfields */
  154. #define STUSB1600_CC_ATTACH BIT(0)
  155. static int stusb1600_init(struct udevice **dev_stusb1600)
  156. {
  157. ofnode node;
  158. struct udevice *dev, *bus;
  159. int ret;
  160. u32 chip_addr;
  161. *dev_stusb1600 = NULL;
  162. /* if node stusb1600 is present, means DK1 or DK2 board */
  163. node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
  164. if (!ofnode_valid(node))
  165. return -ENODEV;
  166. ret = ofnode_read_u32(node, "reg", &chip_addr);
  167. if (ret)
  168. return -EINVAL;
  169. ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
  170. &bus);
  171. if (ret) {
  172. printf("bus for stusb1600 not found\n");
  173. return -ENODEV;
  174. }
  175. ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
  176. if (!ret)
  177. *dev_stusb1600 = dev;
  178. return ret;
  179. }
  180. static int stusb1600_cable_connected(struct udevice *dev)
  181. {
  182. u8 status;
  183. if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
  184. return 0;
  185. return status & STUSB1600_CC_ATTACH;
  186. }
  187. #include <usb/dwc2_udc.h>
  188. int g_dnl_board_usb_cable_connected(void)
  189. {
  190. struct udevice *stusb1600;
  191. struct udevice *dwc2_udc_otg;
  192. int ret;
  193. if (!stusb1600_init(&stusb1600))
  194. return stusb1600_cable_connected(stusb1600);
  195. ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
  196. DM_GET_DRIVER(dwc2_udc_otg),
  197. &dwc2_udc_otg);
  198. if (!ret)
  199. debug("dwc2_udc_otg init failed\n");
  200. return dwc2_udc_B_session_valid(dwc2_udc_otg);
  201. }
  202. #define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
  203. #define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
  204. int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
  205. {
  206. if (!strcmp(name, "usb_dnl_dfu"))
  207. put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
  208. else if (!strcmp(name, "usb_dnl_fastboot"))
  209. put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
  210. &dev->idProduct);
  211. else
  212. put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
  213. return 0;
  214. }
  215. #endif /* CONFIG_USB_GADGET */
  216. #ifdef CONFIG_LED
  217. static int get_led(struct udevice **dev, char *led_string)
  218. {
  219. char *led_name;
  220. int ret;
  221. led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
  222. if (!led_name) {
  223. pr_debug("%s: could not find %s config string\n",
  224. __func__, led_string);
  225. return -ENOENT;
  226. }
  227. ret = led_get_by_label(led_name, dev);
  228. if (ret) {
  229. debug("%s: get=%d\n", __func__, ret);
  230. return ret;
  231. }
  232. return 0;
  233. }
  234. static int setup_led(enum led_state_t cmd)
  235. {
  236. struct udevice *dev;
  237. int ret;
  238. ret = get_led(&dev, "u-boot,boot-led");
  239. if (ret)
  240. return ret;
  241. ret = led_set_state(dev, cmd);
  242. return ret;
  243. }
  244. #endif
  245. static void __maybe_unused led_error_blink(u32 nb_blink)
  246. {
  247. #ifdef CONFIG_LED
  248. int ret;
  249. struct udevice *led;
  250. u32 i;
  251. #endif
  252. if (!nb_blink)
  253. return;
  254. #ifdef CONFIG_LED
  255. ret = get_led(&led, "u-boot,error-led");
  256. if (!ret) {
  257. /* make u-boot,error-led blinking */
  258. /* if U32_MAX and 125ms interval, for 17.02 years */
  259. for (i = 0; i < 2 * nb_blink; i++) {
  260. led_set_state(led, LEDST_TOGGLE);
  261. mdelay(125);
  262. WATCHDOG_RESET();
  263. }
  264. }
  265. #endif
  266. /* infinite: the boot process must be stopped */
  267. if (nb_blink == U32_MAX)
  268. hang();
  269. }
  270. #ifdef CONFIG_ADC
  271. static int board_check_usb_power(void)
  272. {
  273. struct ofnode_phandle_args adc_args;
  274. struct udevice *adc;
  275. ofnode node;
  276. unsigned int raw;
  277. int max_uV = 0;
  278. int min_uV = USB_START_HIGH_THRESHOLD_UV;
  279. int ret, uV, adc_count;
  280. u32 nb_blink;
  281. u8 i;
  282. node = ofnode_path("/config");
  283. if (!ofnode_valid(node)) {
  284. debug("%s: no /config node?\n", __func__);
  285. return -ENOENT;
  286. }
  287. /*
  288. * Retrieve the ADC channels devices and get measurement
  289. * for each of them
  290. */
  291. adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
  292. "#io-channel-cells");
  293. if (adc_count < 0) {
  294. if (adc_count == -ENOENT)
  295. return 0;
  296. pr_err("%s: can't find adc channel (%d)\n", __func__,
  297. adc_count);
  298. return adc_count;
  299. }
  300. for (i = 0; i < adc_count; i++) {
  301. if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
  302. "#io-channel-cells", 0, i,
  303. &adc_args)) {
  304. pr_debug("%s: can't find /config/st,adc_usb_pd\n",
  305. __func__);
  306. return 0;
  307. }
  308. ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
  309. &adc);
  310. if (ret) {
  311. pr_err("%s: Can't get adc device(%d)\n", __func__,
  312. ret);
  313. return ret;
  314. }
  315. ret = adc_channel_single_shot(adc->name, adc_args.args[0],
  316. &raw);
  317. if (ret) {
  318. pr_err("%s: single shot failed for %s[%d]!\n",
  319. __func__, adc->name, adc_args.args[0]);
  320. return ret;
  321. }
  322. /* Convert to uV */
  323. if (!adc_raw_to_uV(adc, raw, &uV)) {
  324. if (uV > max_uV)
  325. max_uV = uV;
  326. if (uV < min_uV)
  327. min_uV = uV;
  328. pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
  329. adc->name, adc_args.args[0], raw, uV);
  330. } else {
  331. pr_err("%s: Can't get uV value for %s[%d]\n",
  332. __func__, adc->name, adc_args.args[0]);
  333. }
  334. }
  335. /*
  336. * If highest value is inside 1.23 Volts and 2.10 Volts, that means
  337. * board is plugged on an USB-C 3A power supply and boot process can
  338. * continue.
  339. */
  340. if (max_uV > USB_START_LOW_THRESHOLD_UV &&
  341. max_uV <= USB_START_HIGH_THRESHOLD_UV &&
  342. min_uV <= USB_LOW_THRESHOLD_UV)
  343. return 0;
  344. pr_err("****************************************************\n");
  345. /*
  346. * If highest and lowest value are either both below
  347. * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
  348. * means USB TYPE-C is in unattached mode, this is an issue, make
  349. * u-boot,error-led blinking and stop boot process.
  350. */
  351. if ((max_uV > USB_LOW_THRESHOLD_UV &&
  352. min_uV > USB_LOW_THRESHOLD_UV) ||
  353. (max_uV <= USB_LOW_THRESHOLD_UV &&
  354. min_uV <= USB_LOW_THRESHOLD_UV)) {
  355. pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
  356. pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
  357. /* with 125ms interval, led will blink for 17.02 years ....*/
  358. nb_blink = U32_MAX;
  359. }
  360. if (max_uV > USB_LOW_THRESHOLD_UV &&
  361. max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
  362. min_uV <= USB_LOW_THRESHOLD_UV) {
  363. pr_err("* WARNING 500mA power supply detected *\n");
  364. nb_blink = 2;
  365. }
  366. if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
  367. max_uV <= USB_START_LOW_THRESHOLD_UV &&
  368. min_uV <= USB_LOW_THRESHOLD_UV) {
  369. pr_err("* WARNING 1.5mA power supply detected *\n");
  370. nb_blink = 3;
  371. }
  372. /*
  373. * If highest value is above 2.15 Volts that means that the USB TypeC
  374. * supplies more than 3 Amp, this is not compliant with TypeC specification
  375. */
  376. if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
  377. pr_err("* USB TYPE-C charger not compliant with *\n");
  378. pr_err("* specification *\n");
  379. pr_err("****************************************************\n\n");
  380. /* with 125ms interval, led will blink for 17.02 years ....*/
  381. nb_blink = U32_MAX;
  382. } else {
  383. pr_err("* Current too low, use a 3A power supply! *\n");
  384. pr_err("****************************************************\n\n");
  385. }
  386. led_error_blink(nb_blink);
  387. return 0;
  388. }
  389. #endif /* CONFIG_ADC */
  390. static void sysconf_init(void)
  391. {
  392. #ifndef CONFIG_STM32MP1_TRUSTED
  393. u8 *syscfg;
  394. #ifdef CONFIG_DM_REGULATOR
  395. struct udevice *pwr_dev;
  396. struct udevice *pwr_reg;
  397. struct udevice *dev;
  398. int ret;
  399. u32 otp = 0;
  400. #endif
  401. u32 bootr;
  402. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  403. /* interconnect update : select master using the port 1 */
  404. /* LTDC = AXI_M9 */
  405. /* GPU = AXI_M8 */
  406. /* today information is hardcoded in U-Boot */
  407. writel(BIT(9), syscfg + SYSCFG_ICNR);
  408. /* disable Pull-Down for boot pin connected to VDD */
  409. bootr = readl(syscfg + SYSCFG_BOOTR);
  410. bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
  411. bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
  412. writel(bootr, syscfg + SYSCFG_BOOTR);
  413. #ifdef CONFIG_DM_REGULATOR
  414. /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
  415. * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
  416. * The customer will have to disable this for low frequencies
  417. * or if AFMUX is selected but the function not used, typically for
  418. * TRACE. Otherwise, impact on power consumption.
  419. *
  420. * WARNING:
  421. * enabling High Speed mode while VDD>2.7V
  422. * with the OTP product_below_2v5 (OTP 18, BIT 13)
  423. * erroneously set to 1 can damage the IC!
  424. * => U-Boot set the register only if VDD < 2.7V (in DT)
  425. * but this value need to be consistent with board design
  426. */
  427. ret = uclass_get_device_by_driver(UCLASS_PMIC,
  428. DM_GET_DRIVER(stm32mp_pwr_pmic),
  429. &pwr_dev);
  430. if (!ret) {
  431. ret = uclass_get_device_by_driver(UCLASS_MISC,
  432. DM_GET_DRIVER(stm32mp_bsec),
  433. &dev);
  434. if (ret) {
  435. pr_err("Can't find stm32mp_bsec driver\n");
  436. return;
  437. }
  438. ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
  439. if (ret > 0)
  440. otp = otp & BIT(13);
  441. /* get VDD = vdd-supply */
  442. ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
  443. &pwr_reg);
  444. /* check if VDD is Low Voltage */
  445. if (!ret) {
  446. if (regulator_get_value(pwr_reg) < 2700000) {
  447. writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
  448. SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
  449. SYSCFG_IOCTRLSETR_HSLVEN_ETH |
  450. SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
  451. SYSCFG_IOCTRLSETR_HSLVEN_SPI,
  452. syscfg + SYSCFG_IOCTRLSETR);
  453. if (!otp)
  454. pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
  455. } else {
  456. if (otp)
  457. pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
  458. }
  459. } else {
  460. debug("VDD unknown");
  461. }
  462. }
  463. #endif
  464. /* activate automatic I/O compensation
  465. * warning: need to ensure CSI enabled and ready in clock driver
  466. */
  467. writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
  468. while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
  469. ;
  470. clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
  471. #endif
  472. }
  473. #ifdef CONFIG_DM_REGULATOR
  474. /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
  475. static int dk2_i2c1_fix(void)
  476. {
  477. ofnode node;
  478. struct gpio_desc hdmi, audio;
  479. int ret = 0;
  480. node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
  481. if (!ofnode_valid(node)) {
  482. pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
  483. return -ENOENT;
  484. }
  485. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  486. &hdmi, GPIOD_IS_OUT)) {
  487. pr_debug("%s: could not find reset-gpios\n",
  488. __func__);
  489. return -ENOENT;
  490. }
  491. node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
  492. if (!ofnode_valid(node)) {
  493. pr_debug("%s: no cs42l51@4a ?\n", __func__);
  494. return -ENOENT;
  495. }
  496. if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
  497. &audio, GPIOD_IS_OUT)) {
  498. pr_debug("%s: could not find reset-gpios\n",
  499. __func__);
  500. return -ENOENT;
  501. }
  502. /* before power up, insure that HDMI and AUDIO IC is under reset */
  503. ret = dm_gpio_set_value(&hdmi, 1);
  504. if (ret) {
  505. pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
  506. goto error;
  507. }
  508. ret = dm_gpio_set_value(&audio, 1);
  509. if (ret) {
  510. pr_err("%s: can't set_value for audio_nrst gpio", __func__);
  511. goto error;
  512. }
  513. /* power-up audio IC */
  514. regulator_autoset_by_name("v1v8_audio", NULL);
  515. /* power-up HDMI IC */
  516. regulator_autoset_by_name("v1v2_hdmi", NULL);
  517. regulator_autoset_by_name("v3v3_hdmi", NULL);
  518. error:
  519. return ret;
  520. }
  521. static bool board_is_dk2(void)
  522. {
  523. if (CONFIG_IS_ENABLED(TARGET_STM32MP157C_DK2) &&
  524. of_machine_is_compatible("st,stm32mp157c-dk2"))
  525. return true;
  526. return false;
  527. }
  528. #endif
  529. /* board dependent setup after realloc */
  530. int board_init(void)
  531. {
  532. struct udevice *dev;
  533. /* address of boot parameters */
  534. gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
  535. /* probe all PINCTRL for hog */
  536. for (uclass_first_device(UCLASS_PINCTRL, &dev);
  537. dev;
  538. uclass_next_device(&dev)) {
  539. pr_debug("probe pincontrol = %s\n", dev->name);
  540. }
  541. board_key_check();
  542. #ifdef CONFIG_DM_REGULATOR
  543. if (board_is_dk2())
  544. dk2_i2c1_fix();
  545. regulators_enable_boot_on(_DEBUG);
  546. #endif
  547. sysconf_init();
  548. if (CONFIG_IS_ENABLED(CONFIG_LED))
  549. led_default_state();
  550. return 0;
  551. }
  552. int board_late_init(void)
  553. {
  554. char *boot_device;
  555. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  556. const void *fdt_compat;
  557. int fdt_compat_len;
  558. int ret;
  559. u32 otp;
  560. struct udevice *dev;
  561. char buf[10];
  562. fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
  563. &fdt_compat_len);
  564. if (fdt_compat && fdt_compat_len) {
  565. if (strncmp(fdt_compat, "st,", 3) != 0)
  566. env_set("board_name", fdt_compat);
  567. else
  568. env_set("board_name", fdt_compat + 3);
  569. }
  570. ret = uclass_get_device_by_driver(UCLASS_MISC,
  571. DM_GET_DRIVER(stm32mp_bsec),
  572. &dev);
  573. if (!ret)
  574. ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
  575. &otp, sizeof(otp));
  576. if (!ret && otp) {
  577. snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
  578. env_set("board_id", buf);
  579. snprintf(buf, sizeof(buf), "0x%04x",
  580. ((otp >> 8) & 0xF) - 1 + 0xA);
  581. env_set("board_rev", buf);
  582. }
  583. #endif
  584. #ifdef CONFIG_ADC
  585. /* for DK1/DK2 boards */
  586. board_check_usb_power();
  587. #endif /* CONFIG_ADC */
  588. /* Check the boot-source to disable bootdelay */
  589. boot_device = env_get("boot_device");
  590. if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
  591. env_set("bootdelay", "0");
  592. return 0;
  593. }
  594. void board_quiesce_devices(void)
  595. {
  596. #ifdef CONFIG_LED
  597. setup_led(LEDST_OFF);
  598. #endif
  599. }
  600. /* eth init function : weak called in eqos driver */
  601. int board_interface_eth_init(struct udevice *dev,
  602. phy_interface_t interface_type)
  603. {
  604. u8 *syscfg;
  605. u32 value;
  606. bool eth_clk_sel_reg = false;
  607. bool eth_ref_clk_sel_reg = false;
  608. /* Gigabit Ethernet 125MHz clock selection. */
  609. eth_clk_sel_reg = dev_read_bool(dev, "st,eth_clk_sel");
  610. /* Ethernet 50Mhz RMII clock selection */
  611. eth_ref_clk_sel_reg =
  612. dev_read_bool(dev, "st,eth_ref_clk_sel");
  613. syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  614. if (!syscfg)
  615. return -ENODEV;
  616. switch (interface_type) {
  617. case PHY_INTERFACE_MODE_MII:
  618. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  619. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  620. debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
  621. break;
  622. case PHY_INTERFACE_MODE_GMII:
  623. if (eth_clk_sel_reg)
  624. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
  625. SYSCFG_PMCSETR_ETH_CLK_SEL;
  626. else
  627. value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
  628. debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
  629. break;
  630. case PHY_INTERFACE_MODE_RMII:
  631. if (eth_ref_clk_sel_reg)
  632. value = SYSCFG_PMCSETR_ETH_SEL_RMII |
  633. SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
  634. else
  635. value = SYSCFG_PMCSETR_ETH_SEL_RMII;
  636. debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
  637. break;
  638. case PHY_INTERFACE_MODE_RGMII:
  639. case PHY_INTERFACE_MODE_RGMII_ID:
  640. case PHY_INTERFACE_MODE_RGMII_RXID:
  641. case PHY_INTERFACE_MODE_RGMII_TXID:
  642. if (eth_clk_sel_reg)
  643. value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
  644. SYSCFG_PMCSETR_ETH_CLK_SEL;
  645. else
  646. value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
  647. debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
  648. break;
  649. default:
  650. debug("%s: Do not manage %d interface\n",
  651. __func__, interface_type);
  652. /* Do not manage others interfaces */
  653. return -EINVAL;
  654. }
  655. /* clear and set ETH configuration bits */
  656. writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
  657. SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
  658. syscfg + SYSCFG_PMCCLRR);
  659. writel(value, syscfg + SYSCFG_PMCSETR);
  660. return 0;
  661. }
  662. enum env_location env_get_location(enum env_operation op, int prio)
  663. {
  664. u32 bootmode = get_bootmode();
  665. if (prio)
  666. return ENVL_UNKNOWN;
  667. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  668. #ifdef CONFIG_ENV_IS_IN_EXT4
  669. case BOOT_FLASH_SD:
  670. case BOOT_FLASH_EMMC:
  671. return ENVL_EXT4;
  672. #endif
  673. #ifdef CONFIG_ENV_IS_IN_UBI
  674. case BOOT_FLASH_NAND:
  675. return ENVL_UBI;
  676. #endif
  677. #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
  678. case BOOT_FLASH_NOR:
  679. return ENVL_SPI_FLASH;
  680. #endif
  681. default:
  682. return ENVL_NOWHERE;
  683. }
  684. }
  685. #if defined(CONFIG_ENV_IS_IN_EXT4)
  686. const char *env_ext4_get_intf(void)
  687. {
  688. u32 bootmode = get_bootmode();
  689. switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
  690. case BOOT_FLASH_SD:
  691. case BOOT_FLASH_EMMC:
  692. return "mmc";
  693. default:
  694. return "";
  695. }
  696. }
  697. const char *env_ext4_get_dev_part(void)
  698. {
  699. static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
  700. u32 bootmode = get_bootmode();
  701. return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
  702. }
  703. #endif
  704. #ifdef CONFIG_SYS_MTDPARTS_RUNTIME
  705. #define MTDPARTS_LEN 256
  706. #define MTDIDS_LEN 128
  707. /**
  708. * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
  709. * If we need to access it before the env is relocated, then we need
  710. * to use our own stack buffer. gd->env_buf will be too small.
  711. *
  712. * @param buf temporary buffer pointer MTDPARTS_LEN long
  713. * @return mtdparts variable string, NULL if not found
  714. */
  715. static const char *env_get_mtdparts(const char *str, char *buf)
  716. {
  717. if (gd->flags & GD_FLG_ENV_READY)
  718. return env_get(str);
  719. if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
  720. return buf;
  721. return NULL;
  722. }
  723. /**
  724. * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
  725. */
  726. static void board_get_mtdparts(const char *dev,
  727. char *mtdids,
  728. char *mtdparts)
  729. {
  730. char env_name[32] = "mtdparts_";
  731. char tmp_mtdparts[MTDPARTS_LEN];
  732. const char *tmp;
  733. /* name of env variable to read = mtdparts_<dev> */
  734. strcat(env_name, dev);
  735. tmp = env_get_mtdparts(env_name, tmp_mtdparts);
  736. if (tmp) {
  737. /* mtdids: "<dev>=<dev>, ...." */
  738. if (mtdids[0] != '\0')
  739. strcat(mtdids, ",");
  740. strcat(mtdids, dev);
  741. strcat(mtdids, "=");
  742. strcat(mtdids, dev);
  743. /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
  744. if (mtdparts[0] != '\0')
  745. strncat(mtdparts, ";", MTDPARTS_LEN);
  746. else
  747. strcat(mtdparts, "mtdparts=");
  748. strncat(mtdparts, dev, MTDPARTS_LEN);
  749. strncat(mtdparts, ":", MTDPARTS_LEN);
  750. strncat(mtdparts, tmp, MTDPARTS_LEN);
  751. }
  752. }
  753. void board_mtdparts_default(const char **mtdids, const char **mtdparts)
  754. {
  755. struct mtd_info *mtd;
  756. struct udevice *dev;
  757. static char parts[3 * MTDPARTS_LEN + 1];
  758. static char ids[MTDIDS_LEN + 1];
  759. static bool mtd_initialized;
  760. if (mtd_initialized) {
  761. *mtdids = ids;
  762. *mtdparts = parts;
  763. return;
  764. }
  765. memset(parts, 0, sizeof(parts));
  766. memset(ids, 0, sizeof(ids));
  767. /* probe all MTD devices */
  768. for (uclass_first_device(UCLASS_MTD, &dev);
  769. dev;
  770. uclass_next_device(&dev)) {
  771. pr_debug("mtd device = %s\n", dev->name);
  772. }
  773. mtd = get_mtd_device_nm("nand0");
  774. if (!IS_ERR_OR_NULL(mtd)) {
  775. board_get_mtdparts("nand0", ids, parts);
  776. put_mtd_device(mtd);
  777. }
  778. mtd = get_mtd_device_nm("spi-nand0");
  779. if (!IS_ERR_OR_NULL(mtd)) {
  780. board_get_mtdparts("spi-nand0", ids, parts);
  781. put_mtd_device(mtd);
  782. }
  783. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  784. board_get_mtdparts("nor0", ids, parts);
  785. mtd_initialized = true;
  786. *mtdids = ids;
  787. *mtdparts = parts;
  788. debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
  789. }
  790. #endif
  791. #if defined(CONFIG_OF_BOARD_SETUP)
  792. int ft_board_setup(void *blob, bd_t *bd)
  793. {
  794. #ifdef CONFIG_FDT_FIXUP_PARTITIONS
  795. struct node_info nodes[] = {
  796. { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
  797. { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
  798. };
  799. fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
  800. #endif
  801. return 0;
  802. }
  803. #endif
  804. #ifdef CONFIG_SET_DFU_ALT_INFO
  805. #define DFU_ALT_BUF_LEN SZ_1K
  806. static void board_get_alt_info(const char *dev, char *buff)
  807. {
  808. char var_name[32] = "dfu_alt_info_";
  809. int ret;
  810. ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
  811. /* name of env variable to read = dfu_alt_info_<dev> */
  812. strcat(var_name, dev);
  813. ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
  814. if (ret) {
  815. if (buff[0] != '\0')
  816. strcat(buff, "&");
  817. strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
  818. }
  819. }
  820. void set_dfu_alt_info(char *interface, char *devstr)
  821. {
  822. struct udevice *dev;
  823. struct mtd_info *mtd;
  824. ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
  825. if (env_get("dfu_alt_info"))
  826. return;
  827. memset(buf, 0, sizeof(buf));
  828. /* probe all MTD devices */
  829. mtd_probe_devices();
  830. board_get_alt_info("ram", buf);
  831. if (!uclass_get_device(UCLASS_MMC, 0, &dev))
  832. board_get_alt_info("mmc0", buf);
  833. if (!uclass_get_device(UCLASS_MMC, 1, &dev))
  834. board_get_alt_info("mmc1", buf);
  835. if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
  836. board_get_alt_info("nor0", buf);
  837. mtd = get_mtd_device_nm("nand0");
  838. if (!IS_ERR_OR_NULL(mtd))
  839. board_get_alt_info("nand0", buf);
  840. mtd = get_mtd_device_nm("spi-nand0");
  841. if (!IS_ERR_OR_NULL(mtd))
  842. board_get_alt_info("spi-nand0", buf);
  843. #ifdef CONFIG_DFU_VIRT
  844. strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
  845. if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
  846. strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
  847. #endif
  848. env_set("dfu_alt_info", buf);
  849. puts("DFU alt info setting: done\n");
  850. }
  851. #if CONFIG_IS_ENABLED(DFU_VIRT)
  852. #include <dfu.h>
  853. #include <power/stpmic1.h>
  854. int dfu_otp_read(u64 offset, u8 *buffer, long *size)
  855. {
  856. struct udevice *dev;
  857. int ret;
  858. ret = uclass_get_device_by_driver(UCLASS_MISC,
  859. DM_GET_DRIVER(stm32mp_bsec),
  860. &dev);
  861. if (ret)
  862. return ret;
  863. ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
  864. if (ret >= 0) {
  865. *size = ret;
  866. ret = 0;
  867. }
  868. return 0;
  869. }
  870. int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
  871. {
  872. int ret;
  873. #ifdef CONFIG_PMIC_STPMIC1
  874. struct udevice *dev;
  875. ret = uclass_get_device_by_driver(UCLASS_MISC,
  876. DM_GET_DRIVER(stpmic1_nvm),
  877. &dev);
  878. if (ret)
  879. return ret;
  880. ret = misc_read(dev, 0xF8 + offset, buffer, *size);
  881. if (ret >= 0) {
  882. *size = ret;
  883. ret = 0;
  884. }
  885. if (ret == -EACCES) {
  886. *size = 0;
  887. ret = 0;
  888. }
  889. #else
  890. pr_err("PMIC update not supported");
  891. ret = -EOPNOTSUPP;
  892. #endif
  893. return ret;
  894. }
  895. int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
  896. void *buf, long *len)
  897. {
  898. switch (dfu->data.virt.dev_num) {
  899. case 0x0:
  900. return dfu_otp_read(offset, buf, len);
  901. case 0x1:
  902. return dfu_pmic_read(offset, buf, len);
  903. }
  904. *len = 0;
  905. return 0;
  906. }
  907. int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
  908. {
  909. *size = SZ_1K;
  910. return 0;
  911. }
  912. #endif
  913. #endif
  914. static void board_copro_image_process(ulong fw_image, size_t fw_size)
  915. {
  916. int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
  917. if (!rproc_is_initialized())
  918. if (rproc_init()) {
  919. printf("Remote Processor %d initialization failed\n",
  920. id);
  921. return;
  922. }
  923. ret = rproc_load(id, fw_image, fw_size);
  924. printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
  925. id, fw_image, fw_size, ret ? " Failed!" : " Success!");
  926. if (!ret)
  927. rproc_start(id);
  928. }
  929. U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);