spl_at91.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014 DENX Software Engineering
  4. * Heiko Schocher <hs@denx.de>
  5. *
  6. * Based on:
  7. * Copyright (C) 2013 Atmel Corporation
  8. * Bo Shen <voice.shen@atmel.com>
  9. */
  10. #include <common.h>
  11. #include <hang.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/at91_common.h>
  14. #include <asm/arch/at91sam9_matrix.h>
  15. #include <asm/arch/at91_pit.h>
  16. #include <asm/arch/at91_rstc.h>
  17. #include <asm/arch/at91_wdt.h>
  18. #include <asm/arch/clk.h>
  19. #include <spl.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. static void enable_ext_reset(void)
  22. {
  23. struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
  24. writel(AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN, &rstc->mr);
  25. }
  26. void lowlevel_clock_init(void)
  27. {
  28. struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  29. if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) {
  30. /* Enable Main Oscillator */
  31. writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor);
  32. /* Wait until Main Oscillator is stable */
  33. while (!(readl(&pmc->sr) & AT91_PMC_MOSCS))
  34. ;
  35. }
  36. /* After stabilization, switch to Main Oscillator */
  37. if ((readl(&pmc->mckr) & AT91_PMC_CSS) == AT91_PMC_CSS_SLOW) {
  38. unsigned long tmp;
  39. tmp = readl(&pmc->mckr);
  40. tmp &= ~AT91_PMC_CSS;
  41. tmp |= AT91_PMC_CSS_MAIN;
  42. writel(tmp, &pmc->mckr);
  43. while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  44. ;
  45. tmp &= ~AT91_PMC_PRES;
  46. tmp |= AT91_PMC_PRES_1;
  47. writel(tmp, &pmc->mckr);
  48. while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
  49. ;
  50. }
  51. return;
  52. }
  53. void __weak matrix_init(void)
  54. {
  55. }
  56. void __weak at91_spl_board_init(void)
  57. {
  58. }
  59. void __weak spl_board_init(void)
  60. {
  61. }
  62. void board_init_f(ulong dummy)
  63. {
  64. #if CONFIG_IS_ENABLED(OF_CONTROL)
  65. int ret;
  66. ret = spl_early_init();
  67. if (ret) {
  68. debug("spl_early_init() failed: %d\n", ret);
  69. hang();
  70. }
  71. #endif
  72. lowlevel_clock_init();
  73. #if !defined(CONFIG_WDT_AT91)
  74. at91_disable_wdt();
  75. #endif
  76. /*
  77. * At this stage the main oscillator is supposed to be enabled
  78. * PCK = MCK = MOSC
  79. */
  80. at91_pllicpr_init(0x00);
  81. /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
  82. at91_plla_init(CONFIG_SYS_AT91_PLLA);
  83. /* PCK = PLLA = 2 * MCK */
  84. at91_mck_init(CONFIG_SYS_MCKR);
  85. /* Switch MCK on PLLA output */
  86. at91_mck_init(CONFIG_SYS_MCKR_CSS);
  87. #if defined(CONFIG_SYS_AT91_PLLB)
  88. /* Configure PLLB */
  89. at91_pllb_init(CONFIG_SYS_AT91_PLLB);
  90. #endif
  91. /* Enable External Reset */
  92. enable_ext_reset();
  93. /* Initialize matrix */
  94. matrix_init();
  95. gd->arch.mck_rate_hz = CONFIG_SYS_MASTER_CLOCK;
  96. /*
  97. * init timer long enough for using in spl.
  98. */
  99. timer_init();
  100. /* enable clocks for all PIOs */
  101. #if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
  102. at91_periph_clk_enable(ATMEL_ID_PIOAB);
  103. at91_periph_clk_enable(ATMEL_ID_PIOCD);
  104. #else
  105. at91_periph_clk_enable(ATMEL_ID_PIOA);
  106. at91_periph_clk_enable(ATMEL_ID_PIOB);
  107. at91_periph_clk_enable(ATMEL_ID_PIOC);
  108. #endif
  109. #if defined(CONFIG_SPL_SERIAL_SUPPORT)
  110. /* init console */
  111. at91_seriald_hw_init();
  112. preloader_console_init();
  113. #endif
  114. mem_init();
  115. at91_spl_board_init();
  116. }