eth.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #include <common.h>
  6. #include <asm/io.h>
  7. #include <netdev.h>
  8. #include <fm_eth.h>
  9. #include <fsl_dtsec.h>
  10. #include <fsl_mdio.h>
  11. #include <malloc.h>
  12. #include "../common/fman.h"
  13. int board_eth_init(bd_t *bis)
  14. {
  15. #ifdef CONFIG_FMAN_ENET
  16. struct memac_mdio_info dtsec_mdio_info;
  17. struct mii_dev *dev;
  18. u32 srds_s1;
  19. struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  20. srds_s1 = in_be32(&gur->rcwsr[4]) &
  21. FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
  22. srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
  23. dtsec_mdio_info.regs =
  24. (struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
  25. dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
  26. /* Register the 1G MDIO bus */
  27. fm_memac_mdio_init(bis, &dtsec_mdio_info);
  28. /* QSGMII on lane B, MAC 6/5/10/1 */
  29. fm_info_set_phy_address(FM1_DTSEC6, QSGMII_PORT1_PHY_ADDR);
  30. fm_info_set_phy_address(FM1_DTSEC5, QSGMII_PORT2_PHY_ADDR);
  31. fm_info_set_phy_address(FM1_DTSEC10, QSGMII_PORT3_PHY_ADDR);
  32. fm_info_set_phy_address(FM1_DTSEC1, QSGMII_PORT4_PHY_ADDR);
  33. switch (srds_s1) {
  34. case 0x3040:
  35. break;
  36. default:
  37. printf("Invalid SerDes protocol 0x%x for LS1046AFRWY\n",
  38. srds_s1);
  39. break;
  40. }
  41. dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
  42. fm_info_set_mdio(FM1_DTSEC6, dev);
  43. fm_info_set_mdio(FM1_DTSEC5, dev);
  44. fm_info_set_mdio(FM1_DTSEC10, dev);
  45. fm_info_set_mdio(FM1_DTSEC1, dev);
  46. cpu_eth_init(bis);
  47. #endif
  48. return pci_eth_init(bis);
  49. }
  50. #ifdef CONFIG_FMAN_ENET
  51. int fdt_update_ethernet_dt(void *blob)
  52. {
  53. u32 srds_s1;
  54. int i, prop;
  55. int offset, nodeoff;
  56. const char *path;
  57. struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  58. srds_s1 = in_be32(&gur->rcwsr[4]) &
  59. FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_MASK;
  60. srds_s1 >>= FSL_CHASSIS2_RCWSR4_SRDS1_PRTCL_SHIFT;
  61. /* Cycle through all aliases */
  62. for (prop = 0; ; prop++) {
  63. const char *name;
  64. /* FDT might have been edited, recompute the offset */
  65. offset = fdt_first_property_offset(blob,
  66. fdt_path_offset(blob,
  67. "/aliases")
  68. );
  69. /* Select property number 'prop' */
  70. for (i = 0; i < prop; i++)
  71. offset = fdt_next_property_offset(blob, offset);
  72. if (offset < 0)
  73. break;
  74. path = fdt_getprop_by_offset(blob, offset, &name, NULL);
  75. nodeoff = fdt_path_offset(blob, path);
  76. switch (srds_s1) {
  77. case 0x3040:
  78. if (!strcmp(name, "ethernet1"))
  79. fdt_status_disabled(blob, nodeoff);
  80. if (!strcmp(name, "ethernet2"))
  81. fdt_status_disabled(blob, nodeoff);
  82. if (!strcmp(name, "ethernet3"))
  83. fdt_status_disabled(blob, nodeoff);
  84. if (!strcmp(name, "ethernet6"))
  85. fdt_status_disabled(blob, nodeoff);
  86. break;
  87. default:
  88. printf("%s:Invalid SerDes prtcl 0x%x for LS1046AFRWY\n",
  89. __func__, srds_s1);
  90. break;
  91. }
  92. }
  93. return 0;
  94. }
  95. #endif