pci.c 3.6 KB

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  1. /*
  2. * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. /*
  7. * PCI Configuration space access support for MPC83xx PCI Bridge
  8. */
  9. #include <asm/mmu.h>
  10. #include <asm/io.h>
  11. #include <common.h>
  12. #include <mpc83xx.h>
  13. #include <pci.h>
  14. #include <i2c.h>
  15. #include <asm/fsl_i2c.h>
  16. #include "../common/pq-mds-pib.h"
  17. static struct pci_region pci1_regions[] = {
  18. {
  19. bus_start: CONFIG_SYS_PCI1_MEM_BASE,
  20. phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
  21. size: CONFIG_SYS_PCI1_MEM_SIZE,
  22. flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
  23. },
  24. {
  25. bus_start: CONFIG_SYS_PCI1_IO_BASE,
  26. phys_start: CONFIG_SYS_PCI1_IO_PHYS,
  27. size: CONFIG_SYS_PCI1_IO_SIZE,
  28. flags: PCI_REGION_IO
  29. },
  30. {
  31. bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
  32. phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
  33. size: CONFIG_SYS_PCI1_MMIO_SIZE,
  34. flags: PCI_REGION_MEM
  35. },
  36. };
  37. #ifdef CONFIG_MPC83XX_PCI2
  38. static struct pci_region pci2_regions[] = {
  39. {
  40. bus_start: CONFIG_SYS_PCI2_MEM_BASE,
  41. phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
  42. size: CONFIG_SYS_PCI2_MEM_SIZE,
  43. flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
  44. },
  45. {
  46. bus_start: CONFIG_SYS_PCI2_IO_BASE,
  47. phys_start: CONFIG_SYS_PCI2_IO_PHYS,
  48. size: CONFIG_SYS_PCI2_IO_SIZE,
  49. flags: PCI_REGION_IO
  50. },
  51. {
  52. bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
  53. phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
  54. size: CONFIG_SYS_PCI2_MMIO_SIZE,
  55. flags: PCI_REGION_MEM
  56. },
  57. };
  58. #endif
  59. void pci_init_board(void)
  60. #ifdef CONFIG_PCISLAVE
  61. {
  62. volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
  63. volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
  64. volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
  65. struct pci_region *reg[] = { pci1_regions };
  66. /* Configure PCI Local Access Windows */
  67. pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
  68. pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
  69. pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
  70. pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
  71. mpc83xx_pci_init(1, reg);
  72. /*
  73. * Configure PCI Inbound Translation Windows
  74. */
  75. pci_ctrl[0].pitar0 = 0x0;
  76. pci_ctrl[0].pibar0 = 0x0;
  77. pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
  78. PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
  79. pci_ctrl[0].pitar1 = 0x0;
  80. pci_ctrl[0].pibar1 = 0x0;
  81. pci_ctrl[0].piebar1 = 0x0;
  82. pci_ctrl[0].piwar1 &= ~PIWAR_EN;
  83. pci_ctrl[0].pitar2 = 0x0;
  84. pci_ctrl[0].pibar2 = 0x0;
  85. pci_ctrl[0].piebar2 = 0x0;
  86. pci_ctrl[0].piwar2 &= ~PIWAR_EN;
  87. /* Unlock the configuration bit */
  88. mpc83xx_pcislave_unlock(0);
  89. printf("PCI: Agent mode enabled\n");
  90. }
  91. #else
  92. {
  93. volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
  94. volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
  95. volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
  96. #ifndef CONFIG_MPC83XX_PCI2
  97. struct pci_region *reg[] = { pci1_regions };
  98. #else
  99. struct pci_region *reg[] = { pci1_regions, pci2_regions };
  100. #endif
  101. /* initialize the PCA9555PW IO expander on the PIB board */
  102. pib_init();
  103. #if defined(CONFIG_PCI_66M)
  104. clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
  105. printf("PCI clock is 66MHz\n");
  106. #elif defined(CONFIG_PCI_33M)
  107. clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
  108. OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
  109. printf("PCI clock is 33MHz\n");
  110. #else
  111. clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
  112. printf("PCI clock is 66MHz\n");
  113. #endif
  114. udelay(2000);
  115. /* Configure PCI Local Access Windows */
  116. pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
  117. pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
  118. pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
  119. pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
  120. udelay(2000);
  121. #ifndef CONFIG_MPC83XX_PCI2
  122. mpc83xx_pci_init(1, reg);
  123. #else
  124. mpc83xx_pci_init(2, reg);
  125. #endif
  126. }
  127. #endif /* CONFIG_PCISLAVE */