rk3368-board-tpl.c 3.8 KB

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  1. /*
  2. * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <asm/arch/clock.h>
  8. #include <debug_uart.h>
  9. #include <dm.h>
  10. #include <ram.h>
  11. #include <spl.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/bootrom.h>
  14. #include <asm/arch/cru_rk3368.h>
  15. #include <asm/arch/grf_rk3368.h>
  16. #include <asm/arch/hardware.h>
  17. #include <asm/arch/timer.h>
  18. #include <syscon.h>
  19. /*
  20. * The SPL (and also the full U-Boot stage on the RK3368) will run in
  21. * secure mode (i.e. EL3) and an ATF will eventually be booted before
  22. * starting up the operating system... so we can initialize the SGRF
  23. * here and rely on the ATF installing the final (secure) policy
  24. * later.
  25. */
  26. static inline uintptr_t sgrf_soc_con_addr(unsigned no)
  27. {
  28. const uintptr_t SGRF_BASE =
  29. (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
  30. return SGRF_BASE + sizeof(u32) * no;
  31. }
  32. static inline uintptr_t sgrf_busdmac_addr(unsigned no)
  33. {
  34. const uintptr_t SGRF_BASE =
  35. (uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
  36. const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
  37. const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
  38. return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
  39. }
  40. static void sgrf_init(void)
  41. {
  42. struct rk3368_cru * const cru =
  43. (struct rk3368_cru * const)rockchip_get_cru();
  44. const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
  45. const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
  46. const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
  47. /* Set all configurable IP to 'non secure'-mode */
  48. rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
  49. rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
  50. rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
  51. /*
  52. * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
  53. * Original comment: "ddr space set no secure mode"
  54. */
  55. rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
  56. rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
  57. rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
  58. /* Set 'secure dma' to 'non secure'-mode */
  59. rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
  60. rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
  61. dsb(); /* barrier */
  62. rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
  63. rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
  64. dsb(); /* barrier */
  65. udelay(10);
  66. rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
  67. rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
  68. }
  69. void board_debug_uart_init(void)
  70. {
  71. /*
  72. * N.B.: This is called before the device-model has been
  73. * initialised. For this reason, we can not access
  74. * the GRF address range using the syscon API.
  75. */
  76. struct rk3368_grf * const grf =
  77. (struct rk3368_grf * const)0xff770000;
  78. enum {
  79. GPIO2D1_MASK = GENMASK(3, 2),
  80. GPIO2D1_GPIO = 0,
  81. GPIO2D1_UART0_SOUT = (1 << 2),
  82. GPIO2D0_MASK = GENMASK(1, 0),
  83. GPIO2D0_GPIO = 0,
  84. GPIO2D0_UART0_SIN = (1 << 0),
  85. };
  86. #if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
  87. /* Enable early UART0 on the RK3368 */
  88. rk_clrsetreg(&grf->gpio2d_iomux,
  89. GPIO2D0_MASK, GPIO2D0_UART0_SIN);
  90. rk_clrsetreg(&grf->gpio2d_iomux,
  91. GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
  92. #endif
  93. }
  94. void board_init_f(ulong dummy)
  95. {
  96. struct udevice *dev;
  97. int ret;
  98. #define EARLY_UART
  99. #ifdef EARLY_UART
  100. /*
  101. * Debug UART can be used from here if required:
  102. *
  103. * debug_uart_init();
  104. * printch('a');
  105. * printhex8(0x1234);
  106. * printascii("string");
  107. */
  108. debug_uart_init();
  109. printascii("U-Boot TPL board init\n");
  110. #endif
  111. ret = spl_early_init();
  112. if (ret) {
  113. debug("spl_early_init() failed: %d\n", ret);
  114. hang();
  115. }
  116. /* Reset security, so we can use DMA in the MMC drivers */
  117. sgrf_init();
  118. ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  119. if (ret) {
  120. debug("DRAM init failed: %d\n", ret);
  121. return;
  122. }
  123. }
  124. void board_return_to_bootrom(void)
  125. {
  126. back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  127. }
  128. u32 spl_boot_device(void)
  129. {
  130. return BOOT_DEVICE_BOOTROM;
  131. }