sys_proto.h 2.1 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Texas Instruments, <www.ti.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef _SYS_PROTO_H_
  8. #define _SYS_PROTO_H_
  9. #include <asm/arch/omap.h>
  10. #include <asm/arch/clock.h>
  11. #include <asm/io.h>
  12. #include <asm/omap_common.h>
  13. #include <linux/mtd/omap_gpmc.h>
  14. #include <asm/arch/mux_omap4.h>
  15. #include <asm/ti-common/sys_proto.h>
  16. #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
  17. extern const struct emif_regs emif_regs_elpida_200_mhz_2cs;
  18. extern const struct emif_regs emif_regs_elpida_380_mhz_1cs;
  19. extern const struct emif_regs emif_regs_elpida_400_mhz_1cs;
  20. extern const struct emif_regs emif_regs_elpida_400_mhz_2cs;
  21. extern const struct dmm_lisa_map_regs lisa_map_2G_x_1_x_2;
  22. extern const struct dmm_lisa_map_regs lisa_map_2G_x_2_x_2;
  23. extern const struct dmm_lisa_map_regs ma_lisa_map_2G_x_2_x_2;
  24. #else
  25. extern const struct lpddr2_device_details elpida_2G_S4_details;
  26. extern const struct lpddr2_device_details elpida_4G_S4_details;
  27. #endif
  28. #ifdef CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
  29. extern const struct lpddr2_device_timings jedec_default_timings;
  30. #else
  31. extern const struct lpddr2_device_timings elpida_2G_S4_timings;
  32. #endif
  33. struct omap_sysinfo {
  34. char *board_string;
  35. };
  36. extern const struct omap_sysinfo sysinfo;
  37. void gpmc_init(void);
  38. void watchdog_init(void);
  39. u32 get_device_type(void);
  40. void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
  41. void set_muxconf_regs(void);
  42. u32 wait_on_value(u32, u32, void *, u32);
  43. void sdelay(unsigned long);
  44. void setup_early_clocks(void);
  45. void prcm_init(void);
  46. void do_board_detect(void);
  47. void bypass_dpll(u32 const base);
  48. void freq_update_core(void);
  49. u32 get_sys_clk_freq(void);
  50. u32 omap4_ddr_clk(void);
  51. void cancel_out(u32 *num, u32 *den, u32 den_limit);
  52. void sdram_init(void);
  53. u32 omap_sdram_size(void);
  54. u32 cortex_rev(void);
  55. void save_omap_boot_params(void);
  56. void init_omap_revision(void);
  57. void do_io_settings(void);
  58. void sri2c_init(void);
  59. int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
  60. u32 warm_reset(void);
  61. void force_emif_self_refresh(void);
  62. void setup_warmreset_time(void);
  63. #define OMAP4_SERVICE_PL310_CONTROL_REG_SET 0x102
  64. #endif