tpl.c 1.9 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  4. */
  5. #include <common.h>
  6. #include <debug_uart.h>
  7. #include <dm.h>
  8. #include <ram.h>
  9. #include <spl.h>
  10. #include <version.h>
  11. #include <asm/io.h>
  12. #include <asm/arch-rockchip/bootrom.h>
  13. #define TIMER_LOAD_COUNT_L 0x00
  14. #define TIMER_LOAD_COUNT_H 0x04
  15. #define TIMER_CONTROL_REG 0x10
  16. #define TIMER_EN 0x1
  17. #define TIMER_FMODE BIT(0)
  18. #define TIMER_RMODE BIT(1)
  19. __weak void rockchip_stimer_init(void)
  20. {
  21. /* If Timer already enabled, don't re-init it */
  22. u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  23. if (reg & TIMER_EN)
  24. return;
  25. #ifndef CONFIG_ARM64
  26. asm volatile("mcr p15, 0, %0, c14, c0, 0"
  27. : : "r"(COUNTER_FREQUENCY));
  28. #endif
  29. writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  30. writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
  31. writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
  32. writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
  33. TIMER_CONTROL_REG);
  34. }
  35. void board_init_f(ulong dummy)
  36. {
  37. struct udevice *dev;
  38. int ret;
  39. #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
  40. /*
  41. * Debug UART can be used from here if required:
  42. *
  43. * debug_uart_init();
  44. * printch('a');
  45. * printhex8(0x1234);
  46. * printascii("string");
  47. */
  48. debug_uart_init();
  49. #ifdef CONFIG_TPL_BANNER_PRINT
  50. printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
  51. U_BOOT_TIME ")\n");
  52. #endif
  53. #endif
  54. ret = spl_early_init();
  55. if (ret) {
  56. debug("spl_early_init() failed: %d\n", ret);
  57. hang();
  58. }
  59. /* Init secure timer */
  60. rockchip_stimer_init();
  61. /* Init ARM arch timer in arch/arm/cpu/ */
  62. timer_init();
  63. ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  64. if (ret) {
  65. printf("DRAM init failed: %d\n", ret);
  66. return;
  67. }
  68. }
  69. int board_return_to_bootrom(struct spl_image_info *spl_image,
  70. struct spl_boot_device *bootdev)
  71. {
  72. back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  73. return 0;
  74. }
  75. u32 spl_boot_device(void)
  76. {
  77. return BOOT_DEVICE_BOOTROM;
  78. }