psci.h 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121
  1. /*
  2. * Copyright (C) 2013 - ARM Ltd
  3. * Author: Marc Zyngier <marc.zyngier@arm.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __ARM_PSCI_H__
  18. #define __ARM_PSCI_H__
  19. #ifndef __ASSEMBLY__
  20. #include <linux/bitops.h>
  21. #endif
  22. #define ARM_PSCI_VER_1_0 (0x00010000)
  23. #define ARM_PSCI_VER_0_2 (0x00000002)
  24. /* PSCI 0.1 interface */
  25. #define ARM_PSCI_FN_BASE 0x95c1ba5e
  26. #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n))
  27. #define ARM_PSCI_FN_CPU_SUSPEND ARM_PSCI_FN(0)
  28. #define ARM_PSCI_FN_CPU_OFF ARM_PSCI_FN(1)
  29. #define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(2)
  30. #define ARM_PSCI_FN_MIGRATE ARM_PSCI_FN(3)
  31. #define ARM_PSCI_RET_SUCCESS 0
  32. #define ARM_PSCI_RET_NI (-1)
  33. #define ARM_PSCI_RET_INVAL (-2)
  34. #define ARM_PSCI_RET_DENIED (-3)
  35. #define ARM_PSCI_RET_ALREADY_ON (-4)
  36. #define ARM_PSCI_RET_ON_PENDING (-5)
  37. #define ARM_PSCI_RET_INTERNAL_FAILURE (-6)
  38. #define ARM_PSCI_RET_NOT_PRESENT (-7)
  39. #define ARM_PSCI_RET_DISABLED (-8)
  40. #define ARM_PSCI_RET_INVALID_ADDRESS (-9)
  41. /* PSCI 0.2 interface */
  42. #define ARM_PSCI_0_2_FN_BASE 0x84000000
  43. #define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n))
  44. #define ARM_PSCI_0_2_FN64_BASE 0xC4000000
  45. #define ARM_PSCI_0_2_FN64(n) (ARM_PSCI_0_2_FN64_BASE + (n))
  46. #define ARM_PSCI_0_2_FN_PSCI_VERSION ARM_PSCI_0_2_FN(0)
  47. #define ARM_PSCI_0_2_FN_CPU_SUSPEND ARM_PSCI_0_2_FN(1)
  48. #define ARM_PSCI_0_2_FN_CPU_OFF ARM_PSCI_0_2_FN(2)
  49. #define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3)
  50. #define ARM_PSCI_0_2_FN_AFFINITY_INFO ARM_PSCI_0_2_FN(4)
  51. #define ARM_PSCI_0_2_FN_MIGRATE ARM_PSCI_0_2_FN(5)
  52. #define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE ARM_PSCI_0_2_FN(6)
  53. #define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN(7)
  54. #define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8)
  55. #define ARM_PSCI_0_2_FN_SYSTEM_RESET ARM_PSCI_0_2_FN(9)
  56. #define ARM_PSCI_0_2_FN64_CPU_SUSPEND ARM_PSCI_0_2_FN64(1)
  57. #define ARM_PSCI_0_2_FN64_CPU_ON ARM_PSCI_0_2_FN64(3)
  58. #define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4)
  59. #define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5)
  60. #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7)
  61. #define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
  62. /* PSCI 1.0 interface */
  63. #define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10)
  64. #define ARM_PSCI_1_0_FN_CPU_FREEZE ARM_PSCI_0_2_FN(11)
  65. #define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN(12)
  66. #define ARM_PSCI_1_0_FN_NODE_HW_STATE ARM_PSCI_0_2_FN(13)
  67. #define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND ARM_PSCI_0_2_FN(14)
  68. #define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE ARM_PSCI_0_2_FN(15)
  69. #define ARM_PSCI_1_0_FN_STAT_RESIDENCY ARM_PSCI_0_2_FN(16)
  70. #define ARM_PSCI_1_0_FN_STAT_COUNT ARM_PSCI_0_2_FN(17)
  71. #define ARM_PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN64(12)
  72. #define ARM_PSCI_1_0_FN64_NODE_HW_STATE ARM_PSCI_0_2_FN64(13)
  73. #define ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND ARM_PSCI_0_2_FN64(14)
  74. #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16)
  75. #define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17)
  76. /* 1KB stack per core */
  77. #define ARM_PSCI_STACK_SHIFT 10
  78. #define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT)
  79. /* PSCI affinity level state returned by AFFINITY_INFO */
  80. #define PSCI_AFFINITY_LEVEL_ON 0
  81. #define PSCI_AFFINITY_LEVEL_OFF 1
  82. #define PSCI_AFFINITY_LEVEL_ON_PENDING 2
  83. #define PSCI_RESET2_TYPE_VENDOR_SHIFT 31
  84. #define PSCI_RESET2_TYPE_VENDOR BIT(PSCI_RESET2_TYPE_VENDOR_SHIFT)
  85. #ifndef __ASSEMBLY__
  86. #include <asm/types.h>
  87. #include <linux/bitops.h>
  88. /* These 3 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */
  89. u32 psci_get_target_pc(int cpu);
  90. u32 psci_get_context_id(int cpu);
  91. void psci_save(int cpu, u32 pc, u32 context_id);
  92. void psci_cpu_entry(void);
  93. u32 psci_get_cpu_id(void);
  94. void psci_cpu_off_common(void);
  95. int psci_update_dt(void *fdt);
  96. void psci_board_init(void);
  97. int fdt_psci(void *fdt);
  98. void psci_v7_flush_dcache_all(void);
  99. #endif /* ! __ASSEMBLY__ */
  100. #endif /* __ARM_PSCI_H__ */