cpu.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <cpu_func.h>
  7. #include <init.h>
  8. #include <asm/cache.h>
  9. #include <asm/io.h>
  10. #include <asm/system.h>
  11. #include <asm/armv8/mmu.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/mc_me_regs.h>
  14. #include <linux/bitops.h>
  15. #include "cpu.h"
  16. u32 cpu_mask(void)
  17. {
  18. return readl(MC_ME_CS);
  19. }
  20. #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  21. #define S32V234_IRAM_BASE 0x3e800000UL
  22. #define S32V234_IRAM_SIZE 0x800000UL
  23. #define S32V234_DRAM_BASE1 0x80000000UL
  24. #define S32V234_DRAM_SIZE1 0x40000000UL
  25. #define S32V234_DRAM_BASE2 0xC0000000UL
  26. #define S32V234_DRAM_SIZE2 0x20000000UL
  27. #define S32V234_PERIPH_BASE 0x40000000UL
  28. #define S32V234_PERIPH_SIZE 0x40000000UL
  29. static struct mm_region s32v234_mem_map[] = {
  30. {
  31. .virt = S32V234_IRAM_BASE,
  32. .phys = S32V234_IRAM_BASE,
  33. .size = S32V234_IRAM_SIZE,
  34. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  35. PTE_BLOCK_OUTER_SHARE
  36. }, {
  37. .virt = S32V234_DRAM_BASE1,
  38. .phys = S32V234_DRAM_BASE1,
  39. .size = S32V234_DRAM_SIZE1,
  40. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  41. PTE_BLOCK_OUTER_SHARE
  42. }, {
  43. .virt = S32V234_PERIPH_BASE,
  44. .phys = S32V234_PERIPH_BASE,
  45. .size = S32V234_PERIPH_SIZE,
  46. .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  47. PTE_BLOCK_NON_SHARE
  48. /* TODO: Do we need these? */
  49. /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
  50. }, {
  51. .virt = S32V234_DRAM_BASE2,
  52. .phys = S32V234_DRAM_BASE2,
  53. .size = S32V234_DRAM_SIZE2,
  54. .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
  55. PTE_BLOCK_OUTER_SHARE
  56. }, {
  57. /* List terminator */
  58. 0,
  59. }
  60. };
  61. struct mm_region *mem_map = s32v234_mem_map;
  62. #endif
  63. /*
  64. * Return the number of cores on this SOC.
  65. */
  66. int cpu_numcores(void)
  67. {
  68. int numcores;
  69. u32 mask;
  70. mask = cpu_mask();
  71. numcores = hweight32(cpu_mask());
  72. /* Verify if M4 is deactivated */
  73. if (mask & 0x1)
  74. numcores--;
  75. return numcores;
  76. }
  77. #if defined(CONFIG_ARCH_EARLY_INIT_R)
  78. int arch_early_init_r(void)
  79. {
  80. int rv;
  81. asm volatile ("dsb sy");
  82. rv = fsl_s32v234_wake_seconday_cores();
  83. if (rv)
  84. printf("Did not wake secondary cores\n");
  85. asm volatile ("sev");
  86. return 0;
  87. }
  88. #endif /* CONFIG_ARCH_EARLY_INIT_R */