generic_timer.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2013
  4. * David Feng <fenghua@phytium.com.cn>
  5. */
  6. #include <common.h>
  7. #include <bootstage.h>
  8. #include <command.h>
  9. #include <time.h>
  10. #include <asm/system.h>
  11. #include <linux/bitops.h>
  12. DECLARE_GLOBAL_DATA_PTR;
  13. /*
  14. * Generic timer implementation of get_tbclk()
  15. */
  16. unsigned long get_tbclk(void)
  17. {
  18. unsigned long cntfrq;
  19. asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq));
  20. return cntfrq;
  21. }
  22. #ifdef CONFIG_SYS_FSL_ERRATUM_A008585
  23. /*
  24. * FSL erratum A-008585 says that the ARM generic timer counter "has the
  25. * potential to contain an erroneous value for a small number of core
  26. * clock cycles every time the timer value changes".
  27. * This sometimes leads to a consecutive counter read returning a lower
  28. * value than the previous one, thus reporting the time to go backwards.
  29. * The workaround is to read the counter twice and only return when the value
  30. * was the same in both reads.
  31. * Assumes that the CPU runs in much higher frequency than the timer.
  32. */
  33. unsigned long timer_read_counter(void)
  34. {
  35. unsigned long cntpct;
  36. unsigned long temp;
  37. isb();
  38. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  39. asm volatile("mrs %0, cntpct_el0" : "=r" (temp));
  40. while (temp != cntpct) {
  41. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  42. asm volatile("mrs %0, cntpct_el0" : "=r" (temp));
  43. }
  44. return cntpct;
  45. }
  46. #elif CONFIG_SUNXI_A64_TIMER_ERRATUM
  47. /*
  48. * This erratum sometimes flips the lower 11 bits of the counter value
  49. * to all 0's or all 1's, leading to jumps forwards or backwards.
  50. * Backwards jumps might be interpreted all roll-overs and be treated as
  51. * huge jumps forward.
  52. * The workaround is to check whether the lower 11 bits of the counter are
  53. * all 0 or all 1, then discard this value and read again.
  54. * This occasionally discards valid values, but will catch all erroneous
  55. * reads and fixes the problem reliably. Also this mostly requires only a
  56. * single read, so does not have any significant overhead.
  57. * The algorithm was conceived by Samuel Holland.
  58. */
  59. unsigned long timer_read_counter(void)
  60. {
  61. unsigned long cntpct;
  62. isb();
  63. do {
  64. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  65. } while (((cntpct + 1) & GENMASK(10, 0)) <= 1);
  66. return cntpct;
  67. }
  68. #else
  69. /*
  70. * timer_read_counter() using the Arm Generic Timer (aka arch timer).
  71. */
  72. unsigned long timer_read_counter(void)
  73. {
  74. unsigned long cntpct;
  75. isb();
  76. asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct));
  77. return cntpct;
  78. }
  79. #endif
  80. uint64_t get_ticks(void)
  81. {
  82. unsigned long ticks = timer_read_counter();
  83. gd->arch.tbl = ticks;
  84. return ticks;
  85. }
  86. unsigned long usec2ticks(unsigned long usec)
  87. {
  88. ulong ticks;
  89. if (usec < 1000)
  90. ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
  91. else
  92. ticks = ((usec / 10) * (get_tbclk() / 100000));
  93. return ticks;
  94. }
  95. ulong timer_get_boot_us(void)
  96. {
  97. u64 val = get_ticks() * 1000000;
  98. return val / get_tbclk();
  99. }