netarm_gen_module.h 5.6 KB

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  1. /*
  2. * include/asm-armnommu/arch-netarm/netarm_gen_module.h
  3. *
  4. * Copyright (C) 2000, 2001 NETsilicon, Inc.
  5. * Copyright (C) 2000, 2001 Red Hat, Inc.
  6. *
  7. * This software is copyrighted by Red Hat. LICENSEE agrees that
  8. * it will not delete this copyright notice, trademarks or protective
  9. * notices from any copy made by LICENSEE.
  10. *
  11. * This software is provided "AS-IS" and any express or implied
  12. * warranties or conditions, including but not limited to any
  13. * implied warranties of merchantability and fitness for a particular
  14. * purpose regarding this software. In no event shall Red Hat
  15. * be liable for any indirect, consequential, or incidental damages,
  16. * loss of profits or revenue, loss of use or data, or interruption
  17. * of business, whether the alleged damages are labeled in contract,
  18. * tort, or indemnity.
  19. *
  20. * This program is free software; you can redistribute it and/or modify
  21. * it under the terms of the GNU General Public License as published by
  22. * the Free Software Foundation; either version 2 of the License, or
  23. * (at your option) any later version.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  28. *
  29. * author(s) : Joe deBlaquiere
  30. */
  31. #ifndef __NETARM_GEN_MODULE_REGISTERS_H
  32. #define __NETARM_GEN_MODULE_REGISTERS_H
  33. /* GEN unit register offsets */
  34. #define NETARM_GEN_MODULE_BASE (0xFFB00000)
  35. #define get_gen_reg_addr(c) ((volatile unsigned int *)(NETARM_GEN_MODULE_BASE + (c)))
  36. #define NETARM_GEN_SYSTEM_CONTROL (0x00)
  37. #define NETARM_GEN_STATUS_CONTROL (0x04)
  38. #define NETARM_GEN_PLL_CONTROL (0x08)
  39. #define NETARM_GEN_SOFTWARE_SERVICE (0x0c)
  40. #define NETARM_GEN_TIMER1_CONTROL (0x10)
  41. #define NETARM_GEN_TIMER1_STATUS (0x14)
  42. #define NETARM_GEN_TIMER2_CONTROL (0x18)
  43. #define NETARM_GEN_TIMER2_STATUS (0x1c)
  44. #define NETARM_GEN_PORTA (0x20)
  45. #define NETARM_GEN_PORTB (0x24)
  46. #define NETARM_GEN_PORTC (0x28)
  47. #define NETARM_GEN_INTR_ENABLE (0x30)
  48. #define NETARM_GEN_INTR_ENABLE_SET (0x34)
  49. #define NETARM_GEN_INTR_ENABLE_CLR (0x38)
  50. #define NETARM_GEN_INTR_STATUS_EN (0x34)
  51. #define NETARM_GEN_INTR_STATUS_RAW (0x38)
  52. #define NETARM_GEN_CACHE_CONTROL1 (0x40)
  53. #define NETARM_GEN_CACHE_CONTROL2 (0x44)
  54. /* select bitfield definitions */
  55. /* System Control Register ( 0xFFB0_0000 ) */
  56. #define NETARM_GEN_SYS_CFG_LENDIAN (0x80000000)
  57. #define NETARM_GEN_SYS_CFG_BENDIAN (0x00000000)
  58. #define NETARM_GEN_SYS_CFG_BUSQRTR (0x00000000)
  59. #define NETARM_GEN_SYS_CFG_BUSHALF (0x20000000)
  60. #define NETARM_GEN_SYS_CFG_BUSFULL (0x40000000)
  61. #define NETARM_GEN_SYS_CFG_BCLK_DISABLE (0x10000000)
  62. #define NETARM_GEN_SYS_CFG_WDOG_EN (0x01000000)
  63. #define NETARM_GEN_SYS_CFG_WDOG_IRQ (0x00000000)
  64. #define NETARM_GEN_SYS_CFG_WDOG_FIQ (0x00400000)
  65. #define NETARM_GEN_SYS_CFG_WDOG_RST (0x00800000)
  66. #define NETARM_GEN_SYS_CFG_WDOG_24 (0x00000000)
  67. #define NETARM_GEN_SYS_CFG_WDOG_26 (0x00100000)
  68. #define NETARM_GEN_SYS_CFG_WDOG_28 (0x00200000)
  69. #define NETARM_GEN_SYS_CFG_WDOG_29 (0x00300000)
  70. #define NETARM_GEN_SYS_CFG_BUSMON_EN (0x00040000)
  71. #define NETARM_GEN_SYS_CFG_BUSMON_128 (0x00000000)
  72. #define NETARM_GEN_SYS_CFG_BUSMON_64 (0x00010000)
  73. #define NETARM_GEN_SYS_CFG_BUSMON_32 (0x00020000)
  74. #define NETARM_GEN_SYS_CFG_BUSMON_16 (0x00030000)
  75. #define NETARM_GEN_SYS_CFG_USER_EN (0x00008000)
  76. #define NETARM_GEN_SYS_CFG_BUSER_EN (0x00004000)
  77. #define NETARM_GEN_SYS_CFG_BUSARB_INT (0x00002000)
  78. #define NETARM_GEN_SYS_CFG_BUSARB_EXT (0x00000000)
  79. #define NETARM_GEN_SYS_CFG_DMATST (0x00001000)
  80. #define NETARM_GEN_SYS_CFG_TEALAST (0x00000800)
  81. #define NETARM_GEN_SYS_CFG_ALIGN_ABORT (0x00000400)
  82. #define NETARM_GEN_SYS_CFG_CACHE_EN (0x00000200)
  83. #define NETARM_GEN_SYS_CFG_WRI_BUF_EN (0x00000100)
  84. #define NETARM_GEN_SYS_CFG_CACHE_INIT (0x00000080)
  85. /* PLL Control Register ( 0xFFB0_0008 ) */
  86. #define NETARM_GEN_PLL_CTL_PLLCNT_MASK (0x0F000000)
  87. #define NETARM_GEN_PLL_CTL_PLLCNT(x) (((x)<<24) & \
  88. NETARM_GEN_PLL_CTL_PLLCNT_MASK)
  89. /* Defaults for POLTST and ICP Fields in PLL CTL */
  90. #define NETARM_GEN_PLL_CTL_OUTDIV(x) (x)
  91. #define NETARM_GEN_PLL_CTL_INDIV(x) ((x)<<6)
  92. #define NETARM_GEN_PLL_CTL_POLTST_DEF (0x00000E00)
  93. #define NETARM_GEN_PLL_CTL_ICP_DEF (0x0000003C)
  94. /* Software Service Register ( 0xFFB0_000C ) */
  95. #define NETARM_GEN_SW_SVC_RESETA (0x123)
  96. #define NETARM_GEN_SW_SVC_RESETB (0x321)
  97. /* PORT C Register ( 0xFFB0_0028 ) */
  98. #define NETARM_GEN_PORT_MODE(x) (((x)<<24) + (0xFF00))
  99. #define NETARM_GEN_PORT_DIR(x) (((x)<<16) + (0xFF00))
  100. /* Timer Registers ( 0xFFB0_0010 0xFFB0_0018 ) */
  101. #define NETARM_GEN_TCTL_ENABLE (0x80000000)
  102. #define NETARM_GEN_TCTL_INT_ENABLE (0x40000000)
  103. #define NETARM_GEN_TCTL_USE_IRQ (0x00000000)
  104. #define NETARM_GEN_TCTL_USE_FIQ (0x20000000)
  105. #define NETARM_GEN_TCTL_USE_PRESCALE (0x10000000)
  106. #define NETARM_GEN_TCTL_INIT_COUNT(x) ((x) & 0x1FF)
  107. #define NETARM_GEN_TSTAT_INTPEN (0x40000000)
  108. #define NETARM_GEN_TSTAT_CTC_MASK (0x000001FF)
  109. /* prescale to msecs conversion */
  110. #define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 20480 ) * ( 0x1FF - ( (x) & \
  111. NETARM_GEN_TSTAT_CTC_MASK ) + \
  112. 1 ) ) / (NETARM_XTAL_FREQ/1000) )
  113. #define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(20480*(x)))-1) & \
  114. NETARM_GEN_TSTAT_CTC_MASK ) | \
  115. NETARM_GEN_TCTL_USE_PRESCALE )
  116. #if 0
  117. /* ifdef CONFIG_NETARM_PLL_BYPASS else */
  118. #error test
  119. #define NETARM_GEN_TIMER_MSEC_P(x) ( ( ( 4096 ) * ( 0x1FF - ( (x) & \
  120. NETARM_GEN_TSTAT_CTC_MASK ) + \
  121. 1 ) ) / (NETARM_XTAL_FREQ/1000) )
  122. #define NETARM_GEN_TIMER_SET_HZ(x) ( ( ((NETARM_XTAL_FREQ/(4096*(x)))-1) & \
  123. NETARM_GEN_TSTAT_CTC_MASK ) | \
  124. NETARM_GEN_TCTL_USE_PRESCALE )
  125. #endif
  126. #endif