IxAtmTypes.h 11 KB

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  1. /**
  2. * @file IxAtmTypes.h
  3. *
  4. * @date 24-MAR-2002
  5. *
  6. * @brief This file contains Atm types common to a number of Atm components.
  7. *
  8. * @par
  9. * IXP400 SW Release version 2.0
  10. *
  11. * -- Copyright Notice --
  12. *
  13. * @par
  14. * Copyright 2001-2005, Intel Corporation.
  15. * All rights reserved.
  16. *
  17. * @par
  18. * SPDX-License-Identifier: BSD-3-Clause
  19. * @par
  20. * -- End of Copyright Notice --
  21. */
  22. /* ------------------------------------------------------
  23. Doxygen group definitions
  24. ------------------------------------------------------ */
  25. /**
  26. * @defgroup IxAtmTypes IXP400 ATM Types (IxAtmTypes)
  27. *
  28. * @brief The common set of types used in many Atm components
  29. *
  30. * @{ */
  31. #ifndef IXATMTYPES_H
  32. #define IXATMTYPES_H
  33. #include "IxNpeA.h"
  34. /**
  35. * @enum IxAtmLogicalPort
  36. *
  37. * @brief Logical Port Definitions :
  38. *
  39. * Only 1 port is available in SPHY configuration
  40. * 12 ports are enabled in MPHY configuration
  41. *
  42. */
  43. typedef enum
  44. {
  45. IX_UTOPIA_PORT_0 = 0, /**< Port 0 */
  46. #ifdef IX_NPE_MPHYMULTIPORT
  47. IX_UTOPIA_PORT_1, /**< Port 1 */
  48. IX_UTOPIA_PORT_2, /**< Port 2 */
  49. IX_UTOPIA_PORT_3, /**< Port 3 */
  50. IX_UTOPIA_PORT_4, /**< Port 4 */
  51. IX_UTOPIA_PORT_5, /**< Port 5 */
  52. IX_UTOPIA_PORT_6, /**< Port 6 */
  53. IX_UTOPIA_PORT_7, /**< Port 7 */
  54. IX_UTOPIA_PORT_8, /**< Port 8 */
  55. IX_UTOPIA_PORT_9, /**< Port 9 */
  56. IX_UTOPIA_PORT_10, /**< Port 10 */
  57. IX_UTOPIA_PORT_11, /**< Port 11 */
  58. #endif /* IX_NPE_MPHY */
  59. IX_UTOPIA_MAX_PORTS /**< Not a port - just a definition for the
  60. * maximum possible ports
  61. */
  62. } IxAtmLogicalPort;
  63. /**
  64. * @def IX_ATM_CELL_PAYLOAD_SIZE
  65. * @brief Size of a ATM cell payload
  66. */
  67. #define IX_ATM_CELL_PAYLOAD_SIZE (48)
  68. /**
  69. * @def IX_ATM_CELL_SIZE
  70. * @brief Size of a ATM cell, including header
  71. */
  72. #define IX_ATM_CELL_SIZE (53)
  73. /**
  74. * @def IX_ATM_CELL_SIZE_NO_HEC
  75. * @brief Size of a ATM cell, excluding HEC byte
  76. */
  77. #define IX_ATM_CELL_SIZE_NO_HEC (IX_ATM_CELL_SIZE - 1)
  78. /**
  79. * @def IX_ATM_OAM_CELL_SIZE_NO_HEC
  80. * @brief Size of a OAM cell, excluding HEC byte
  81. */
  82. #define IX_ATM_OAM_CELL_SIZE_NO_HEC IX_ATM_CELL_SIZE_NO_HEC
  83. /**
  84. * @def IX_ATM_AAL0_48_CELL_PAYLOAD_SIZE
  85. * @brief Size of a AAL0 48 Cell payload
  86. */
  87. #define IX_ATM_AAL0_48_CELL_PAYLOAD_SIZE IX_ATM_CELL_PAYLOAD_SIZE
  88. /**
  89. * @def IX_ATM_AAL5_CELL_PAYLOAD_SIZE
  90. * @brief Size of a AAL5 Cell payload
  91. */
  92. #define IX_ATM_AAL5_CELL_PAYLOAD_SIZE IX_ATM_CELL_PAYLOAD_SIZE
  93. /**
  94. * @def IX_ATM_AAL0_52_CELL_SIZE_NO_HEC
  95. * @brief Size of a AAL0 52 Cell, excluding HEC byte
  96. */
  97. #define IX_ATM_AAL0_52_CELL_SIZE_NO_HEC IX_ATM_CELL_SIZE_NO_HEC
  98. /**
  99. * @def IX_ATM_MAX_VPI
  100. * @brief Maximum value of an ATM VPI
  101. */
  102. #define IX_ATM_MAX_VPI 255
  103. /**
  104. * @def IX_ATM_MAX_VCI
  105. * @brief Maximum value of an ATM VCI
  106. */
  107. #define IX_ATM_MAX_VCI 65535
  108. /**
  109. * @def IX_ATM_MAX_NUM_AAL_VCS
  110. * @brief Maximum number of active AAL5/AAL0 VCs in the system
  111. */
  112. #define IX_ATM_MAX_NUM_AAL_VCS 32
  113. /**
  114. * @def IX_ATM_MAX_NUM_VC
  115. * @brief Maximum number of active AAL5/AAL0 VCs in the system
  116. * The use of this macro is depreciated, it is retained for
  117. * backward compatiblity. For current software release
  118. * and beyond the define IX_ATM_MAX_NUM_AAL_VC should be used.
  119. */
  120. #define IX_ATM_MAX_NUM_VC IX_ATM_MAX_NUM_AAL_VCS
  121. /**
  122. * @def IX_ATM_MAX_NUM_OAM_TX_VCS
  123. * @brief Maximum number of active OAM Tx VCs in the system,
  124. * 1 OAM VC per port
  125. */
  126. #define IX_ATM_MAX_NUM_OAM_TX_VCS IX_UTOPIA_MAX_PORTS
  127. /**
  128. * @def IX_ATM_MAX_NUM_OAM_RX_VCS
  129. * @brief Maximum number of active OAM Rx VCs in the system,
  130. * 1 OAM VC shared accross all ports
  131. */
  132. #define IX_ATM_MAX_NUM_OAM_RX_VCS 1
  133. /**
  134. * @def IX_ATM_MAX_NUM_AAL_OAM_TX_VCS
  135. * @brief Maximum number of active AAL5/AAL0/OAM Tx VCs in the system
  136. */
  137. #define IX_ATM_MAX_NUM_AAL_OAM_TX_VCS (IX_ATM_MAX_NUM_AAL_VCS + IX_ATM_MAX_NUM_OAM_TX_VCS)
  138. /**
  139. * @def IX_ATM_MAX_NUM_AAL_OAM_RX_VCS
  140. * @brief Maximum number of active AAL5/AAL0/OAM Rx VCs in the system
  141. */
  142. #define IX_ATM_MAX_NUM_AAL_OAM_RX_VCS (IX_ATM_MAX_NUM_AAL_VCS + IX_ATM_MAX_NUM_OAM_RX_VCS)
  143. /**
  144. * @def IX_ATM_IDLE_CELLS_CONNID
  145. * @brief VC Id used to indicate idle cells in the returned schedule table.
  146. */
  147. #define IX_ATM_IDLE_CELLS_CONNID 0
  148. /**
  149. * @def IX_ATM_CELL_HEADER_VCI_GET
  150. * @brief get the VCI field from a cell header
  151. */
  152. #define IX_ATM_CELL_HEADER_VCI_GET(cellHeader) \
  153. (((cellHeader) >> 4) & IX_OAM_VCI_BITS_MASK);
  154. /**
  155. * @def IX_ATM_CELL_HEADER_VPI_GET
  156. * @brief get the VPI field from a cell header
  157. */
  158. #define IX_ATM_CELL_HEADER_VPI_GET(cellHeader) \
  159. (((cellHeader) >> 20) & IX_OAM_VPI_BITS_MASK);
  160. /**
  161. * @def IX_ATM_CELL_HEADER_PTI_GET
  162. * @brief get the PTI field from a cell header
  163. */
  164. #define IX_ATM_CELL_HEADER_PTI_GET(cellHeader) \
  165. ((cellHeader) >> 1) & IX_OAM_PTI_BITS_MASK;
  166. /**
  167. * @typedef IxAtmCellHeader
  168. *
  169. * @brief ATM Cell Header, does not contain 4 byte HEC, added by NPE-A
  170. */
  171. typedef unsigned int IxAtmCellHeader;
  172. /**
  173. * @enum IxAtmServiceCategory
  174. *
  175. * @brief Enumerated type representing available ATM service categories.
  176. * For more informatoin on these categories, see "Traffic Management
  177. * Specification" v4.1, published by the ATM Forum -
  178. * http://www.atmforum.com
  179. */
  180. typedef enum
  181. {
  182. IX_ATM_CBR, /**< Constant Bit Rate */
  183. IX_ATM_RTVBR, /**< Real Time Variable Bit Rate */
  184. IX_ATM_VBR, /**< Variable Bit Rate */
  185. IX_ATM_UBR, /**< Unspecified Bit Rate */
  186. IX_ATM_ABR /**< Available Bit Rate (not supported) */
  187. } IxAtmServiceCategory;
  188. /**
  189. *
  190. * @enum IxAtmRxQueueId
  191. *
  192. * @brief Rx Queue Type for RX traffic
  193. *
  194. * IxAtmRxQueueId defines the queues involved for receiving data.
  195. *
  196. * There are two queues to facilitate prioritisation handling
  197. * and processing the 2 queues with different algorithms and
  198. * constraints
  199. *
  200. * e.g. : one queue can carry voice (or time-critical traffic), the
  201. * other queue can carry non-voice traffic
  202. *
  203. */
  204. typedef enum
  205. {
  206. IX_ATM_RX_A = 0, /**< RX queue A */
  207. IX_ATM_RX_B, /**< RX queue B */
  208. IX_ATM_MAX_RX_STREAMS /**< Maximum number of RX streams */
  209. } IxAtmRxQueueId;
  210. /**
  211. * @brief Structure describing an ATM traffic contract for a Virtual
  212. * Connection (VC).
  213. *
  214. * Structure is used to specify the requested traffic contract for a
  215. * VC to the IxAtmSch component using the @ref ixAtmSchVcModelSetup
  216. * interface.
  217. *
  218. * These parameters are defined by the ATM forum working group
  219. * (http://www.atmforum.com).
  220. *
  221. * @note Typical values for a voice channel 64 Kbit/s
  222. * - atmService @a IX_ATM_RTVBR
  223. * - pcr 400 (include IP overhead, and AAL5 trailer)
  224. * - cdvt 5000000 (5 ms)
  225. * - scr = pcr
  226. *
  227. * @note Typical values for a data channel 800 Kbit/s
  228. * - atmService @a IX_ATM_UBR
  229. * - pcr 1962 (include IP overhead, and AAL5 trailer)
  230. * - cdvt 5000000 (5 ms)
  231. *
  232. */
  233. typedef struct
  234. {
  235. IxAtmServiceCategory atmService; /**< ATM service category */
  236. unsigned pcr; /**< Peak Cell Rate - cells per second */
  237. unsigned cdvt; /**< Cell Delay Variation Tolerance - in nanoseconds */
  238. unsigned scr; /**< Sustained Cell Rate - cells per second */
  239. unsigned mbs; /**< Max Burst Size - cells */
  240. unsigned mcr; /**< Minimum Cell Rate - cells per second */
  241. unsigned mfs; /**< Max Frame Size - cells */
  242. } IxAtmTrafficDescriptor;
  243. /**
  244. * @typedef IxAtmConnId
  245. *
  246. * @brief ATM VC data connection identifier.
  247. *
  248. * This is is generated by IxAtmdAcc when a successful connection is
  249. * made on a VC. The is the ID by which IxAtmdAcc knows an active
  250. * VC and should be used in IxAtmdAcc API calls to reference a
  251. * specific VC.
  252. */
  253. typedef unsigned int IxAtmConnId;
  254. /**
  255. * @typedef IxAtmSchedulerVcId
  256. *
  257. * @brief ATM VC scheduling connection identifier.
  258. *
  259. * This id is generated and used by ATM Tx controller, generally
  260. * the traffic shaper (e.g. IxAtmSch). The IxAtmdAcc component
  261. * will request one of these Ids whenever a data connection on
  262. * a Tx VC is requested. This ID will be used in callbacks to
  263. * the ATM Transmission Ctrl s/w (e.g. IxAtmm) to reference a
  264. * particular VC.
  265. */
  266. typedef int IxAtmSchedulerVcId;
  267. /**
  268. * @typedef IxAtmNpeRxVcId
  269. *
  270. * @brief ATM Rx VC identifier used by the ATM Npe.
  271. *
  272. * This Id is generated by IxAtmdAcc when a successful data connection
  273. * is made on a rx VC.
  274. */
  275. typedef unsigned int IxAtmNpeRxVcId;
  276. /**
  277. * @brief ATM Schedule Table entry
  278. *
  279. * This IxAtmScheduleTableEntry is used by an ATM scheduler to inform
  280. * IxAtmdAcc about the data to transmit (in term of cells per VC)
  281. *
  282. * This structure defines
  283. * @li the number of cells to be transmitted (numberOfCells)
  284. * @li the VC connection to be used for transmission (connId).
  285. *
  286. * @note - When the connection Id value is IX_ATM_IDLE_CELLS_CONNID, the
  287. * corresponding number of idle cells will be transmitted to the hardware.
  288. *
  289. */
  290. typedef struct
  291. {
  292. IxAtmConnId connId; /**< connection Id
  293. *
  294. * Identifier of VC from which cells are to be transmitted.
  295. * When this valus is IX_ATM_IDLE_CELLS_CONNID, this indicates
  296. * that the system should transmit the specified number
  297. * of idle cells. Unknown connIds result in the transmission
  298. * idle cells.
  299. */
  300. unsigned int numberOfCells; /**< number of cells to transmit
  301. *
  302. * The number of contiguous cells to schedule from this VC
  303. * at this point. The valid range is from 1 to
  304. * @a IX_ATM_SCHEDULETABLE_MAXCELLS_PER_ENTRY. This
  305. * number can swap over mbufs and pdus. OverSchduling results
  306. * in the transmission of idle cells.
  307. */
  308. } IxAtmScheduleTableEntry;
  309. /**
  310. * @brief This structure defines a schedule table which gives details
  311. * on which data (from which VCs) should be transmitted for a
  312. * forthcoming period of time for a particular port and the
  313. * order in which that data should be transmitted.
  314. *
  315. * The schedule table consists of a series of entries each of which
  316. * will schedule one or more cells from a particular registered VC.
  317. * The total number of cells scheduled and the total number of
  318. * entries in the table are also indicated.
  319. *
  320. */
  321. typedef struct
  322. {
  323. unsigned tableSize; /**< Number of entries
  324. *
  325. * Indicates the total number of
  326. * entries in the table.
  327. */
  328. unsigned totalCellSlots; /**< Number of cells
  329. *
  330. * Indicates the total number of ATM
  331. * cells which are scheduled by all the
  332. * entries in the table.
  333. */
  334. IxAtmScheduleTableEntry *table; /**< Pointer to schedule entries
  335. *
  336. * Pointer to an array
  337. * containing tableSize entries
  338. */
  339. } IxAtmScheduleTable;
  340. #endif /* IXATMTYPES_H */
  341. /**
  342. * @} defgroup IxAtmTypes
  343. */