sam9x60.h 5.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Chip-specific header file for the SAM9X60 SoC.
  4. *
  5. * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries
  6. */
  7. #ifndef __SAM9X60_H__
  8. #define __SAM9X60_H__
  9. /*
  10. * Peripheral identifiers/interrupts.
  11. */
  12. #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller */
  13. #define ATMEL_ID_SYS 1 /* System Controller Interrupt */
  14. #define ATMEL_ID_PIOA 2 /* Parallel I/O Controller A */
  15. #define ATMEL_ID_PIOB 3 /* Parallel I/O Controller B */
  16. #define ATMEL_ID_PIOC 4 /* Parallel I/O Controller C */
  17. #define ATMEL_ID_FLEXCOM0 5 /* FLEXCOM 0 */
  18. #define ATMEL_ID_FLEXCOM1 6 /* FLEXCOM 1 */
  19. #define ATMEL_ID_FLEXCOM2 7 /* FLEXCOM 2 */
  20. #define ATMEL_ID_FLEXCOM3 8 /* FLEXCOM 3 */
  21. #define ATMEL_ID_FLEXCOM6 9 /* FLEXCOM 6 */
  22. #define ATMEL_ID_FLEXCOM7 10 /* FLEXCOM 7 */
  23. #define ATMEL_ID_FLEXCOM8 11 /* FLEXCOM 8 */
  24. #define ATMEL_ID_SDMMC0 12 /* SDMMC 0 */
  25. #define ATMEL_ID_FLEXCOM4 13 /* FLEXCOM 4 */
  26. #define ATMEL_ID_FLEXCOM5 14 /* FLEXCOM 5 */
  27. #define ATMEL_ID_FLEXCOM9 15 /* FLEXCOM 9 */
  28. #define ATMEL_ID_FLEXCOM10 16 /* FLEXCOM 10 */
  29. #define ATMEL_ID_TC01 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */
  30. #define ATMEL_ID_PWM 18 /* Pulse Width Modulation Controller */
  31. #define ATMEL_ID_ADC 19 /* ADC Controller */
  32. #define ATMEL_ID_XDMAC0 20 /* XDMA Controller 0 */
  33. #define ATMEL_ID_MATRIX 21 /* BUS Matrix */
  34. #define ATMEL_ID_UHPHS 22 /* USB Host High Speed */
  35. #define ATMEL_ID_UDPHS 23 /* USB Device High Speed */
  36. #define ATMEL_ID_EMAC0 24 /* Ethernet MAC 0 */
  37. #define ATMEL_ID_LCDC 25 /* LCD Controller */
  38. #define ATMEL_ID_SDMMC1 26 /* SDMMC 1 */
  39. #define ATMEL_ID_EMAC1 27 /* Ethernet MAC `1 */
  40. #define ATMEL_ID_SSC 28 /* Synchronous Serial Controller */
  41. #define ATMEL_ID_IRQ 31 /* Advanced Interrupt Controller */
  42. #define ATMEL_ID_TRNG 38 /* True Random Number Generator */
  43. #define ATMEL_ID_PIOD 44 /* Parallel I/O Controller D */
  44. #define ATMEL_ID_DBGU 47 /* Debug unit */
  45. /*
  46. * User Peripheral physical base addresses.
  47. */
  48. #define ATMEL_BASE_FLEXCOM4 0xf0000000
  49. #define ATMEL_BASE_FLEXCOM5 0xf0004000
  50. #define ATMEL_BASE_XDMA0 0xf0008000
  51. #define ATMEL_BASE_SSC 0xf0010000
  52. #define ATMEL_BASE_QSPI 0xf0014000
  53. #define ATMEL_BASE_CAN0 0xf8000000
  54. #define ATMEL_BASE_CAN1 0xf8004000
  55. #define ATMEL_BASE_TC0 0xf8008000
  56. #define ATMEL_BASE_TC1 0xf8008040
  57. #define ATMEL_BASE_TC2 0xf8008080
  58. #define ATMEL_BASE_TC3 0xf800c000
  59. #define ATMEL_BASE_TC4 0xf800c040
  60. #define ATMEL_BASE_TC5 0xf800c080
  61. #define ATMEL_BASE_FLEXCOM6 0xf8010000
  62. #define ATMEL_BASE_FLEXCOM7 0xf8014000
  63. #define ATMEL_BASE_FLEXCOM8 0xf8018000
  64. #define ATMEL_BASE_FLEXCOM0 0xf801c000
  65. #define ATMEL_BASE_FLEXCOM1 0xf8020000
  66. #define ATMEL_BASE_FLEXCOM2 0xf8024000
  67. #define ATMEL_BASE_FLEXCOM3 0xf8028000
  68. #define ATMEL_BASE_EMAC0 0xf802c000
  69. #define ATMEL_BASE_EMAC1 0xf8030000
  70. #define ATMEL_BASE_PWM 0xf8034000
  71. #define ATMEL_BASE_LCDC 0xf8038000
  72. #define ATMEL_BASE_UDPHS 0xf803c000
  73. #define ATMEL_BASE_FLEXCOM9 0xf8040000
  74. #define ATMEL_BASE_FLEXCOM10 0xf8044000
  75. #define ATMEL_BASE_ISI 0xf8048000
  76. #define ATMEL_BASE_ADC 0xf804c000
  77. #define ATMEL_BASE_SFR 0xf8050000
  78. #define ATMEL_BASE_SYS 0xffffc000
  79. /*
  80. * System Peripherals
  81. */
  82. #define ATMEL_BASE_MATRIX 0xffffde00
  83. #define ATMEL_BASE_PMECC 0xffffe000
  84. #define ATMEL_BASE_PMERRLOC 0xffffe600
  85. #define ATMEL_BASE_MPDDRC 0xffffe800
  86. #define ATMEL_BASE_SMC 0xffffea00
  87. #define ATMEL_BASE_SDRAMC 0xffffec00
  88. #define ATMEL_BASE_AIC 0xfffff100
  89. #define ATMEL_BASE_DBGU 0xfffff200
  90. #define ATMEL_BASE_PIOA 0xfffff400
  91. #define ATMEL_BASE_PIOB 0xfffff600
  92. #define ATMEL_BASE_PIOC 0xfffff800
  93. #define ATMEL_BASE_PIOD 0xfffffa00
  94. #define ATMEL_BASE_PMC 0xfffffc00
  95. #define ATMEL_BASE_RSTC 0xfffffe00
  96. #define ATMEL_BASE_SHDWC 0xfffffe10
  97. #define ATMEL_BASE_PIT 0xfffffe40
  98. #define ATMEL_BASE_GPBR 0xfffffe60
  99. #define ATMEL_BASE_RTC 0xfffffea8
  100. #define ATMEL_BASE_WDT 0xffffff80
  101. /*
  102. * Internal Memory.
  103. */
  104. #define ATMEL_BASE_ROM 0x00100000 /* Internal ROM base address */
  105. #define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */
  106. #define ATMEL_BASE_UDPHS_FIFO 0x00500000 /* USB Device HS controller */
  107. #define ATMEL_BASE_OHCI 0x00600000 /* USB Host controller (OHCI) */
  108. #define ATMEL_BASE_EHCI 0x00700000 /* USB Host controller (EHCI) */
  109. /*
  110. * External memory
  111. */
  112. #define ATMEL_BASE_CS0 0x10000000
  113. #define ATMEL_BASE_CS1 0x20000000
  114. #define ATMEL_BASE_CS2 0x30000000
  115. #define ATMEL_BASE_CS3 0x40000000
  116. #define ATMEL_BASE_CS4 0x50000000
  117. #define ATMEL_BASE_CS5 0x60000000
  118. #define ATMEL_BASE_SDMMC0 0x80000000
  119. #define ATMEL_BASE_SDMMC1 0x90000000
  120. /* 9x60 series chip id definitions */
  121. #define ARCH_ID_SAM9X60 0x819b35a0
  122. #define ARCH_ID_VERSION_MASK 0x1f
  123. #define ARCH_EXID_SAM9X60 0x00000000
  124. #define cpu_is_sam9x60() (get_chip_id() == ARCH_ID_SAM9X60)
  125. /*
  126. * Cpu Name
  127. */
  128. #define ATMEL_CPU_NAME get_cpu_name()
  129. /* Timer */
  130. #define CONFIG_SYS_TIMER_COUNTER 0xfffffe4c
  131. /*
  132. * Other misc defines
  133. */
  134. #define ATMEL_PIO_PORTS 4
  135. #define CPU_HAS_PCR
  136. #define CPU_NO_PLLB
  137. #define PLL_ID_PLLA 0
  138. #define PLL_ID_UPLL 1
  139. /*
  140. * PMECC table in ROM
  141. */
  142. #define ATMEL_PMECC_INDEX_OFFSET_512 0x8000
  143. #define ATMEL_PMECC_INDEX_OFFSET_1024 0x10000
  144. /*
  145. * SAM9X60 specific prototypes
  146. */
  147. #ifndef __ASSEMBLY__
  148. unsigned int get_chip_id(void);
  149. unsigned int get_extension_chip_id(void);
  150. unsigned int has_emac1(void);
  151. unsigned int has_emac0(void);
  152. unsigned int has_lcdc(void);
  153. char *get_cpu_name(void);
  154. #endif
  155. #endif