at91sam9263_matrix.h 1.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263_matrix.h]
  4. *
  5. * Copyright (C) 2006 Atmel Corporation.
  6. *
  7. * Memory Controllers (MATRIX, EBI) - System peripherals registers.
  8. * Based on AT91SAM9263 datasheet revision B (Preliminary).
  9. */
  10. #ifndef AT91SAM9263_MATRIX_H
  11. #define AT91SAM9263_MATRIX_H
  12. #ifndef __ASSEMBLY__
  13. /*
  14. * This struct defines access to the matrix' maximum of
  15. * 16 masters and 16 slaves.
  16. * Note: not all masters/slaves are available
  17. */
  18. struct at91_matrix {
  19. u32 mcfg[16]; /* Master Configuration Registers */
  20. u32 scfg[16]; /* Slave Configuration Registers */
  21. u32 pras[16][2]; /* Priority Assignment Slave Registers */
  22. u32 mrcr; /* Master Remap Control Register */
  23. u32 filler[0x06];
  24. u32 ebicsa; /* EBI Chip Select Assignment Register */
  25. };
  26. #endif /* __ASSEMBLY__ */
  27. #define AT91_MATRIX_ULBT_INFINITE (0 << 0)
  28. #define AT91_MATRIX_ULBT_SINGLE (1 << 0)
  29. #define AT91_MATRIX_ULBT_FOUR (2 << 0)
  30. #define AT91_MATRIX_ULBT_EIGHT (3 << 0)
  31. #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
  32. #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
  33. #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
  34. #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
  35. #define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18
  36. #define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
  37. #define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
  38. #define AT91_MATRIX_M0PR_SHIFT 0
  39. #define AT91_MATRIX_M1PR_SHIFT 4
  40. #define AT91_MATRIX_M2PR_SHIFT 8
  41. #define AT91_MATRIX_M3PR_SHIFT 12
  42. #define AT91_MATRIX_M4PR_SHIFT 16
  43. #define AT91_MATRIX_M5PR_SHIFT 20
  44. #define AT91_MATRIX_RCB0 (1 << 0)
  45. #define AT91_MATRIX_RCB1 (1 << 1)
  46. #define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
  47. #define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
  48. #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
  49. #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
  50. #define AT91_MATRIX_DBPUC (1 << 8)
  51. #define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
  52. #define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
  53. #endif