cpu.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2010
  4. * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
  5. * (C) Copyright 2009
  6. * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  7. * (C) Copyright 2013
  8. * Bo Shen <voice.shen@atmel.com>
  9. */
  10. #include <common.h>
  11. #include <cpu_func.h>
  12. #include <init.h>
  13. #include <vsprintf.h>
  14. #include <asm/io.h>
  15. #include <asm/arch/hardware.h>
  16. #include <asm/arch/at91_pit.h>
  17. #include <asm/arch/at91_gpbr.h>
  18. #include <asm/arch/clk.h>
  19. #ifndef CONFIG_SYS_AT91_MAIN_CLOCK
  20. #define CONFIG_SYS_AT91_MAIN_CLOCK 0
  21. #endif
  22. int arch_cpu_init(void)
  23. {
  24. return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
  25. }
  26. void arch_preboot_os(void)
  27. {
  28. #if (IS_ENABLED(CONFIG_ATMEL_PIT_TIMER))
  29. ulong cpiv;
  30. at91_pit_t *pit = (at91_pit_t *)ATMEL_BASE_PIT;
  31. cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
  32. /*
  33. * Disable PITC
  34. * Add 0x1000 to current counter to stop it faster
  35. * without waiting for wrapping back to 0
  36. */
  37. writel(cpiv + 0x1000, &pit->mr);
  38. #endif
  39. }
  40. #if defined(CONFIG_DISPLAY_CPUINFO)
  41. int print_cpuinfo(void)
  42. {
  43. char buf[32];
  44. printf("CPU: %s\n", get_cpu_name());
  45. printf("Crystal frequency: %8s MHz\n",
  46. strmhz(buf, get_main_clk_rate()));
  47. printf("CPU clock : %8s MHz\n",
  48. strmhz(buf, get_cpu_clk_rate()));
  49. printf("Master clock : %8s MHz\n",
  50. strmhz(buf, get_mck_clk_rate()));
  51. return 0;
  52. }
  53. #endif
  54. void enable_caches(void)
  55. {
  56. icache_enable();
  57. dcache_enable();
  58. }
  59. #define ATMEL_CHIPID_CIDR_VERSION 0x1f
  60. unsigned int get_chip_id(void)
  61. {
  62. return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
  63. }
  64. unsigned int get_extension_chip_id(void)
  65. {
  66. return readl(ATMEL_CHIPID_EXID);
  67. }