README.mvsmr 1.5 KB

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  1. Matrix Vision mvSMR
  2. -------------------
  3. 1. Board Description
  4. The mvSMR is a 75x130mm single image processing board used
  5. in automation. Power Supply is 24VDC.
  6. 2 System Components
  7. 2.1 CPU
  8. Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB.
  9. 64MB DDR-I @ 133MHz.
  10. 8 MByte Nor Flash on local bus.
  11. 2 serial ports. Console running on ttyS0 @ 115200 8N1.
  12. 2.2 PCI
  13. PCI clock fixed at 33MHz due to old'n'slow Xilinx PCI core.
  14. 2.3 FPGA
  15. Xilinx Spartan-3 XC3S200 with PCI DMA engine.
  16. Connects to Matrix Vision specific CCD/CMOS sensor interface.
  17. 2.4 I2C
  18. EEPROM @ 0xA0 for vendor specifics.
  19. image sensor interface (slave addresses depend on sensor)
  20. 3 Flash layout.
  21. reset vector is 0x00000100, i.e. "LOWBOOT".
  22. FF800000 u-boot
  23. FF806000 u-boot script image
  24. FF808000 u-boot environment
  25. FF840000 FPGA raw bit file
  26. FF880000 root FS
  27. FFF00000 kernel
  28. 4 Booting
  29. On startup the bootscript @ FF806000 is executed. This script can be
  30. exchanged easily. Default boot mode is "boot from flash", i.e. system
  31. works stand-alone.
  32. This behaviour depends on some environment variables :
  33. "netboot" : yes ->try dhcp/bootp and boot from network.
  34. A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for
  35. DHCP server configuration, e.g. to provide different images to
  36. different devices.
  37. During netboot the system tries to get 3 image files:
  38. 1. Kernel - name + data is given during BOOTP.
  39. 2. Initrd - name is stored in "initrd_name"
  40. Fallback files are the flash versions.