README.mvblm7 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384
  1. Matrix Vision mvBlueLYNX-M7 (mvBL-M7)
  2. -------------------------------------
  3. 1. Board Description
  4. The mvBL-M7 is a 120x120mm single board computing platform
  5. with strong focus on stereo image processing applications.
  6. Power Supply is either VDC 12-48V or Pover over Ethernet (PoE)
  7. on any port (requires add-on board).
  8. 2 System Components
  9. 2.1 CPU
  10. Freescale MPC8343VRAGDB CPU running at 400MHz core and 266MHz csb.
  11. 512MByte DDR-II memory @ 133MHz.
  12. 8 MByte Nor Flash on local bus.
  13. 2 Vitesse VSC8601 RGMII ethernet Phys.
  14. 1 USB host controller over ULPI I/F.
  15. 2 serial ports. Console running on ttyS0 @ 115200 8N1.
  16. 1 SD-Card slot connected to SPI.
  17. System configuration (HRCW) is taken from I2C EEPROM.
  18. 2.2 PCI
  19. A miniPCI Type-III socket is present. PCI clock fixed at 66MHz.
  20. 2.3 FPGA
  21. Altera Cyclone-II EP2C20/35 with PCI DMA engines.
  22. Connects to dual Matrix Vision specific CCD/CMOS sensor interfaces.
  23. Utilizes another 256MB DDR-II memory and 32-128MB Nand Flash.
  24. 2.3.1 I/O @ FPGA
  25. 2x8 Outputs : Infineon High-Side Switches to Main Supply.
  26. 2x8 Inputs : Programmable input threshold + trigger capabilities
  27. 2 dedicated flash interfaces for illuminator boards.
  28. Cross trigger for chaining several boards.
  29. 2.4 I2C
  30. Bus1:
  31. MAX5381 DAC @ 0x60 for 1st digital input threshold.
  32. LM75 @ 0x90 for temperature monitoring.
  33. EEPROM @ 0xA0 for system setup (HRCW etc.) + vendor specifics.
  34. 1st image sensor interface (slave addresses depend on sensor)
  35. Bus2:
  36. MAX5381 DAC @ 0x60 for 2nd digital input threshold.
  37. 2nd image sensor interface (slave addresses depend on sensor)
  38. 3 Flash layout.
  39. reset vector is 0xFFF00100, i.e. "HIGHBOOT".
  40. FF800000 environment
  41. FF802000 redundant environment
  42. FF804000 u-boot script image
  43. FF806000 redundant u-boot script image
  44. FF808000 device tree blob
  45. FF80A000 redundant device tree blob
  46. FF80C000 tbd.
  47. FF80E000 tbd.
  48. FF810000 kernel
  49. FFC00000 root FS
  50. FFF00000 u-boot
  51. FFF80000 FPGA raw bit file
  52. mtd partitions are propagated to linux kernel via device tree blob.
  53. 4 Booting
  54. On startup the bootscript @ FF804000 is executed. This script can be
  55. exchanged easily. Default boot mode is "boot from flash", i.e. system
  56. works stand-alone.
  57. This behaviour depends on some environment variables :
  58. "netboot" : yes ->try dhcp/bootp and boot from network.
  59. A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for
  60. DHCP server configuration, e.g. to provide different images to
  61. different devices.
  62. During netboot the system tries to get 3 image files:
  63. 1. Kernel - name + data is given during BOOTP.
  64. 2. Initrd - name is stored in "initrd_name"
  65. 3. device tree blob - name is stored in "dtb_name"
  66. Fallback files are the flash versions.