README.mpc85xxads 10 KB

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  1. Motorola MPC8540ADS and MPC8560ADS board
  2. Created 10/15/03 Xianghua Xiao
  3. Updated 13-July-2004 Jon Loeliger
  4. -----------------------------------------
  5. 0. Toolchain
  6. The Binutils in current ELDK toolchain will not support MPC85xx
  7. chip. You need to use binutils-2.14.tar.bz2 (or newer) from
  8. http://ftp.gnu.org/gnu/binutils.
  9. The 8540/8560 ADS code base is known to compile using:
  10. gcc (GCC) 3.2.2 20030217 (Yellow Dog Linux 3.0 3.2.2-2a)
  11. 1. SWITCH SETTINGS & JUMPERS
  12. 1.0 Nomenclature
  13. For some reason, the HW designers describe the switch settings
  14. in terms of 0 and 1, and then map that to physical switches where
  15. the label "On" refers to logic 0 and "Off" (unlabeled) is logic 1.
  16. Luckily, we're SW types and virtual settings are handled daily.
  17. The switches for the Rev A board are numbered differently than
  18. for the Pilot board. Oh yeah.
  19. Switch bits are numbered 1 through, like, 4 6 8 or 10, but the
  20. bits may contribute to signals that are numbered based at 0,
  21. and some of those signals may be high-bit-number-0 too. Heed
  22. well the names and labels and do not get confused.
  23. "Off" == 1
  24. "On" == 0
  25. SW18 is switch 18 as silk-screened onto the board.
  26. SW4[8] is the bit labeled 8 on Switch 4.
  27. SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2
  28. SW3[7:1] refers to bits labeled 7 through 1 in order on switch 3
  29. 1.1 For the MPC85xxADS Pilot Board
  30. First, make sure the board default setting is consistent with the document
  31. shipped with your board. Then apply the following changes:
  32. SW3[1-6]="all OFF" (boot from 32bit flash, no boot sequence is used)
  33. SW10[2-6]="all OFF" (turn on CPM SCC for serial port,works for 8540/8560)
  34. SW11[2]='OFF for 8560, ON for 8540' (toggle 8540.8560 mode)
  35. SW11[7]='ON' (rev2), 'OFF' (rev1)
  36. SW4[7-8]="OFF OFF" (enable serial ports,I'm using the top serial connector)
  37. SW22[1-4]="OFF OFF ON OFF"
  38. SW5[1-10[="ON ON OFF OFF OFF OFF OFF OFF OFF OFF"
  39. J1 = "Enable Prog" (Make sure your flash is programmable for development)
  40. If you want to test PCI functionality with a 33Mhz PCI card, you will
  41. have to change the system clock from the default 66Mhz to 33Mhz by
  42. setting SW15[1]="OFF" and SW17[8]="OFF". After that you may also need
  43. double your platform clock(SW6) because the system clock is now only
  44. half of its original value. For example, if at 66MHz your system
  45. clock showed SW6[0:1] = 01, then at 33MHz SW6[0:1] it should be 10.
  46. SW17[8] ------+ SW6
  47. SW15[1] ----+ | [0:1]
  48. V V V V
  49. 33MHz 1 1 1 0
  50. 66MHz 0 0 0 1
  51. Hmmm... That SW6 setting description is incomplete but it works.
  52. 1.3 For the MPC85xxADS Rev A Board
  53. As shipped, the board should be a 33MHz PCI bus with a CPU Clock
  54. rate of 825 +/- fuzz:
  55. Clocks: CPU: 825 MHz, CCB: 330 MHz, DDR: 165 MHz, LBC: 82 MHz
  56. For 33MHz PCI, the switch settings should be like this:
  57. SW18[7:1] = 0100001 = M==33 => 33MHz
  58. SW18[8] = 1 => PWD Divider == 16
  59. SW16[1:2] = 11 => N == 16 as PWD==1
  60. Use the magical formula:
  61. Fout (MHz) = 16 * M / N = 16 * 33 / 16 = 33 MHz
  62. SW7[1:4] = 1010 = 10 => 10 x 33 = 330 CCB Sysclk
  63. SW7[5:6] = 01 => 5:2 x 330 = 825 Core clock
  64. For 66MHz PCI, the switch settings should be like this:
  65. SW18[7:1] = 0100001 = M==33 => 33MHz
  66. SW18[8] = 0 => PWD Divider == 1
  67. SW16[1:2] = 01 => N == 8 as PWD == 0
  68. Use the magical formula:
  69. Fout (MHz) = 16 * M / N = 16 * 33 / 8 = 66 MHz
  70. SW7[1:4] = 0101 = 5 => 5 x 66 = 330 CCB Sysclk
  71. SW7[5:6] = 01 => 5:2 x 330 = 825 Core clock
  72. In order to use PCI-X (only in the first PCI slot. The one with
  73. the RIO connector), you need to set SW1[4] (config) to 1 (off).
  74. Also, configure the board to run PCI at 66 MHz.
  75. 2. MEMORY MAP TO WORK WITH LINUX KERNEL
  76. 2.1. For the initial bringup, we adopted a consistent memory scheme
  77. between u-boot and linux kernel, you can customize it based on your
  78. system requirements:
  79. 0x0000_0000 0x7fff_ffff DDR 2G
  80. 0x8000_0000 0x9fff_ffff PCI MEM 512M
  81. 0xc000_0000 0xdfff_ffff Rapid IO 512M
  82. 0xe000_0000 0xe00f_ffff CCSR 1M
  83. 0xe200_0000 0xe2ff_ffff PCI IO 16M
  84. 0xf000_0000 0xf7ff_ffff SDRAM 128M
  85. 0xf800_0000 0xf80f_ffff BCSR 1M
  86. 0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
  87. 2.2 We are submitting Linux kernel patches for MPC8540 and MPC8560. You
  88. can download them from linuxppc-2.4 public source. Please make sure the
  89. kernel's ppcboot.h is consistent with U-Boot's u-boot.h. You can use two
  90. default configuration files as your starting points to configure the
  91. kernel:
  92. arch/powerpc/configs/mpc8540_ads_defconfig
  93. arch/powerpc/configs/mpc8560_ads_defconfig
  94. 3. DEFINITIONS AND COMPILATION
  95. 3.1 Explanation on NEW definitions in:
  96. include/configs/MPC8540ADS.h
  97. include/configs/MPC8560ADS.h
  98. CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, AMCC 440, etc)
  99. CONFIG_E500 BOOKE e500 family(Motorola)
  100. CONFIG_MPC85xx MPC8540,MPC8560 and their derivatives
  101. CONFIG_MPC8540 MPC8540 specific
  102. CONFIG_MPC8540ADS MPC8540ADS board specific
  103. CONFIG_MPC8560ADS MPC8560ADS board specific
  104. CONFIG_TSEC_ENET Use on-chip 10/100/1000 ethernet for networking
  105. CONFIG_SPD_EEPROM Use SPD EEPROM for DDR auto configuration, you can
  106. also manual config the DDR after undef this
  107. definition.
  108. CONFIG_DDR_ECC only for ECC DDR module
  109. CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN DLL fix on some ADS boards needed
  110. for more stability.
  111. CONFIG_HAS_FEC If an FEC is on chip, set to 1, else 0.
  112. Other than the above definitions, the rest in the config files are
  113. straightforward.
  114. 3.2 Compilation
  115. Assuming you're using BASH shell:
  116. export CROSS_COMPILE=your-cross-compile-prefix
  117. cd u-boot
  118. make distclean
  119. make MPC8560ADS_config (or make MPC8540ADS_config)
  120. make
  121. 4. Notes:
  122. 4.1 When connecting with kermit, the following commands must be present.in
  123. your .kermrc file. These are especially important when booting as
  124. MPC8560, as the serial console will not work without them:
  125. set speed 115200
  126. set carrier-watch off
  127. set handshake none
  128. set flow-control none
  129. robust
  130. 4.2 Sometimes after U-Boot is up, the 'tftp' won't work well with TSEC
  131. ethernet. If that happens, you can try the following steps to make
  132. network work:
  133. MPC8560ADS>tftp 1000000 pImage
  134. (if it hangs, use Ctrl-C to quit)
  135. MPC8560ADS>nm fdf24524
  136. >0
  137. >1
  138. >. (to quit this memory operation)
  139. MPC8560ADS>tftp 1000000 pImage
  140. 4.3 If you're one of the early developers using the Rev1 8540/8560 chips,
  141. please use U-Boot 1.0.0, as the newer silicon will only support Rev2
  142. and future revisions of 8540/8560.
  143. 4.4 Reflash U-boot Image using U-boot
  144. tftp 10000 u-boot.bin
  145. protect off fff80000 ffffffff
  146. erase fff80000 ffffffff
  147. cp.b 10000 fff80000 80000
  148. 4.5 Reflash U-Boot with a BDI-2000
  149. BDI> erase 0xFFF80000 0x4000 0x20
  150. BDI> prog 0xfff80000 u-boot.bin.8560ads
  151. BDI> verify
  152. 5. Screen dump MPC8540ADS board
  153. U-Boot 1.1.2(pq3-20040707-0) (Jul 6 2004 - 17:34:25)
  154. Freescale PowerPC
  155. Core: E500, Version: 2.0, (0x80200020)
  156. System: 8540, Version: 2.0, (0x80300020)
  157. Clocks: CPU: 825 MHz, CCB: 330 MHz, DDR: 165 MHz, LBC: 82 MHz
  158. L1 D-cache 32KB, L1 I-cache 32KB enabled.
  159. Board: ADS
  160. PCI1: 32 bit, 66 MHz (compiled)
  161. I2C: ready
  162. DRAM: Initializing
  163. SDRAM: 64 MB
  164. DDR: 256 MB
  165. FLASH: 16 MB
  166. L2 cache enabled: 256KB
  167. *** Warning - bad CRC, using default environment
  168. In: serial
  169. Out: serial
  170. Err: serial
  171. Net: MOTO ENET0: PHY is Marvell 88E1011S (1410c62)
  172. MOTO ENET1: PHY is Marvell 88E1011S (1410c62)
  173. MOTO ENET2: PHY is Davicom DM9161E (181b881)
  174. MOTO ENET0, MOTO ENET1, MOTO ENET2
  175. Hit any key to stop autoboot: 0
  176. =>
  177. => fli
  178. Bank # 1: Intel 28F640J3A (64 Mbit, 64 x 128K)
  179. Size: 16 MB in 64 Sectors
  180. Sector Start Addresses:
  181. FF000000 FF040000 FF080000 FF0C0000 FF100000
  182. FF140000 FF180000 FF1C0000 FF200000 FF240000
  183. FF280000 FF2C0000 FF300000 FF340000 FF380000
  184. FF3C0000 FF400000 FF440000 FF480000 FF4C0000
  185. FF500000 FF540000 FF580000 FF5C0000 FF600000
  186. FF640000 FF680000 FF6C0000 FF700000 FF740000
  187. FF780000 FF7C0000 FF800000 FF840000 FF880000
  188. FF8C0000 FF900000 FF940000 FF980000 FF9C0000
  189. FFA00000 FFA40000 FFA80000 FFAC0000 FFB00000
  190. FFB40000 FFB80000 FFBC0000 FFC00000 FFC40000
  191. FFC80000 FFCC0000 FFD00000 FFD40000 FFD80000
  192. FFDC0000 FFE00000 FFE40000 FFE80000 FFEC0000
  193. FFF00000 FFF40000 FFF80000 (RO) FFFC0000 (RO)
  194. => bdinfo
  195. memstart = 0x00000000
  196. memsize = 0x10000000
  197. flashstart = 0xFF000000
  198. flashsize = 0x01000000
  199. flashoffset = 0x00000000
  200. sramstart = 0x00000000
  201. sramsize = 0x00000000
  202. immr_base = 0xE0000000
  203. bootflags = 0xE4013F80
  204. intfreq = 825 MHz
  205. busfreq = 330 MHz
  206. ethaddr = 00:E0:0C:00:00:FD
  207. eth1addr = 00:E0:0C:00:01:FD
  208. eth2addr = 00:E0:0C:00:02:FD
  209. IP addr = 192.168.1.253
  210. baudrate = 115200 bps
  211. => printenv
  212. bootcmd=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;bootm $loadaddr
  213. ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;bootm $loadaddr $ramdiskaddr
  214. nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;bootm $loadaddr
  215. bootdelay=10
  216. baudrate=115200
  217. loads_echo=1
  218. ethaddr=00:E0:0C:00:00:FD
  219. eth1addr=00:E0:0C:00:01:FD
  220. eth2addr=00:E0:0C:00:02:FD
  221. ipaddr=192.168.1.253
  222. serverip=192.168.1.1
  223. rootpath=/nfsroot
  224. gatewayip=192.168.1.1
  225. netmask=255.255.255.0
  226. hostname=unknown
  227. bootfile=your.uImage
  228. loadaddr=200000
  229. netdev=eth0
  230. consoledev=ttyS0
  231. ramdiskaddr=400000
  232. ramdiskfile=your.ramdisk.u-boot
  233. stdin=serial
  234. stdout=serial
  235. stderr=serial
  236. ethact=MOTO ENET0
  237. Environment size: 1020/8188 bytes