yellowstone.h 11 KB

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  1. /*
  2. *
  3. * See file CREDITS for list of people who contributed to this
  4. * project.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation; either version 2 of
  9. * the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19. * MA 02111-1307 USA
  20. */
  21. /************************************************************************
  22. * yellowstone.h - configuration for YELLOWSTONE board
  23. ***********************************************************************/
  24. #ifndef __CONFIG_H
  25. #define __CONFIG_H
  26. /*-----------------------------------------------------------------------
  27. * High Level Configuration Options
  28. *----------------------------------------------------------------------*/
  29. #define CONFIG_YELLOWSTONE 1 /* Board is BAMBOO */
  30. #define CONFIG_440_GR 1 /* Specific PPC440GR support */
  31. #define CONFIG_4xx 1 /* ... PPC4xx family */
  32. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
  33. #undef CFG_DRAM_TEST /* disable - takes long time! */
  34. #define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
  35. /*-----------------------------------------------------------------------
  36. * Base addresses -- Note these are effective addresses where the
  37. * actual resources get mapped (not physical addresses)
  38. *----------------------------------------------------------------------*/
  39. #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
  40. #define CFG_FLASH_BASE 0xf0000000 /* start of FLASH */
  41. #define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
  42. #define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory */
  43. #define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
  44. #define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
  45. #define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
  46. /*Don't change either of these*/
  47. #define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
  48. #define CFG_PCI_BASE 0xe0000000 /* internal PCI regs */
  49. /*Don't change either of these*/
  50. #define CFG_USB_DEVICE 0x50000000
  51. #define CFG_NVRAM_BASE_ADDR 0x80000000
  52. #define CFG_BCSR_BASE (CFG_NVRAM_BASE_ADDR | 0x2000)
  53. /*-----------------------------------------------------------------------
  54. * Initial RAM & stack pointer (placed in SDRAM)
  55. *----------------------------------------------------------------------*/
  56. #define CFG_INIT_RAM_ADDR 0xf0000000 /* DCache */
  57. #define CFG_INIT_RAM_END 0x2000
  58. #define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
  59. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  60. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  61. #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
  62. #define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
  63. #define CFG_KBYTES_SDRAM ( 128 * 1024) /* 128MB */
  64. #define CFG_SDRAM_BANKS (2)
  65. /*-----------------------------------------------------------------------
  66. * Serial Port
  67. *----------------------------------------------------------------------*/
  68. #undef CONFIG_SERIAL_SOFTWARE_FIFO
  69. #define CFG_EXT_SERIAL_CLOCK 11059200 /* use external 11.059MHz clk */
  70. #define CONFIG_BAUDRATE 9600
  71. #define CONFIG_SERIAL_MULTI 1
  72. /*define this if you want console on UART1*/
  73. #undef CONFIG_UART1_CONSOLE
  74. #define CFG_BAUDRATE_TABLE \
  75. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
  76. /*-----------------------------------------------------------------------
  77. * NVRAM/RTC
  78. *
  79. * NOTE: The RTC registers are located at 0x7FFF0 - 0x7FFFF
  80. * The DS1558 code assumes this condition
  81. *
  82. *----------------------------------------------------------------------*/
  83. #define CFG_NVRAM_SIZE (0x2000 - 0x10) /* NVRAM size(8k)- RTC regs */
  84. #define CONFIG_RTC_DS1556 1 /* DS1556 RTC */
  85. /*-----------------------------------------------------------------------
  86. * FLASH related
  87. *----------------------------------------------------------------------*/
  88. #define CFG_MAX_FLASH_BANKS 1 /* number of banks */
  89. #define CFG_MAX_FLASH_SECT 256 /* sectors per device */
  90. #undef CFG_FLASH_CHECKSUM
  91. #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  92. #define CFG_FLASH_WRITE_TOUT 120000 /* Timeout for Flash Write (in ms) */
  93. /*-----------------------------------------------------------------------
  94. * DDR SDRAM
  95. *----------------------------------------------------------------------*/
  96. #undef CONFIG_SPD_EEPROM /* Don't use SPD EEPROM for setup */
  97. /*-----------------------------------------------------------------------
  98. * I2C
  99. *----------------------------------------------------------------------*/
  100. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  101. #undef CONFIG_SOFT_I2C /* I2C bit-banged */
  102. #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
  103. #define CFG_I2C_SLAVE 0x7F
  104. /*-----------------------------------------------------------------------
  105. * Environment
  106. *----------------------------------------------------------------------*/
  107. #undef CFG_ENV_IS_IN_NVRAM /*No NVRAM on board*/
  108. #undef CFG_ENV_IS_IN_FLASH /* ... not in flash */
  109. #define CFG_ENV_IS_IN_EEPROM 1
  110. /* Define to allow the user to overwrite serial and ethaddr */
  111. #define CONFIG_ENV_OVERWRITE
  112. #define CFG_I2C_MULTI_EEPROMS
  113. #define CFG_ENV_SIZE 0x200 /* Size of Environment vars */
  114. #define CFG_ENV_OFFSET 0x0
  115. #define CFG_I2C_EEPROM_ADDR (0xa8>>1)
  116. #define CFG_I2C_EEPROM_ADDR_LEN 1
  117. #define CFG_EEPROM_PAGE_WRITE_ENABLE
  118. #define CFG_EEPROM_PAGE_WRITE_BITS 3
  119. #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
  120. #define CONFIG_BOOTCOMMAND "bootm 0xfe000000" /* autoboot command */
  121. #define CONFIG_BOOTDELAY 3 /* disable autoboot */
  122. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  123. #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  124. #define CONFIG_MII 1 /* MII PHY management */
  125. #define CONFIG_NET_MULTI 1 /* required for netconsole */
  126. #define CONFIG_PHY1_ADDR 3
  127. #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
  128. #define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */
  129. #define CONFIG_NETMASK 255.255.255.0
  130. #define CONFIG_IPADDR 10.0.4.251
  131. #define CONFIG_ETHADDR 00:10:EC:00:12:34
  132. #define CONFIG_ETH1ADDR 00:10:EC:00:12:35
  133. #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
  134. #define CONFIG_SERVERIP 10.0.4.115
  135. /* Partitions */
  136. #define CONFIG_MAC_PARTITION
  137. #define CONFIG_DOS_PARTITION
  138. #define CONFIG_ISO_PARTITION
  139. #ifdef CONFIG_440_EP
  140. /* USB */
  141. #define CONFIG_USB_OHCI
  142. #define CONFIG_USB_STORAGE
  143. /*Comment this out to enable USB 1.1 device*/
  144. #define USB_2_0_DEVICE
  145. #endif /*CONFIG_440_EP*/
  146. #ifdef DEBUG
  147. #define CONFIG_PANIC_HANG
  148. #else
  149. #define CONFIG_HW_WATCHDOG /* watchdog */
  150. #endif
  151. #ifdef CONFIG_440_EP
  152. /* Need to define POST */
  153. #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
  154. CFG_CMD_DATE | \
  155. CFG_CMD_DHCP | \
  156. CFG_CMD_DIAG | \
  157. CFG_CMD_ECHO | \
  158. CFG_CMD_EEPROM | \
  159. CFG_CMD_ELF | \
  160. /* CFG_CMD_EXT2 |*/ \
  161. /* CFG_CMD_FAT |*/ \
  162. CFG_CMD_I2C | \
  163. /* CFG_CMD_IDE |*/ \
  164. CFG_CMD_IRQ | \
  165. /* CFG_CMD_KGDB |*/ \
  166. CFG_CMD_MII | \
  167. CFG_CMD_PCI | \
  168. CFG_CMD_PING | \
  169. CFG_CMD_REGINFO | \
  170. CFG_CMD_SDRAM | \
  171. CFG_CMD_FLASH | \
  172. /* CFG_CMD_SPI |*/ \
  173. CFG_CMD_USB | \
  174. 0 ) & ~CFG_CMD_IMLS)
  175. #else
  176. #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
  177. CFG_CMD_DATE | \
  178. CFG_CMD_DHCP | \
  179. CFG_CMD_DIAG | \
  180. CFG_CMD_ECHO | \
  181. CFG_CMD_EEPROM | \
  182. CFG_CMD_ELF | \
  183. /* CFG_CMD_EXT2 |*/ \
  184. /* CFG_CMD_FAT |*/ \
  185. CFG_CMD_I2C | \
  186. /* CFG_CMD_IDE |*/ \
  187. CFG_CMD_IRQ | \
  188. /* CFG_CMD_KGDB |*/ \
  189. CFG_CMD_MII | \
  190. CFG_CMD_PCI | \
  191. CFG_CMD_PING | \
  192. CFG_CMD_REGINFO | \
  193. CFG_CMD_SDRAM | \
  194. CFG_CMD_FLASH | \
  195. /* CFG_CMD_SPI |*/ \
  196. 0 ) & ~CFG_CMD_IMLS)
  197. #endif
  198. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  199. #include <cmd_confdefs.h>
  200. /*
  201. * Miscellaneous configurable options
  202. */
  203. #define CFG_LONGHELP /* undef to save memory */
  204. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  205. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  206. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  207. #else
  208. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  209. #endif
  210. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  211. #define CFG_MAXARGS 16 /* max number of command args */
  212. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  213. #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
  214. #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
  215. #define CFG_LOAD_ADDR 0x100000 /* default load address */
  216. #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  217. #define CONFIG_LYNXKDI 1 /* support kdi files */
  218. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  219. /*-----------------------------------------------------------------------
  220. * PCI stuff
  221. *-----------------------------------------------------------------------
  222. */
  223. /* General PCI */
  224. #define CONFIG_PCI /* include pci support */
  225. #undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
  226. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  227. #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
  228. /* Board-specific PCI */
  229. #define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
  230. #define CFG_PCI_TARGET_INIT
  231. #define CFG_PCI_MASTER_INIT
  232. #define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
  233. #define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
  234. /*
  235. * For booting Linux, the board info and command line data
  236. * have to be in the first 8 MB of memory, since this is
  237. * the maximum mapped by the Linux kernel during initialization.
  238. */
  239. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  240. /*-----------------------------------------------------------------------
  241. * Cache Configuration
  242. */
  243. #define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */
  244. #define CFG_CACHELINE_SIZE 32 /* ... */
  245. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  246. #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  247. #endif
  248. /*
  249. * Internal Definitions
  250. *
  251. * Boot Flags
  252. */
  253. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  254. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  255. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  256. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  257. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  258. #endif
  259. #endif /* __CONFIG_H */