abb.c 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Adaptive Body Bias programming sequence for OMAP5 family
  4. *
  5. * (C) Copyright 2013
  6. * Texas Instruments, <www.ti.com>
  7. *
  8. * Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
  9. */
  10. #include <common.h>
  11. #include <asm/omap_common.h>
  12. #include <asm/io.h>
  13. /*
  14. * Setup LDOVBB for OMAP5.
  15. * On OMAP5+ some ABB settings are fused. They are handled
  16. * in the following way:
  17. *
  18. * 1. corresponding EFUSE register contains ABB enable bit
  19. * and VSET value
  20. * 2. If ABB enable bit is set to 1, than ABB should be
  21. * enabled, otherwise ABB should be disabled
  22. * 3. If ABB is enabled, than VSET value should be copied
  23. * to corresponding MUX control register
  24. */
  25. s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
  26. {
  27. u32 vset;
  28. u32 fuse_enable_mask = OMAP5_PROD_ABB_FUSE_ENABLE_MASK;
  29. u32 fuse_vset_mask = OMAP5_PROD_ABB_FUSE_VSET_MASK;
  30. if (!is_omap54xx()) {
  31. /* DRA7 */
  32. fuse_enable_mask = DRA7_ABB_FUSE_ENABLE_MASK;
  33. fuse_vset_mask = DRA7_ABB_FUSE_VSET_MASK;
  34. }
  35. /*
  36. * ABB parameters must be properly fused
  37. * otherwise ABB should be disabled
  38. */
  39. vset = readl(fuse);
  40. if (!(vset & fuse_enable_mask))
  41. return -1;
  42. /* prepare VSET value for LDOVBB mux register */
  43. vset &= fuse_vset_mask;
  44. vset >>= ffs(fuse_vset_mask) - 1;
  45. vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1;
  46. vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK;
  47. /* setup LDOVBB using fused value */
  48. clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset);
  49. return 0;
  50. }