phy.c 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2007-2008
  4. * Stelian Pop <stelian@popies.net>
  5. * Lead Tech Design <www.leadtechdesign.com>
  6. *
  7. * (C) Copyright 2012
  8. * Markus Hubig <mhubig@imko.de>
  9. * IMKO GmbH <www.imko.de>
  10. *
  11. * Copyright (C) 2013 DENX Software Engineering, hs@denx.de
  12. */
  13. #include <common.h>
  14. #include <asm/hardware.h>
  15. #include <asm/io.h>
  16. #include <linux/delay.h>
  17. #include <linux/sizes.h>
  18. #include <asm/arch/at91_rstc.h>
  19. #include <watchdog.h>
  20. void at91_phy_reset(void)
  21. {
  22. unsigned long erstl;
  23. unsigned long start = get_timer(0);
  24. unsigned long const timeout = 1000; /* 1000ms */
  25. at91_rstc_t *rstc = (at91_rstc_t *)ATMEL_BASE_RSTC;
  26. erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
  27. /*
  28. * Need to reset PHY -> 500ms reset
  29. * Reset PHY by pulling the NRST line for 500ms to low. To do so
  30. * disable user reset for low level on NRST pin and poll the NRST
  31. * level in reset status register.
  32. */
  33. writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(0x0D) |
  34. AT91_RSTC_MR_URSTEN, &rstc->mr);
  35. writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
  36. /* Wait for end of hardware reset */
  37. while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) {
  38. /* avoid shutdown by watchdog */
  39. WATCHDOG_RESET();
  40. mdelay(10);
  41. /* timeout for not getting stuck in an endless loop */
  42. if (get_timer(start) >= timeout) {
  43. puts("*** ERROR: Timeout waiting for PHY reset!\n");
  44. break;
  45. }
  46. };
  47. /* Restore NRST value */
  48. writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr);
  49. }