mmc.c 42 KB

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  1. /*
  2. * Copyright 2008, Freescale Semiconductor, Inc
  3. * Andy Fleming
  4. *
  5. * Based vaguely on the Linux code
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include <config.h>
  10. #include <common.h>
  11. #include <command.h>
  12. #include <dm.h>
  13. #include <dm/device-internal.h>
  14. #include <errno.h>
  15. #include <mmc.h>
  16. #include <part.h>
  17. #include <malloc.h>
  18. #include <memalign.h>
  19. #include <linux/list.h>
  20. #include <div64.h>
  21. #include "mmc_private.h"
  22. static struct list_head mmc_devices;
  23. static int cur_dev_num = -1;
  24. __weak int board_mmc_getwp(struct mmc *mmc)
  25. {
  26. return -1;
  27. }
  28. int mmc_getwp(struct mmc *mmc)
  29. {
  30. int wp;
  31. wp = board_mmc_getwp(mmc);
  32. if (wp < 0) {
  33. if (mmc->cfg->ops->getwp)
  34. wp = mmc->cfg->ops->getwp(mmc);
  35. else
  36. wp = 0;
  37. }
  38. return wp;
  39. }
  40. __weak int board_mmc_getcd(struct mmc *mmc)
  41. {
  42. return -1;
  43. }
  44. int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
  45. {
  46. int ret;
  47. #ifdef CONFIG_MMC_TRACE
  48. int i;
  49. u8 *ptr;
  50. printf("CMD_SEND:%d\n", cmd->cmdidx);
  51. printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  52. ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
  53. switch (cmd->resp_type) {
  54. case MMC_RSP_NONE:
  55. printf("\t\tMMC_RSP_NONE\n");
  56. break;
  57. case MMC_RSP_R1:
  58. printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
  59. cmd->response[0]);
  60. break;
  61. case MMC_RSP_R1b:
  62. printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
  63. cmd->response[0]);
  64. break;
  65. case MMC_RSP_R2:
  66. printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
  67. cmd->response[0]);
  68. printf("\t\t \t\t 0x%08X \n",
  69. cmd->response[1]);
  70. printf("\t\t \t\t 0x%08X \n",
  71. cmd->response[2]);
  72. printf("\t\t \t\t 0x%08X \n",
  73. cmd->response[3]);
  74. printf("\n");
  75. printf("\t\t\t\t\tDUMPING DATA\n");
  76. for (i = 0; i < 4; i++) {
  77. int j;
  78. printf("\t\t\t\t\t%03d - ", i*4);
  79. ptr = (u8 *)&cmd->response[i];
  80. ptr += 3;
  81. for (j = 0; j < 4; j++)
  82. printf("%02X ", *ptr--);
  83. printf("\n");
  84. }
  85. break;
  86. case MMC_RSP_R3:
  87. printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
  88. cmd->response[0]);
  89. break;
  90. default:
  91. printf("\t\tERROR MMC rsp not supported\n");
  92. break;
  93. }
  94. #else
  95. ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
  96. #endif
  97. return ret;
  98. }
  99. int mmc_send_status(struct mmc *mmc, int timeout)
  100. {
  101. struct mmc_cmd cmd;
  102. int err, retries = 5;
  103. #ifdef CONFIG_MMC_TRACE
  104. int status;
  105. #endif
  106. cmd.cmdidx = MMC_CMD_SEND_STATUS;
  107. cmd.resp_type = MMC_RSP_R1;
  108. if (!mmc_host_is_spi(mmc))
  109. cmd.cmdarg = mmc->rca << 16;
  110. while (1) {
  111. err = mmc_send_cmd(mmc, &cmd, NULL);
  112. if (!err) {
  113. if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
  114. (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
  115. MMC_STATE_PRG)
  116. break;
  117. else if (cmd.response[0] & MMC_STATUS_MASK) {
  118. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  119. printf("Status Error: 0x%08X\n",
  120. cmd.response[0]);
  121. #endif
  122. return COMM_ERR;
  123. }
  124. } else if (--retries < 0)
  125. return err;
  126. if (timeout-- <= 0)
  127. break;
  128. udelay(1000);
  129. }
  130. #ifdef CONFIG_MMC_TRACE
  131. status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
  132. printf("CURR STATE:%d\n", status);
  133. #endif
  134. if (timeout <= 0) {
  135. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  136. printf("Timeout waiting card ready\n");
  137. #endif
  138. return TIMEOUT;
  139. }
  140. if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
  141. return SWITCH_ERR;
  142. return 0;
  143. }
  144. int mmc_set_blocklen(struct mmc *mmc, int len)
  145. {
  146. struct mmc_cmd cmd;
  147. if (mmc->ddr_mode)
  148. return 0;
  149. cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
  150. cmd.resp_type = MMC_RSP_R1;
  151. cmd.cmdarg = len;
  152. return mmc_send_cmd(mmc, &cmd, NULL);
  153. }
  154. struct mmc *find_mmc_device(int dev_num)
  155. {
  156. struct mmc *m;
  157. struct list_head *entry;
  158. list_for_each(entry, &mmc_devices) {
  159. m = list_entry(entry, struct mmc, link);
  160. if (m->block_dev.devnum == dev_num)
  161. return m;
  162. }
  163. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  164. printf("MMC Device %d not found\n", dev_num);
  165. #endif
  166. return NULL;
  167. }
  168. static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
  169. lbaint_t blkcnt)
  170. {
  171. struct mmc_cmd cmd;
  172. struct mmc_data data;
  173. if (blkcnt > 1)
  174. cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
  175. else
  176. cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
  177. if (mmc->high_capacity)
  178. cmd.cmdarg = start;
  179. else
  180. cmd.cmdarg = start * mmc->read_bl_len;
  181. cmd.resp_type = MMC_RSP_R1;
  182. data.dest = dst;
  183. data.blocks = blkcnt;
  184. data.blocksize = mmc->read_bl_len;
  185. data.flags = MMC_DATA_READ;
  186. if (mmc_send_cmd(mmc, &cmd, &data))
  187. return 0;
  188. if (blkcnt > 1) {
  189. cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
  190. cmd.cmdarg = 0;
  191. cmd.resp_type = MMC_RSP_R1b;
  192. if (mmc_send_cmd(mmc, &cmd, NULL)) {
  193. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  194. printf("mmc fail to send stop cmd\n");
  195. #endif
  196. return 0;
  197. }
  198. }
  199. return blkcnt;
  200. }
  201. static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
  202. lbaint_t blkcnt, void *dst)
  203. {
  204. int dev_num = block_dev->devnum;
  205. int err;
  206. lbaint_t cur, blocks_todo = blkcnt;
  207. if (blkcnt == 0)
  208. return 0;
  209. struct mmc *mmc = find_mmc_device(dev_num);
  210. if (!mmc)
  211. return 0;
  212. err = mmc_select_hwpart(dev_num, block_dev->hwpart);
  213. if (err < 0)
  214. return 0;
  215. if ((start + blkcnt) > mmc->block_dev.lba) {
  216. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  217. printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
  218. start + blkcnt, mmc->block_dev.lba);
  219. #endif
  220. return 0;
  221. }
  222. if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
  223. debug("%s: Failed to set blocklen\n", __func__);
  224. return 0;
  225. }
  226. do {
  227. cur = (blocks_todo > mmc->cfg->b_max) ?
  228. mmc->cfg->b_max : blocks_todo;
  229. if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
  230. debug("%s: Failed to read blocks\n", __func__);
  231. return 0;
  232. }
  233. blocks_todo -= cur;
  234. start += cur;
  235. dst += cur * mmc->read_bl_len;
  236. } while (blocks_todo > 0);
  237. return blkcnt;
  238. }
  239. static int mmc_go_idle(struct mmc *mmc)
  240. {
  241. struct mmc_cmd cmd;
  242. int err;
  243. udelay(1000);
  244. cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
  245. cmd.cmdarg = 0;
  246. cmd.resp_type = MMC_RSP_NONE;
  247. err = mmc_send_cmd(mmc, &cmd, NULL);
  248. if (err)
  249. return err;
  250. udelay(2000);
  251. return 0;
  252. }
  253. static int sd_send_op_cond(struct mmc *mmc)
  254. {
  255. int timeout = 1000;
  256. int err;
  257. struct mmc_cmd cmd;
  258. while (1) {
  259. cmd.cmdidx = MMC_CMD_APP_CMD;
  260. cmd.resp_type = MMC_RSP_R1;
  261. cmd.cmdarg = 0;
  262. err = mmc_send_cmd(mmc, &cmd, NULL);
  263. if (err)
  264. return err;
  265. cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
  266. cmd.resp_type = MMC_RSP_R3;
  267. /*
  268. * Most cards do not answer if some reserved bits
  269. * in the ocr are set. However, Some controller
  270. * can set bit 7 (reserved for low voltages), but
  271. * how to manage low voltages SD card is not yet
  272. * specified.
  273. */
  274. cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
  275. (mmc->cfg->voltages & 0xff8000);
  276. if (mmc->version == SD_VERSION_2)
  277. cmd.cmdarg |= OCR_HCS;
  278. err = mmc_send_cmd(mmc, &cmd, NULL);
  279. if (err)
  280. return err;
  281. if (cmd.response[0] & OCR_BUSY)
  282. break;
  283. if (timeout-- <= 0)
  284. return UNUSABLE_ERR;
  285. udelay(1000);
  286. }
  287. if (mmc->version != SD_VERSION_2)
  288. mmc->version = SD_VERSION_1_0;
  289. if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
  290. cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
  291. cmd.resp_type = MMC_RSP_R3;
  292. cmd.cmdarg = 0;
  293. err = mmc_send_cmd(mmc, &cmd, NULL);
  294. if (err)
  295. return err;
  296. }
  297. mmc->ocr = cmd.response[0];
  298. mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
  299. mmc->rca = 0;
  300. return 0;
  301. }
  302. static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
  303. {
  304. struct mmc_cmd cmd;
  305. int err;
  306. cmd.cmdidx = MMC_CMD_SEND_OP_COND;
  307. cmd.resp_type = MMC_RSP_R3;
  308. cmd.cmdarg = 0;
  309. if (use_arg && !mmc_host_is_spi(mmc))
  310. cmd.cmdarg = OCR_HCS |
  311. (mmc->cfg->voltages &
  312. (mmc->ocr & OCR_VOLTAGE_MASK)) |
  313. (mmc->ocr & OCR_ACCESS_MODE);
  314. err = mmc_send_cmd(mmc, &cmd, NULL);
  315. if (err)
  316. return err;
  317. mmc->ocr = cmd.response[0];
  318. return 0;
  319. }
  320. static int mmc_send_op_cond(struct mmc *mmc)
  321. {
  322. int err, i;
  323. /* Some cards seem to need this */
  324. mmc_go_idle(mmc);
  325. /* Asking to the card its capabilities */
  326. for (i = 0; i < 2; i++) {
  327. err = mmc_send_op_cond_iter(mmc, i != 0);
  328. if (err)
  329. return err;
  330. /* exit if not busy (flag seems to be inverted) */
  331. if (mmc->ocr & OCR_BUSY)
  332. break;
  333. }
  334. mmc->op_cond_pending = 1;
  335. return 0;
  336. }
  337. static int mmc_complete_op_cond(struct mmc *mmc)
  338. {
  339. struct mmc_cmd cmd;
  340. int timeout = 1000;
  341. uint start;
  342. int err;
  343. mmc->op_cond_pending = 0;
  344. if (!(mmc->ocr & OCR_BUSY)) {
  345. start = get_timer(0);
  346. while (1) {
  347. err = mmc_send_op_cond_iter(mmc, 1);
  348. if (err)
  349. return err;
  350. if (mmc->ocr & OCR_BUSY)
  351. break;
  352. if (get_timer(start) > timeout)
  353. return UNUSABLE_ERR;
  354. udelay(100);
  355. }
  356. }
  357. if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
  358. cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
  359. cmd.resp_type = MMC_RSP_R3;
  360. cmd.cmdarg = 0;
  361. err = mmc_send_cmd(mmc, &cmd, NULL);
  362. if (err)
  363. return err;
  364. mmc->ocr = cmd.response[0];
  365. }
  366. mmc->version = MMC_VERSION_UNKNOWN;
  367. mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
  368. mmc->rca = 1;
  369. return 0;
  370. }
  371. static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
  372. {
  373. struct mmc_cmd cmd;
  374. struct mmc_data data;
  375. int err;
  376. /* Get the Card Status Register */
  377. cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
  378. cmd.resp_type = MMC_RSP_R1;
  379. cmd.cmdarg = 0;
  380. data.dest = (char *)ext_csd;
  381. data.blocks = 1;
  382. data.blocksize = MMC_MAX_BLOCK_LEN;
  383. data.flags = MMC_DATA_READ;
  384. err = mmc_send_cmd(mmc, &cmd, &data);
  385. return err;
  386. }
  387. static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
  388. {
  389. struct mmc_cmd cmd;
  390. int timeout = 1000;
  391. int ret;
  392. cmd.cmdidx = MMC_CMD_SWITCH;
  393. cmd.resp_type = MMC_RSP_R1b;
  394. cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
  395. (index << 16) |
  396. (value << 8);
  397. ret = mmc_send_cmd(mmc, &cmd, NULL);
  398. /* Waiting for the ready status */
  399. if (!ret)
  400. ret = mmc_send_status(mmc, timeout);
  401. return ret;
  402. }
  403. static int mmc_change_freq(struct mmc *mmc)
  404. {
  405. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  406. char cardtype;
  407. int err;
  408. mmc->card_caps = 0;
  409. if (mmc_host_is_spi(mmc))
  410. return 0;
  411. /* Only version 4 supports high-speed */
  412. if (mmc->version < MMC_VERSION_4)
  413. return 0;
  414. mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
  415. err = mmc_send_ext_csd(mmc, ext_csd);
  416. if (err)
  417. return err;
  418. cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
  419. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
  420. if (err)
  421. return err == SWITCH_ERR ? 0 : err;
  422. /* Now check to see that it worked */
  423. err = mmc_send_ext_csd(mmc, ext_csd);
  424. if (err)
  425. return err;
  426. /* No high-speed support */
  427. if (!ext_csd[EXT_CSD_HS_TIMING])
  428. return 0;
  429. /* High Speed is set, there are two types: 52MHz and 26MHz */
  430. if (cardtype & EXT_CSD_CARD_TYPE_52) {
  431. if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
  432. mmc->card_caps |= MMC_MODE_DDR_52MHz;
  433. mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
  434. } else {
  435. mmc->card_caps |= MMC_MODE_HS;
  436. }
  437. return 0;
  438. }
  439. static int mmc_set_capacity(struct mmc *mmc, int part_num)
  440. {
  441. switch (part_num) {
  442. case 0:
  443. mmc->capacity = mmc->capacity_user;
  444. break;
  445. case 1:
  446. case 2:
  447. mmc->capacity = mmc->capacity_boot;
  448. break;
  449. case 3:
  450. mmc->capacity = mmc->capacity_rpmb;
  451. break;
  452. case 4:
  453. case 5:
  454. case 6:
  455. case 7:
  456. mmc->capacity = mmc->capacity_gp[part_num - 4];
  457. break;
  458. default:
  459. return -1;
  460. }
  461. mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
  462. return 0;
  463. }
  464. int mmc_select_hwpart(int dev_num, int hwpart)
  465. {
  466. struct mmc *mmc = find_mmc_device(dev_num);
  467. int ret;
  468. if (!mmc)
  469. return -ENODEV;
  470. if (mmc->block_dev.hwpart == hwpart)
  471. return 0;
  472. if (mmc->part_config == MMCPART_NOAVAILABLE) {
  473. printf("Card doesn't support part_switch\n");
  474. return -EMEDIUMTYPE;
  475. }
  476. ret = mmc_switch_part(dev_num, hwpart);
  477. if (ret)
  478. return ret;
  479. return 0;
  480. }
  481. int mmc_switch_part(int dev_num, unsigned int part_num)
  482. {
  483. struct mmc *mmc = find_mmc_device(dev_num);
  484. int ret;
  485. if (!mmc)
  486. return -1;
  487. ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
  488. (mmc->part_config & ~PART_ACCESS_MASK)
  489. | (part_num & PART_ACCESS_MASK));
  490. /*
  491. * Set the capacity if the switch succeeded or was intended
  492. * to return to representing the raw device.
  493. */
  494. if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
  495. ret = mmc_set_capacity(mmc, part_num);
  496. mmc->block_dev.hwpart = part_num;
  497. }
  498. return ret;
  499. }
  500. int mmc_hwpart_config(struct mmc *mmc,
  501. const struct mmc_hwpart_conf *conf,
  502. enum mmc_hwpart_conf_mode mode)
  503. {
  504. u8 part_attrs = 0;
  505. u32 enh_size_mult;
  506. u32 enh_start_addr;
  507. u32 gp_size_mult[4];
  508. u32 max_enh_size_mult;
  509. u32 tot_enh_size_mult = 0;
  510. u8 wr_rel_set;
  511. int i, pidx, err;
  512. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  513. if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
  514. return -EINVAL;
  515. if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
  516. printf("eMMC >= 4.4 required for enhanced user data area\n");
  517. return -EMEDIUMTYPE;
  518. }
  519. if (!(mmc->part_support & PART_SUPPORT)) {
  520. printf("Card does not support partitioning\n");
  521. return -EMEDIUMTYPE;
  522. }
  523. if (!mmc->hc_wp_grp_size) {
  524. printf("Card does not define HC WP group size\n");
  525. return -EMEDIUMTYPE;
  526. }
  527. /* check partition alignment and total enhanced size */
  528. if (conf->user.enh_size) {
  529. if (conf->user.enh_size % mmc->hc_wp_grp_size ||
  530. conf->user.enh_start % mmc->hc_wp_grp_size) {
  531. printf("User data enhanced area not HC WP group "
  532. "size aligned\n");
  533. return -EINVAL;
  534. }
  535. part_attrs |= EXT_CSD_ENH_USR;
  536. enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
  537. if (mmc->high_capacity) {
  538. enh_start_addr = conf->user.enh_start;
  539. } else {
  540. enh_start_addr = (conf->user.enh_start << 9);
  541. }
  542. } else {
  543. enh_size_mult = 0;
  544. enh_start_addr = 0;
  545. }
  546. tot_enh_size_mult += enh_size_mult;
  547. for (pidx = 0; pidx < 4; pidx++) {
  548. if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
  549. printf("GP%i partition not HC WP group size "
  550. "aligned\n", pidx+1);
  551. return -EINVAL;
  552. }
  553. gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
  554. if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
  555. part_attrs |= EXT_CSD_ENH_GP(pidx);
  556. tot_enh_size_mult += gp_size_mult[pidx];
  557. }
  558. }
  559. if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
  560. printf("Card does not support enhanced attribute\n");
  561. return -EMEDIUMTYPE;
  562. }
  563. err = mmc_send_ext_csd(mmc, ext_csd);
  564. if (err)
  565. return err;
  566. max_enh_size_mult =
  567. (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
  568. (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
  569. ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
  570. if (tot_enh_size_mult > max_enh_size_mult) {
  571. printf("Total enhanced size exceeds maximum (%u > %u)\n",
  572. tot_enh_size_mult, max_enh_size_mult);
  573. return -EMEDIUMTYPE;
  574. }
  575. /* The default value of EXT_CSD_WR_REL_SET is device
  576. * dependent, the values can only be changed if the
  577. * EXT_CSD_HS_CTRL_REL bit is set. The values can be
  578. * changed only once and before partitioning is completed. */
  579. wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
  580. if (conf->user.wr_rel_change) {
  581. if (conf->user.wr_rel_set)
  582. wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
  583. else
  584. wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
  585. }
  586. for (pidx = 0; pidx < 4; pidx++) {
  587. if (conf->gp_part[pidx].wr_rel_change) {
  588. if (conf->gp_part[pidx].wr_rel_set)
  589. wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
  590. else
  591. wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
  592. }
  593. }
  594. if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
  595. !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
  596. puts("Card does not support host controlled partition write "
  597. "reliability settings\n");
  598. return -EMEDIUMTYPE;
  599. }
  600. if (ext_csd[EXT_CSD_PARTITION_SETTING] &
  601. EXT_CSD_PARTITION_SETTING_COMPLETED) {
  602. printf("Card already partitioned\n");
  603. return -EPERM;
  604. }
  605. if (mode == MMC_HWPART_CONF_CHECK)
  606. return 0;
  607. /* Partitioning requires high-capacity size definitions */
  608. if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
  609. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  610. EXT_CSD_ERASE_GROUP_DEF, 1);
  611. if (err)
  612. return err;
  613. ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
  614. /* update erase group size to be high-capacity */
  615. mmc->erase_grp_size =
  616. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
  617. }
  618. /* all OK, write the configuration */
  619. for (i = 0; i < 4; i++) {
  620. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  621. EXT_CSD_ENH_START_ADDR+i,
  622. (enh_start_addr >> (i*8)) & 0xFF);
  623. if (err)
  624. return err;
  625. }
  626. for (i = 0; i < 3; i++) {
  627. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  628. EXT_CSD_ENH_SIZE_MULT+i,
  629. (enh_size_mult >> (i*8)) & 0xFF);
  630. if (err)
  631. return err;
  632. }
  633. for (pidx = 0; pidx < 4; pidx++) {
  634. for (i = 0; i < 3; i++) {
  635. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  636. EXT_CSD_GP_SIZE_MULT+pidx*3+i,
  637. (gp_size_mult[pidx] >> (i*8)) & 0xFF);
  638. if (err)
  639. return err;
  640. }
  641. }
  642. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  643. EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
  644. if (err)
  645. return err;
  646. if (mode == MMC_HWPART_CONF_SET)
  647. return 0;
  648. /* The WR_REL_SET is a write-once register but shall be
  649. * written before setting PART_SETTING_COMPLETED. As it is
  650. * write-once we can only write it when completing the
  651. * partitioning. */
  652. if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
  653. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  654. EXT_CSD_WR_REL_SET, wr_rel_set);
  655. if (err)
  656. return err;
  657. }
  658. /* Setting PART_SETTING_COMPLETED confirms the partition
  659. * configuration but it only becomes effective after power
  660. * cycle, so we do not adjust the partition related settings
  661. * in the mmc struct. */
  662. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  663. EXT_CSD_PARTITION_SETTING,
  664. EXT_CSD_PARTITION_SETTING_COMPLETED);
  665. if (err)
  666. return err;
  667. return 0;
  668. }
  669. int mmc_getcd(struct mmc *mmc)
  670. {
  671. int cd;
  672. cd = board_mmc_getcd(mmc);
  673. if (cd < 0) {
  674. if (mmc->cfg->ops->getcd)
  675. cd = mmc->cfg->ops->getcd(mmc);
  676. else
  677. cd = 1;
  678. }
  679. return cd;
  680. }
  681. static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
  682. {
  683. struct mmc_cmd cmd;
  684. struct mmc_data data;
  685. /* Switch the frequency */
  686. cmd.cmdidx = SD_CMD_SWITCH_FUNC;
  687. cmd.resp_type = MMC_RSP_R1;
  688. cmd.cmdarg = (mode << 31) | 0xffffff;
  689. cmd.cmdarg &= ~(0xf << (group * 4));
  690. cmd.cmdarg |= value << (group * 4);
  691. data.dest = (char *)resp;
  692. data.blocksize = 64;
  693. data.blocks = 1;
  694. data.flags = MMC_DATA_READ;
  695. return mmc_send_cmd(mmc, &cmd, &data);
  696. }
  697. static int sd_change_freq(struct mmc *mmc)
  698. {
  699. int err;
  700. struct mmc_cmd cmd;
  701. ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
  702. ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
  703. struct mmc_data data;
  704. int timeout;
  705. mmc->card_caps = 0;
  706. if (mmc_host_is_spi(mmc))
  707. return 0;
  708. /* Read the SCR to find out if this card supports higher speeds */
  709. cmd.cmdidx = MMC_CMD_APP_CMD;
  710. cmd.resp_type = MMC_RSP_R1;
  711. cmd.cmdarg = mmc->rca << 16;
  712. err = mmc_send_cmd(mmc, &cmd, NULL);
  713. if (err)
  714. return err;
  715. cmd.cmdidx = SD_CMD_APP_SEND_SCR;
  716. cmd.resp_type = MMC_RSP_R1;
  717. cmd.cmdarg = 0;
  718. timeout = 3;
  719. retry_scr:
  720. data.dest = (char *)scr;
  721. data.blocksize = 8;
  722. data.blocks = 1;
  723. data.flags = MMC_DATA_READ;
  724. err = mmc_send_cmd(mmc, &cmd, &data);
  725. if (err) {
  726. if (timeout--)
  727. goto retry_scr;
  728. return err;
  729. }
  730. mmc->scr[0] = __be32_to_cpu(scr[0]);
  731. mmc->scr[1] = __be32_to_cpu(scr[1]);
  732. switch ((mmc->scr[0] >> 24) & 0xf) {
  733. case 0:
  734. mmc->version = SD_VERSION_1_0;
  735. break;
  736. case 1:
  737. mmc->version = SD_VERSION_1_10;
  738. break;
  739. case 2:
  740. mmc->version = SD_VERSION_2;
  741. if ((mmc->scr[0] >> 15) & 0x1)
  742. mmc->version = SD_VERSION_3;
  743. break;
  744. default:
  745. mmc->version = SD_VERSION_1_0;
  746. break;
  747. }
  748. if (mmc->scr[0] & SD_DATA_4BIT)
  749. mmc->card_caps |= MMC_MODE_4BIT;
  750. /* Version 1.0 doesn't support switching */
  751. if (mmc->version == SD_VERSION_1_0)
  752. return 0;
  753. timeout = 4;
  754. while (timeout--) {
  755. err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
  756. (u8 *)switch_status);
  757. if (err)
  758. return err;
  759. /* The high-speed function is busy. Try again */
  760. if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
  761. break;
  762. }
  763. /* If high-speed isn't supported, we return */
  764. if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
  765. return 0;
  766. /*
  767. * If the host doesn't support SD_HIGHSPEED, do not switch card to
  768. * HIGHSPEED mode even if the card support SD_HIGHSPPED.
  769. * This can avoid furthur problem when the card runs in different
  770. * mode between the host.
  771. */
  772. if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
  773. (mmc->cfg->host_caps & MMC_MODE_HS)))
  774. return 0;
  775. err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
  776. if (err)
  777. return err;
  778. if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
  779. mmc->card_caps |= MMC_MODE_HS;
  780. return 0;
  781. }
  782. /* frequency bases */
  783. /* divided by 10 to be nice to platforms without floating point */
  784. static const int fbase[] = {
  785. 10000,
  786. 100000,
  787. 1000000,
  788. 10000000,
  789. };
  790. /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
  791. * to platforms without floating point.
  792. */
  793. static const int multipliers[] = {
  794. 0, /* reserved */
  795. 10,
  796. 12,
  797. 13,
  798. 15,
  799. 20,
  800. 25,
  801. 30,
  802. 35,
  803. 40,
  804. 45,
  805. 50,
  806. 55,
  807. 60,
  808. 70,
  809. 80,
  810. };
  811. static void mmc_set_ios(struct mmc *mmc)
  812. {
  813. if (mmc->cfg->ops->set_ios)
  814. mmc->cfg->ops->set_ios(mmc);
  815. }
  816. void mmc_set_clock(struct mmc *mmc, uint clock)
  817. {
  818. if (clock > mmc->cfg->f_max)
  819. clock = mmc->cfg->f_max;
  820. if (clock < mmc->cfg->f_min)
  821. clock = mmc->cfg->f_min;
  822. mmc->clock = clock;
  823. mmc_set_ios(mmc);
  824. }
  825. static void mmc_set_bus_width(struct mmc *mmc, uint width)
  826. {
  827. mmc->bus_width = width;
  828. mmc_set_ios(mmc);
  829. }
  830. static int mmc_startup(struct mmc *mmc)
  831. {
  832. int err, i;
  833. uint mult, freq;
  834. u64 cmult, csize, capacity;
  835. struct mmc_cmd cmd;
  836. ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
  837. ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
  838. int timeout = 1000;
  839. bool has_parts = false;
  840. bool part_completed;
  841. #ifdef CONFIG_MMC_SPI_CRC_ON
  842. if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
  843. cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
  844. cmd.resp_type = MMC_RSP_R1;
  845. cmd.cmdarg = 1;
  846. err = mmc_send_cmd(mmc, &cmd, NULL);
  847. if (err)
  848. return err;
  849. }
  850. #endif
  851. /* Put the Card in Identify Mode */
  852. cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
  853. MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
  854. cmd.resp_type = MMC_RSP_R2;
  855. cmd.cmdarg = 0;
  856. err = mmc_send_cmd(mmc, &cmd, NULL);
  857. if (err)
  858. return err;
  859. memcpy(mmc->cid, cmd.response, 16);
  860. /*
  861. * For MMC cards, set the Relative Address.
  862. * For SD cards, get the Relatvie Address.
  863. * This also puts the cards into Standby State
  864. */
  865. if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
  866. cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
  867. cmd.cmdarg = mmc->rca << 16;
  868. cmd.resp_type = MMC_RSP_R6;
  869. err = mmc_send_cmd(mmc, &cmd, NULL);
  870. if (err)
  871. return err;
  872. if (IS_SD(mmc))
  873. mmc->rca = (cmd.response[0] >> 16) & 0xffff;
  874. }
  875. /* Get the Card-Specific Data */
  876. cmd.cmdidx = MMC_CMD_SEND_CSD;
  877. cmd.resp_type = MMC_RSP_R2;
  878. cmd.cmdarg = mmc->rca << 16;
  879. err = mmc_send_cmd(mmc, &cmd, NULL);
  880. /* Waiting for the ready status */
  881. mmc_send_status(mmc, timeout);
  882. if (err)
  883. return err;
  884. mmc->csd[0] = cmd.response[0];
  885. mmc->csd[1] = cmd.response[1];
  886. mmc->csd[2] = cmd.response[2];
  887. mmc->csd[3] = cmd.response[3];
  888. if (mmc->version == MMC_VERSION_UNKNOWN) {
  889. int version = (cmd.response[0] >> 26) & 0xf;
  890. switch (version) {
  891. case 0:
  892. mmc->version = MMC_VERSION_1_2;
  893. break;
  894. case 1:
  895. mmc->version = MMC_VERSION_1_4;
  896. break;
  897. case 2:
  898. mmc->version = MMC_VERSION_2_2;
  899. break;
  900. case 3:
  901. mmc->version = MMC_VERSION_3;
  902. break;
  903. case 4:
  904. mmc->version = MMC_VERSION_4;
  905. break;
  906. default:
  907. mmc->version = MMC_VERSION_1_2;
  908. break;
  909. }
  910. }
  911. /* divide frequency by 10, since the mults are 10x bigger */
  912. freq = fbase[(cmd.response[0] & 0x7)];
  913. mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
  914. mmc->tran_speed = freq * mult;
  915. mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
  916. mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
  917. if (IS_SD(mmc))
  918. mmc->write_bl_len = mmc->read_bl_len;
  919. else
  920. mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
  921. if (mmc->high_capacity) {
  922. csize = (mmc->csd[1] & 0x3f) << 16
  923. | (mmc->csd[2] & 0xffff0000) >> 16;
  924. cmult = 8;
  925. } else {
  926. csize = (mmc->csd[1] & 0x3ff) << 2
  927. | (mmc->csd[2] & 0xc0000000) >> 30;
  928. cmult = (mmc->csd[2] & 0x00038000) >> 15;
  929. }
  930. mmc->capacity_user = (csize + 1) << (cmult + 2);
  931. mmc->capacity_user *= mmc->read_bl_len;
  932. mmc->capacity_boot = 0;
  933. mmc->capacity_rpmb = 0;
  934. for (i = 0; i < 4; i++)
  935. mmc->capacity_gp[i] = 0;
  936. if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
  937. mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
  938. if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
  939. mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
  940. if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
  941. cmd.cmdidx = MMC_CMD_SET_DSR;
  942. cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
  943. cmd.resp_type = MMC_RSP_NONE;
  944. if (mmc_send_cmd(mmc, &cmd, NULL))
  945. printf("MMC: SET_DSR failed\n");
  946. }
  947. /* Select the card, and put it into Transfer Mode */
  948. if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
  949. cmd.cmdidx = MMC_CMD_SELECT_CARD;
  950. cmd.resp_type = MMC_RSP_R1;
  951. cmd.cmdarg = mmc->rca << 16;
  952. err = mmc_send_cmd(mmc, &cmd, NULL);
  953. if (err)
  954. return err;
  955. }
  956. /*
  957. * For SD, its erase group is always one sector
  958. */
  959. mmc->erase_grp_size = 1;
  960. mmc->part_config = MMCPART_NOAVAILABLE;
  961. if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
  962. /* check ext_csd version and capacity */
  963. err = mmc_send_ext_csd(mmc, ext_csd);
  964. if (err)
  965. return err;
  966. if (ext_csd[EXT_CSD_REV] >= 2) {
  967. /*
  968. * According to the JEDEC Standard, the value of
  969. * ext_csd's capacity is valid if the value is more
  970. * than 2GB
  971. */
  972. capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
  973. | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
  974. | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
  975. | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
  976. capacity *= MMC_MAX_BLOCK_LEN;
  977. if ((capacity >> 20) > 2 * 1024)
  978. mmc->capacity_user = capacity;
  979. }
  980. switch (ext_csd[EXT_CSD_REV]) {
  981. case 1:
  982. mmc->version = MMC_VERSION_4_1;
  983. break;
  984. case 2:
  985. mmc->version = MMC_VERSION_4_2;
  986. break;
  987. case 3:
  988. mmc->version = MMC_VERSION_4_3;
  989. break;
  990. case 5:
  991. mmc->version = MMC_VERSION_4_41;
  992. break;
  993. case 6:
  994. mmc->version = MMC_VERSION_4_5;
  995. break;
  996. case 7:
  997. mmc->version = MMC_VERSION_5_0;
  998. break;
  999. }
  1000. /* The partition data may be non-zero but it is only
  1001. * effective if PARTITION_SETTING_COMPLETED is set in
  1002. * EXT_CSD, so ignore any data if this bit is not set,
  1003. * except for enabling the high-capacity group size
  1004. * definition (see below). */
  1005. part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
  1006. EXT_CSD_PARTITION_SETTING_COMPLETED);
  1007. /* store the partition info of emmc */
  1008. mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
  1009. if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
  1010. ext_csd[EXT_CSD_BOOT_MULT])
  1011. mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
  1012. if (part_completed &&
  1013. (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
  1014. mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
  1015. mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
  1016. mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
  1017. for (i = 0; i < 4; i++) {
  1018. int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
  1019. uint mult = (ext_csd[idx + 2] << 16) +
  1020. (ext_csd[idx + 1] << 8) + ext_csd[idx];
  1021. if (mult)
  1022. has_parts = true;
  1023. if (!part_completed)
  1024. continue;
  1025. mmc->capacity_gp[i] = mult;
  1026. mmc->capacity_gp[i] *=
  1027. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
  1028. mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1029. mmc->capacity_gp[i] <<= 19;
  1030. }
  1031. if (part_completed) {
  1032. mmc->enh_user_size =
  1033. (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
  1034. (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
  1035. ext_csd[EXT_CSD_ENH_SIZE_MULT];
  1036. mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
  1037. mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1038. mmc->enh_user_size <<= 19;
  1039. mmc->enh_user_start =
  1040. (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
  1041. (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
  1042. (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
  1043. ext_csd[EXT_CSD_ENH_START_ADDR];
  1044. if (mmc->high_capacity)
  1045. mmc->enh_user_start <<= 9;
  1046. }
  1047. /*
  1048. * Host needs to enable ERASE_GRP_DEF bit if device is
  1049. * partitioned. This bit will be lost every time after a reset
  1050. * or power off. This will affect erase size.
  1051. */
  1052. if (part_completed)
  1053. has_parts = true;
  1054. if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
  1055. (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
  1056. has_parts = true;
  1057. if (has_parts) {
  1058. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  1059. EXT_CSD_ERASE_GROUP_DEF, 1);
  1060. if (err)
  1061. return err;
  1062. else
  1063. ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
  1064. }
  1065. if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
  1066. /* Read out group size from ext_csd */
  1067. mmc->erase_grp_size =
  1068. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
  1069. /*
  1070. * if high capacity and partition setting completed
  1071. * SEC_COUNT is valid even if it is smaller than 2 GiB
  1072. * JEDEC Standard JESD84-B45, 6.2.4
  1073. */
  1074. if (mmc->high_capacity && part_completed) {
  1075. capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
  1076. (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
  1077. (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
  1078. (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
  1079. capacity *= MMC_MAX_BLOCK_LEN;
  1080. mmc->capacity_user = capacity;
  1081. }
  1082. } else {
  1083. /* Calculate the group size from the csd value. */
  1084. int erase_gsz, erase_gmul;
  1085. erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
  1086. erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
  1087. mmc->erase_grp_size = (erase_gsz + 1)
  1088. * (erase_gmul + 1);
  1089. }
  1090. mmc->hc_wp_grp_size = 1024
  1091. * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
  1092. * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
  1093. mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
  1094. }
  1095. err = mmc_set_capacity(mmc, mmc->block_dev.hwpart);
  1096. if (err)
  1097. return err;
  1098. if (IS_SD(mmc))
  1099. err = sd_change_freq(mmc);
  1100. else
  1101. err = mmc_change_freq(mmc);
  1102. if (err)
  1103. return err;
  1104. /* Restrict card's capabilities by what the host can do */
  1105. mmc->card_caps &= mmc->cfg->host_caps;
  1106. if (IS_SD(mmc)) {
  1107. if (mmc->card_caps & MMC_MODE_4BIT) {
  1108. cmd.cmdidx = MMC_CMD_APP_CMD;
  1109. cmd.resp_type = MMC_RSP_R1;
  1110. cmd.cmdarg = mmc->rca << 16;
  1111. err = mmc_send_cmd(mmc, &cmd, NULL);
  1112. if (err)
  1113. return err;
  1114. cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
  1115. cmd.resp_type = MMC_RSP_R1;
  1116. cmd.cmdarg = 2;
  1117. err = mmc_send_cmd(mmc, &cmd, NULL);
  1118. if (err)
  1119. return err;
  1120. mmc_set_bus_width(mmc, 4);
  1121. }
  1122. if (mmc->card_caps & MMC_MODE_HS)
  1123. mmc->tran_speed = 50000000;
  1124. else
  1125. mmc->tran_speed = 25000000;
  1126. } else if (mmc->version >= MMC_VERSION_4) {
  1127. /* Only version 4 of MMC supports wider bus widths */
  1128. int idx;
  1129. /* An array of possible bus widths in order of preference */
  1130. static unsigned ext_csd_bits[] = {
  1131. EXT_CSD_DDR_BUS_WIDTH_8,
  1132. EXT_CSD_DDR_BUS_WIDTH_4,
  1133. EXT_CSD_BUS_WIDTH_8,
  1134. EXT_CSD_BUS_WIDTH_4,
  1135. EXT_CSD_BUS_WIDTH_1,
  1136. };
  1137. /* An array to map CSD bus widths to host cap bits */
  1138. static unsigned ext_to_hostcaps[] = {
  1139. [EXT_CSD_DDR_BUS_WIDTH_4] =
  1140. MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
  1141. [EXT_CSD_DDR_BUS_WIDTH_8] =
  1142. MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
  1143. [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
  1144. [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
  1145. };
  1146. /* An array to map chosen bus width to an integer */
  1147. static unsigned widths[] = {
  1148. 8, 4, 8, 4, 1,
  1149. };
  1150. for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
  1151. unsigned int extw = ext_csd_bits[idx];
  1152. unsigned int caps = ext_to_hostcaps[extw];
  1153. /*
  1154. * If the bus width is still not changed,
  1155. * don't try to set the default again.
  1156. * Otherwise, recover from switch attempts
  1157. * by switching to 1-bit bus width.
  1158. */
  1159. if (extw == EXT_CSD_BUS_WIDTH_1 &&
  1160. mmc->bus_width == 1) {
  1161. err = 0;
  1162. break;
  1163. }
  1164. /*
  1165. * Check to make sure the card and controller support
  1166. * these capabilities
  1167. */
  1168. if ((mmc->card_caps & caps) != caps)
  1169. continue;
  1170. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
  1171. EXT_CSD_BUS_WIDTH, extw);
  1172. if (err)
  1173. continue;
  1174. mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
  1175. mmc_set_bus_width(mmc, widths[idx]);
  1176. err = mmc_send_ext_csd(mmc, test_csd);
  1177. if (err)
  1178. continue;
  1179. /* Only compare read only fields */
  1180. if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
  1181. == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
  1182. ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
  1183. == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
  1184. ext_csd[EXT_CSD_REV]
  1185. == test_csd[EXT_CSD_REV] &&
  1186. ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
  1187. == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
  1188. memcmp(&ext_csd[EXT_CSD_SEC_CNT],
  1189. &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
  1190. break;
  1191. else
  1192. err = SWITCH_ERR;
  1193. }
  1194. if (err)
  1195. return err;
  1196. if (mmc->card_caps & MMC_MODE_HS) {
  1197. if (mmc->card_caps & MMC_MODE_HS_52MHz)
  1198. mmc->tran_speed = 52000000;
  1199. else
  1200. mmc->tran_speed = 26000000;
  1201. }
  1202. }
  1203. mmc_set_clock(mmc, mmc->tran_speed);
  1204. /* Fix the block length for DDR mode */
  1205. if (mmc->ddr_mode) {
  1206. mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
  1207. mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
  1208. }
  1209. /* fill in device description */
  1210. mmc->block_dev.lun = 0;
  1211. mmc->block_dev.hwpart = 0;
  1212. mmc->block_dev.type = 0;
  1213. mmc->block_dev.blksz = mmc->read_bl_len;
  1214. mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
  1215. mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
  1216. #if !defined(CONFIG_SPL_BUILD) || \
  1217. (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
  1218. !defined(CONFIG_USE_TINY_PRINTF))
  1219. sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
  1220. mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
  1221. (mmc->cid[3] >> 16) & 0xffff);
  1222. sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
  1223. (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
  1224. (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
  1225. (mmc->cid[2] >> 24) & 0xff);
  1226. sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
  1227. (mmc->cid[2] >> 16) & 0xf);
  1228. #else
  1229. mmc->block_dev.vendor[0] = 0;
  1230. mmc->block_dev.product[0] = 0;
  1231. mmc->block_dev.revision[0] = 0;
  1232. #endif
  1233. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
  1234. part_init(&mmc->block_dev);
  1235. #endif
  1236. return 0;
  1237. }
  1238. static int mmc_send_if_cond(struct mmc *mmc)
  1239. {
  1240. struct mmc_cmd cmd;
  1241. int err;
  1242. cmd.cmdidx = SD_CMD_SEND_IF_COND;
  1243. /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
  1244. cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
  1245. cmd.resp_type = MMC_RSP_R7;
  1246. err = mmc_send_cmd(mmc, &cmd, NULL);
  1247. if (err)
  1248. return err;
  1249. if ((cmd.response[0] & 0xff) != 0xaa)
  1250. return UNUSABLE_ERR;
  1251. else
  1252. mmc->version = SD_VERSION_2;
  1253. return 0;
  1254. }
  1255. /* not used any more */
  1256. int __deprecated mmc_register(struct mmc *mmc)
  1257. {
  1258. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1259. printf("%s is deprecated! use mmc_create() instead.\n", __func__);
  1260. #endif
  1261. return -1;
  1262. }
  1263. struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
  1264. {
  1265. struct mmc *mmc;
  1266. /* quick validation */
  1267. if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
  1268. cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
  1269. return NULL;
  1270. mmc = calloc(1, sizeof(*mmc));
  1271. if (mmc == NULL)
  1272. return NULL;
  1273. mmc->cfg = cfg;
  1274. mmc->priv = priv;
  1275. /* the following chunk was mmc_register() */
  1276. /* Setup dsr related values */
  1277. mmc->dsr_imp = 0;
  1278. mmc->dsr = 0xffffffff;
  1279. /* Setup the universal parts of the block interface just once */
  1280. mmc->block_dev.if_type = IF_TYPE_MMC;
  1281. mmc->block_dev.devnum = cur_dev_num++;
  1282. mmc->block_dev.removable = 1;
  1283. mmc->block_dev.block_read = mmc_bread;
  1284. mmc->block_dev.block_write = mmc_bwrite;
  1285. mmc->block_dev.block_erase = mmc_berase;
  1286. /* setup initial part type */
  1287. mmc->block_dev.part_type = mmc->cfg->part_type;
  1288. INIT_LIST_HEAD(&mmc->link);
  1289. list_add_tail(&mmc->link, &mmc_devices);
  1290. return mmc;
  1291. }
  1292. void mmc_destroy(struct mmc *mmc)
  1293. {
  1294. /* only freeing memory for now */
  1295. free(mmc);
  1296. }
  1297. #ifdef CONFIG_PARTITIONS
  1298. struct blk_desc *mmc_get_dev(int dev)
  1299. {
  1300. struct mmc *mmc = find_mmc_device(dev);
  1301. if (!mmc || mmc_init(mmc))
  1302. return NULL;
  1303. return &mmc->block_dev;
  1304. }
  1305. #endif
  1306. /* board-specific MMC power initializations. */
  1307. __weak void board_mmc_power_init(void)
  1308. {
  1309. }
  1310. int mmc_start_init(struct mmc *mmc)
  1311. {
  1312. int err;
  1313. /* we pretend there's no card when init is NULL */
  1314. if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
  1315. mmc->has_init = 0;
  1316. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1317. printf("MMC: no card present\n");
  1318. #endif
  1319. return NO_CARD_ERR;
  1320. }
  1321. if (mmc->has_init)
  1322. return 0;
  1323. #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  1324. mmc_adapter_card_type_ident();
  1325. #endif
  1326. board_mmc_power_init();
  1327. /* made sure it's not NULL earlier */
  1328. err = mmc->cfg->ops->init(mmc);
  1329. if (err)
  1330. return err;
  1331. mmc->ddr_mode = 0;
  1332. mmc_set_bus_width(mmc, 1);
  1333. mmc_set_clock(mmc, 1);
  1334. /* Reset the Card */
  1335. err = mmc_go_idle(mmc);
  1336. if (err)
  1337. return err;
  1338. /* The internal partition reset to user partition(0) at every CMD0*/
  1339. mmc->block_dev.hwpart = 0;
  1340. /* Test for SD version 2 */
  1341. err = mmc_send_if_cond(mmc);
  1342. /* Now try to get the SD card's operating condition */
  1343. err = sd_send_op_cond(mmc);
  1344. /* If the command timed out, we check for an MMC card */
  1345. if (err == TIMEOUT) {
  1346. err = mmc_send_op_cond(mmc);
  1347. if (err) {
  1348. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1349. printf("Card did not respond to voltage select!\n");
  1350. #endif
  1351. return UNUSABLE_ERR;
  1352. }
  1353. }
  1354. if (!err)
  1355. mmc->init_in_progress = 1;
  1356. return err;
  1357. }
  1358. static int mmc_complete_init(struct mmc *mmc)
  1359. {
  1360. int err = 0;
  1361. mmc->init_in_progress = 0;
  1362. if (mmc->op_cond_pending)
  1363. err = mmc_complete_op_cond(mmc);
  1364. if (!err)
  1365. err = mmc_startup(mmc);
  1366. if (err)
  1367. mmc->has_init = 0;
  1368. else
  1369. mmc->has_init = 1;
  1370. return err;
  1371. }
  1372. int mmc_init(struct mmc *mmc)
  1373. {
  1374. int err = 0;
  1375. unsigned start;
  1376. if (mmc->has_init)
  1377. return 0;
  1378. start = get_timer(0);
  1379. if (!mmc->init_in_progress)
  1380. err = mmc_start_init(mmc);
  1381. if (!err)
  1382. err = mmc_complete_init(mmc);
  1383. debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
  1384. return err;
  1385. }
  1386. int mmc_set_dsr(struct mmc *mmc, u16 val)
  1387. {
  1388. mmc->dsr = val;
  1389. return 0;
  1390. }
  1391. /* CPU-specific MMC initializations */
  1392. __weak int cpu_mmc_init(bd_t *bis)
  1393. {
  1394. return -1;
  1395. }
  1396. /* board-specific MMC initializations. */
  1397. __weak int board_mmc_init(bd_t *bis)
  1398. {
  1399. return -1;
  1400. }
  1401. #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
  1402. void print_mmc_devices(char separator)
  1403. {
  1404. struct mmc *m;
  1405. struct list_head *entry;
  1406. char *mmc_type;
  1407. list_for_each(entry, &mmc_devices) {
  1408. m = list_entry(entry, struct mmc, link);
  1409. if (m->has_init)
  1410. mmc_type = IS_SD(m) ? "SD" : "eMMC";
  1411. else
  1412. mmc_type = NULL;
  1413. printf("%s: %d", m->cfg->name, m->block_dev.devnum);
  1414. if (mmc_type)
  1415. printf(" (%s)", mmc_type);
  1416. if (entry->next != &mmc_devices) {
  1417. printf("%c", separator);
  1418. if (separator != '\n')
  1419. puts (" ");
  1420. }
  1421. }
  1422. printf("\n");
  1423. }
  1424. #else
  1425. void print_mmc_devices(char separator) { }
  1426. #endif
  1427. int get_mmc_num(void)
  1428. {
  1429. return cur_dev_num;
  1430. }
  1431. void mmc_set_preinit(struct mmc *mmc, int preinit)
  1432. {
  1433. mmc->preinit = preinit;
  1434. }
  1435. static void do_preinit(void)
  1436. {
  1437. struct mmc *m;
  1438. struct list_head *entry;
  1439. list_for_each(entry, &mmc_devices) {
  1440. m = list_entry(entry, struct mmc, link);
  1441. #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  1442. mmc_set_preinit(m, 1);
  1443. #endif
  1444. if (m->preinit)
  1445. mmc_start_init(m);
  1446. }
  1447. }
  1448. #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
  1449. static int mmc_probe(bd_t *bis)
  1450. {
  1451. return 0;
  1452. }
  1453. #elif defined(CONFIG_DM_MMC)
  1454. static int mmc_probe(bd_t *bis)
  1455. {
  1456. int ret, i;
  1457. struct uclass *uc;
  1458. struct udevice *dev;
  1459. ret = uclass_get(UCLASS_MMC, &uc);
  1460. if (ret)
  1461. return ret;
  1462. /*
  1463. * Try to add them in sequence order. Really with driver model we
  1464. * should allow holes, but the current MMC list does not allow that.
  1465. * So if we request 0, 1, 3 we will get 0, 1, 2.
  1466. */
  1467. for (i = 0; ; i++) {
  1468. ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
  1469. if (ret == -ENODEV)
  1470. break;
  1471. }
  1472. uclass_foreach_dev(dev, uc) {
  1473. ret = device_probe(dev);
  1474. if (ret)
  1475. printf("%s - probe failed: %d\n", dev->name, ret);
  1476. }
  1477. return 0;
  1478. }
  1479. #else
  1480. static int mmc_probe(bd_t *bis)
  1481. {
  1482. if (board_mmc_init(bis) < 0)
  1483. cpu_mmc_init(bis);
  1484. return 0;
  1485. }
  1486. #endif
  1487. int mmc_initialize(bd_t *bis)
  1488. {
  1489. static int initialized = 0;
  1490. int ret;
  1491. if (initialized) /* Avoid initializing mmc multiple times */
  1492. return 0;
  1493. initialized = 1;
  1494. INIT_LIST_HEAD (&mmc_devices);
  1495. cur_dev_num = 0;
  1496. ret = mmc_probe(bis);
  1497. if (ret)
  1498. return ret;
  1499. #ifndef CONFIG_SPL_BUILD
  1500. print_mmc_devices(',');
  1501. #endif
  1502. do_preinit();
  1503. return 0;
  1504. }
  1505. #ifdef CONFIG_SUPPORT_EMMC_BOOT
  1506. /*
  1507. * This function changes the size of boot partition and the size of rpmb
  1508. * partition present on EMMC devices.
  1509. *
  1510. * Input Parameters:
  1511. * struct *mmc: pointer for the mmc device strcuture
  1512. * bootsize: size of boot partition
  1513. * rpmbsize: size of rpmb partition
  1514. *
  1515. * Returns 0 on success.
  1516. */
  1517. int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
  1518. unsigned long rpmbsize)
  1519. {
  1520. int err;
  1521. struct mmc_cmd cmd;
  1522. /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
  1523. cmd.cmdidx = MMC_CMD_RES_MAN;
  1524. cmd.resp_type = MMC_RSP_R1b;
  1525. cmd.cmdarg = MMC_CMD62_ARG1;
  1526. err = mmc_send_cmd(mmc, &cmd, NULL);
  1527. if (err) {
  1528. debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
  1529. return err;
  1530. }
  1531. /* Boot partition changing mode */
  1532. cmd.cmdidx = MMC_CMD_RES_MAN;
  1533. cmd.resp_type = MMC_RSP_R1b;
  1534. cmd.cmdarg = MMC_CMD62_ARG2;
  1535. err = mmc_send_cmd(mmc, &cmd, NULL);
  1536. if (err) {
  1537. debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
  1538. return err;
  1539. }
  1540. /* boot partition size is multiple of 128KB */
  1541. bootsize = (bootsize * 1024) / 128;
  1542. /* Arg: boot partition size */
  1543. cmd.cmdidx = MMC_CMD_RES_MAN;
  1544. cmd.resp_type = MMC_RSP_R1b;
  1545. cmd.cmdarg = bootsize;
  1546. err = mmc_send_cmd(mmc, &cmd, NULL);
  1547. if (err) {
  1548. debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
  1549. return err;
  1550. }
  1551. /* RPMB partition size is multiple of 128KB */
  1552. rpmbsize = (rpmbsize * 1024) / 128;
  1553. /* Arg: RPMB partition size */
  1554. cmd.cmdidx = MMC_CMD_RES_MAN;
  1555. cmd.resp_type = MMC_RSP_R1b;
  1556. cmd.cmdarg = rpmbsize;
  1557. err = mmc_send_cmd(mmc, &cmd, NULL);
  1558. if (err) {
  1559. debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
  1560. return err;
  1561. }
  1562. return 0;
  1563. }
  1564. /*
  1565. * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
  1566. * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
  1567. * and BOOT_MODE.
  1568. *
  1569. * Returns 0 on success.
  1570. */
  1571. int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
  1572. {
  1573. int err;
  1574. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
  1575. EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
  1576. EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
  1577. EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
  1578. if (err)
  1579. return err;
  1580. return 0;
  1581. }
  1582. /*
  1583. * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
  1584. * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
  1585. * PARTITION_ACCESS.
  1586. *
  1587. * Returns 0 on success.
  1588. */
  1589. int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
  1590. {
  1591. int err;
  1592. err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
  1593. EXT_CSD_BOOT_ACK(ack) |
  1594. EXT_CSD_BOOT_PART_NUM(part_num) |
  1595. EXT_CSD_PARTITION_ACCESS(access));
  1596. if (err)
  1597. return err;
  1598. return 0;
  1599. }
  1600. /*
  1601. * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
  1602. * for enable. Note that this is a write-once field for non-zero values.
  1603. *
  1604. * Returns 0 on success.
  1605. */
  1606. int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
  1607. {
  1608. return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
  1609. enable);
  1610. }
  1611. #endif